Groups | Search | Server Info | Keyboard shortcuts | Login | Register [http] [https] [nntp] [nntps]


Groups > linux.kernel > #1601431 > unrolled thread

[PATCH] clk: tegra: fix disable unused for clocks sharing enable bit

Started byPeter De Schrijver <pdeschrijver@nvidia.com>
First post2017-03-15 15:20 +0100
Last post2017-03-20 15:30 +0100
Articles 3 — 2 participants

Back to article view | Back to linux.kernel


Contents

  [PATCH] clk: tegra: fix disable unused for clocks sharing enable bit Peter De Schrijver <pdeschrijver@nvidia.com> - 2017-03-15 15:20 +0100
    Re: [PATCH] clk: tegra: fix disable unused for clocks sharing enable  bit Thierry Reding <thierry.reding@gmail.com> - 2017-03-20 14:40 +0100
      Re: [PATCH] clk: tegra: fix disable unused for clocks sharing enable  bit Peter De Schrijver <pdeschrijver@nvidia.com> - 2017-03-20 15:30 +0100

#1601431 — [PATCH] clk: tegra: fix disable unused for clocks sharing enable bit

FromPeter De Schrijver <pdeschrijver@nvidia.com>
Date2017-03-15 15:20 +0100
Subject[PATCH] clk: tegra: fix disable unused for clocks sharing enable bit
Message-ID<tlhWp-lx-5@gated-at.bofh.it>
In case 2 clocks share an enable bit and one of them is enabled by a driver
and the other one is not, CCF will think it's enabled because it will only
look at the hw state. Therefor it will disable the clock and thus also
disable the other clock which was enabled. Solve this by reading the
initial state of the enable bit and incrementing the refcount if it's set.

Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
---
 drivers/clk/tegra/clk-periph-gate.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/clk/tegra/clk-periph-gate.c b/drivers/clk/tegra/clk-periph-gate.c
index 8812782..303ef32 100644
--- a/drivers/clk/tegra/clk-periph-gate.c
+++ b/drivers/clk/tegra/clk-periph-gate.c
@@ -159,6 +159,9 @@ struct clk *tegra_clk_register_periph_gate(const char *name,
 	gate->enable_refcnt = enable_refcnt;
 	gate->regs = pregs;
 
+	if (read_enb(gate) & periph_clk_to_bit(gate))
+		enable_refcnt[clk_num]++;
+
 	/* Data in .init is copied by clk_register(), so stack variable OK */
 	gate->hw.init = &init;
 
-- 
1.9.1

[toc] | [next] | [standalone]


#1604580 — Re: [PATCH] clk: tegra: fix disable unused for clocks sharing enable bit

FromThierry Reding <thierry.reding@gmail.com>
Date2017-03-20 14:40 +0100
SubjectRe: [PATCH] clk: tegra: fix disable unused for clocks sharing enable bit
Message-ID<tn5Hs-5ly-31@gated-at.bofh.it>
In reply to#1601431

[Multipart message — attachments visible in raw view] — view raw

On Wed, Mar 15, 2017 at 04:10:54PM +0200, Peter De Schrijver wrote:
> In case 2 clocks share an enable bit and one of them is enabled by a driver
> and the other one is not, CCF will think it's enabled because it will only
> look at the hw state. Therefor it will disable the clock and thus also
> disable the other clock which was enabled. Solve this by reading the
> initial state of the enable bit and incrementing the refcount if it's set.
> 
> Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
> ---
>  drivers/clk/tegra/clk-periph-gate.c | 3 +++
>  1 file changed, 3 insertions(+)

I think you had already sent a version of this patch a couple of weeks
ago. I've applied the first version since I couldn't spot any delta
between them.

Thierry

[toc] | [prev] | [next] | [standalone]


#1604632 — Re: [PATCH] clk: tegra: fix disable unused for clocks sharing enable bit

FromPeter De Schrijver <pdeschrijver@nvidia.com>
Date2017-03-20 15:30 +0100
SubjectRe: [PATCH] clk: tegra: fix disable unused for clocks sharing enable bit
Message-ID<tn6tQ-5Wi-25@gated-at.bofh.it>
In reply to#1604580
On Mon, Mar 20, 2017 at 02:27:46PM +0100, Thierry Reding wrote:
> * PGP Signed by an unknown key
> 
> On Wed, Mar 15, 2017 at 04:10:54PM +0200, Peter De Schrijver wrote:
> > In case 2 clocks share an enable bit and one of them is enabled by a driver
> > and the other one is not, CCF will think it's enabled because it will only
> > look at the hw state. Therefor it will disable the clock and thus also
> > disable the other clock which was enabled. Solve this by reading the
> > initial state of the enable bit and incrementing the refcount if it's set.
> > 
> > Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
> > ---
> >  drivers/clk/tegra/clk-periph-gate.c | 3 +++
> >  1 file changed, 3 insertions(+)
> 
> I think you had already sent a version of this patch a couple of weeks
> ago. I've applied the first version since I couldn't spot any delta
> between them.

Hmm. Could be.

Cheers,

Peter.

[toc] | [prev] | [standalone]


Back to top | Article view | linux.kernel


csiph-web