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[PATCH 0/4] ARM64: Initial Marvell IAP140 enablement

Started byAndreas Färber <afaerber@suse.de>
First post2017-02-19 04:30 +0100
Last post2017-02-21 23:30 +0100
Articles 7 — 4 participants

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Contents

  [PATCH 0/4] ARM64: Initial Marvell IAP140 enablement Andreas Färber <afaerber@suse.de> - 2017-02-19 04:30 +0100
    [PATCH 1/4] ARM64: Prepare Marvell IAP140 aka PXA1908 Andreas Färber <afaerber@suse.de> - 2017-02-19 04:30 +0100
    [PATCH 4/4] ARM64: dts: marvell: iap140-andromeda-box-edge: Add uart0 clock Andreas Färber <afaerber@suse.de> - 2017-02-19 04:30 +0100
    Re: [PATCH 0/4] ARM64: Initial Marvell IAP140 enablement Gregory CLEMENT <gregory.clement@free-electrons.com> - 2017-02-20 14:20 +0100
      Re: [PATCH 0/4] ARM64: Initial Marvell IAP140 enablement Andreas Färber <afaerber@suse.de> - 2017-02-21 19:30 +0100
        Re: [PATCH 0/4] ARM64: Initial Marvell IAP140 enablement Andrew Lunn <andrew@lunn.ch> - 2017-02-21 20:30 +0100
        Re: [PATCH 0/4] ARM64: Initial Marvell IAP140 enablement Robert Jarzmik <robert.jarzmik@free.fr> - 2017-02-21 23:30 +0100

#1584058 — [PATCH 0/4] ARM64: Initial Marvell IAP140 enablement

FromAndreas Färber <afaerber@suse.de>
Date2017-02-19 04:30 +0100
Subject[PATCH 0/4] ARM64: Initial Marvell IAP140 enablement
Message-ID<tcqmd-296-1@gated-at.bofh.it>
Hello,

This mini-series adds initial support for the Marvell IAP140 SoC (aka PXA1908)
and the Andromeda Box Edge development board.

In order to enable the 8250 UART driver, it reuses ARCH_PXA; but some drivers
enabled with ARCH_PXA don't build due to arm assembly or arm64's lack of mach-,
so their dependencies need to be limited to ARM alongside (blacklisted). The
alternative would of course be to choose a new ARCH_ symbol and to selectively
add it to drivers known working (whitelisting). The latter would require
finding a suitable name.

Both earlycon and serial are working, but an explicit console=ttyS0,115200n8
is needed; with just "earlycon" and stdout-path the earlycon stops early and
switches to a tty0, long before disabling the bootconsole...

All four CPUs come up, and an initrd can be reached.

However, there are errors about CPUs 1-3 having a zero SYS_CNTFRQ_EL0:

[    0.095812] smp: Bringing up secondary CPUs ...
======pxa1908_pmu_core_pwr_on: mpidr = 0x1
======pxa1908_pmu_core_pwr_on: mpidr = 0x2
======pxa1908_pmu_core_pwr_on: mpidr = 0x3
[    0.133419] Detected VIPT I-cache on CPU1
[    0.133430] CPU features: SANITY CHECK: Unexpected variation in SYS_CNTFRQ_EL0. Boot CPU: 0x000000018cba80, CPU1: 0x00000000000000
[    0.133447] Unsupported CPU feature variation.
...
[    0.133748] CPU1: Booted secondary processor [410fd032]
[    0.165465] Detected VIPT I-cache on CPU2
[    0.165474] CPU features: SANITY CHECK: Unexpected variation in SYS_CNTFRQ_EL0. Boot CPU: 0x000000018cba80, CPU2: 0x00000000000000
[    0.165505] CPU2: Booted secondary processor [410fd032]
[    0.197539] Detected VIPT I-cache on CPU3
[    0.197546] CPU features: SANITY CHECK: Unexpected variation in SYS_CNTFRQ_EL0. Boot CPU: 0x000000018cba80, CPU3: 0x00000000000000
[    0.197573] CPU3: Booted secondary processor [410fd032]
[    0.197625] smp: Brought up 1 node, 4 CPUs
[    0.522514] SMP: Total of 4 processors activated.
[    0.527212] CPU features: detected feature: 32-bit EL0 Support
[    0.533105] CPU: All CPU(s) started at EL2

KVM appears to initialize okay, but was not yet tested with guests.

[    0.865255] kvm [1]: 8-bit VMID
[    0.868401] kvm [1]: IDMAP page: d23000
[    0.872233] kvm [1]: HYP VA range: 800000000000:ffffffffffff
[    0.878262] kvm [1]: Hyp mode initialized successfully
[    0.883429] kvm [1]: vgic-v2@d1dfc000
[    0.887179] kvm [1]: vgic interrupt IRQ1
[    0.891120] kvm [1]: virtual timer IRQ4

More Marvell drivers may be available in-tree for reuse - besides build errors
the limitation is currently the lack of an IAP140 clk driver though. Patch 4/4
works around that for UART0 with a fixed-clock.

A 3.14 based tree is available on GitHub acorn-marvell/brillo_pxa_kernel. No
driver comparisons to mainline have been attempted yet.

Booting required changes to the vendor U-Boot,
cf. https://en.opensuse.org/HCL:AndromedaBoxEdge

https://github.com/afaerber/linux/commits/edge-next

Have a lot of fun!

Cheers,
Andreas

Cc: info@andromedabox.org
Cc: devicetree@vger.kernel.org

Andreas Färber (4):
  ARM64: Prepare Marvell IAP140 aka PXA1908
  Documentation: devicetree: arm: Document Marvell IAP140
  ARM64: dts: marvell: Add IAP140 and Andromeda Box Edge
  ARM64: dts: marvell: iap140-andromeda-box-edge: Add uart0 clock

 .../devicetree/bindings/arm/marvell/iap140.txt     |   7 +
 arch/arm64/Kconfig.platforms                       |   5 +
 arch/arm64/boot/dts/marvell/Makefile               |   2 +
 .../boot/dts/marvell/iap140-andromeda-box-edge.dts |  77 ++++++++
 arch/arm64/boot/dts/marvell/iap140.dtsi            | 195 +++++++++++++++++++++
 drivers/clk/Kconfig                                |   2 +-
 drivers/mmc/host/Kconfig                           |   2 +-
 drivers/tty/serial/Kconfig                         |   2 +-
 8 files changed, 289 insertions(+), 3 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/arm/marvell/iap140.txt
 create mode 100644 arch/arm64/boot/dts/marvell/iap140-andromeda-box-edge.dts
 create mode 100644 arch/arm64/boot/dts/marvell/iap140.dtsi

-- 
2.10.2

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#1584059 — [PATCH 1/4] ARM64: Prepare Marvell IAP140 aka PXA1908

FromAndreas Färber <afaerber@suse.de>
Date2017-02-19 04:30 +0100
Subject[PATCH 1/4] ARM64: Prepare Marvell IAP140 aka PXA1908
Message-ID<tcqme-296-5@gated-at.bofh.it>
In reply to#1584058
Suppress COMMON_CLK_PXA and MMC_PXA for now as they don't build on arm64.
Also suppress the deprecated SERIAL_PXA in favor of SERIAL_8250_PXA.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 arch/arm64/Kconfig.platforms | 5 +++++
 drivers/clk/Kconfig          | 2 +-
 drivers/mmc/host/Kconfig     | 2 +-
 drivers/tty/serial/Kconfig   | 2 +-
 4 files changed, 8 insertions(+), 3 deletions(-)

diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms
index 129cc5a..841b6c8 100644
--- a/arch/arm64/Kconfig.platforms
+++ b/arch/arm64/Kconfig.platforms
@@ -111,6 +111,11 @@ config ARCH_MVEBU
 	   - Armada 7K SoC Family
 	   - Armada 8K SoC Family
 
+config ARCH_PXA
+	bool "Marvell PXA SoC Family"
+	help
+	  This enables support for the Marvell PXA family.
+
 config ARCH_QCOM
 	bool "Qualcomm Platforms"
 	select GPIOLIB
diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
index 9356ab4..3d25f20 100644
--- a/drivers/clk/Kconfig
+++ b/drivers/clk/Kconfig
@@ -185,7 +185,7 @@ config COMMON_CLK_PWM
 	  at 50% duty cycle.
 
 config COMMON_CLK_PXA
-	def_bool COMMON_CLK && ARCH_PXA
+	def_bool COMMON_CLK && ARCH_PXA && ARM
 	---help---
 	  Support for the Marvell PXA SoC.
 
diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig
index f08691a..a650eca 100644
--- a/drivers/mmc/host/Kconfig
+++ b/drivers/mmc/host/Kconfig
@@ -27,7 +27,7 @@ config MMC_QCOM_DML
 
 config MMC_PXA
 	tristate "Intel PXA25x/26x/27x Multimedia Card Interface support"
-	depends on ARCH_PXA
+	depends on ARCH_PXA && ARM
 	help
 	  This selects the Intel(R) PXA(R) Multimedia card Interface.
 	  If you have a PXA(R) platform with a Multimedia Card slot,
diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig
index 6117ac8..0713a05 100644
--- a/drivers/tty/serial/Kconfig
+++ b/drivers/tty/serial/Kconfig
@@ -439,7 +439,7 @@ config SERIAL_MPSC_CONSOLE
 
 config SERIAL_PXA
 	bool "PXA serial port support (DEPRECATED)"
-	depends on ARCH_PXA || ARCH_MMP
+	depends on (ARCH_PXA && ARM) || ARCH_MMP
 	select SERIAL_CORE
 	select SERIAL_8250_PXA if SERIAL_8250=y
 	select SERIAL_PXA_NON8250 if !SERIAL_8250=y
-- 
2.10.2

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#1584060 — [PATCH 4/4] ARM64: dts: marvell: iap140-andromeda-box-edge: Add uart0 clock

FromAndreas Färber <afaerber@suse.de>
Date2017-02-19 04:30 +0100
Subject[PATCH 4/4] ARM64: dts: marvell: iap140-andromeda-box-edge: Add uart0 clock
Message-ID<tcqmf-296-11@gated-at.bofh.it>
In reply to#1584058
Use a fixed clock to enable ttyS0 output.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 arch/arm64/boot/dts/marvell/iap140-andromeda-box-edge.dts | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm64/boot/dts/marvell/iap140-andromeda-box-edge.dts b/arch/arm64/boot/dts/marvell/iap140-andromeda-box-edge.dts
index de01d93..dceab69 100644
--- a/arch/arm64/boot/dts/marvell/iap140-andromeda-box-edge.dts
+++ b/arch/arm64/boot/dts/marvell/iap140-andromeda-box-edge.dts
@@ -63,8 +63,15 @@
 		device_type = "memory";
 		reg = <0x0 0x0 0x0 0x40000000>;
 	};
+
+	uart0_clk: uart0-clk {
+		compatible = "fixed-clock";
+		clock-frequency = <14740000>;
+		#clock-cells = <0>;
+	};
 };
 
 &uart0 {
 	status = "okay";
+	clocks = <&uart0_clk>;
 };
-- 
2.10.2

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#1584607

FromGregory CLEMENT <gregory.clement@free-electrons.com>
Date2017-02-20 14:20 +0100
Message-ID<tcW2K-59i-17@gated-at.bofh.it>
In reply to#1584058
Hi Andreas,
 
 On dim., févr. 19 2017, Andreas Färber <afaerber@suse.de> wrote:

> Hello,
>
> This mini-series adds initial support for the Marvell IAP140 SoC (aka PXA1908)
> and the Andromeda Box Edge development board.

Given the name of the SoC (PXA1908) and the fact that you reuse driver
related to PXA, for me these SoC is neither a mvebu nor a berlin SoC. So
just to avoid any misunderstanding, I don't mind being CC and possibly
doing review but I don't plan to take this patch ( I don't think the
berlin maintainer will do it too). 

>
> In order to enable the 8250 UART driver, it reuses ARCH_PXA; but some drivers
> enabled with ARCH_PXA don't build due to arm assembly or arm64's lack of mach-,
> so their dependencies need to be limited to ARM alongside (blacklisted). The
> alternative would of course be to choose a new ARCH_ symbol and to selectively
> add it to drivers known working (whitelisting). The latter would require
> finding a suitable name.

For this kind of issue you can have a look on what we did when
introducing mvebu SoC using ARM64.

Gregory

>
> Both earlycon and serial are working, but an explicit console=ttyS0,115200n8
> is needed; with just "earlycon" and stdout-path the earlycon stops early and
> switches to a tty0, long before disabling the bootconsole...
>
> All four CPUs come up, and an initrd can be reached.
>
> However, there are errors about CPUs 1-3 having a zero SYS_CNTFRQ_EL0:
>
> [    0.095812] smp: Bringing up secondary CPUs ...
> ======pxa1908_pmu_core_pwr_on: mpidr = 0x1
> ======pxa1908_pmu_core_pwr_on: mpidr = 0x2
> ======pxa1908_pmu_core_pwr_on: mpidr = 0x3
> [    0.133419] Detected VIPT I-cache on CPU1
> [    0.133430] CPU features: SANITY CHECK: Unexpected variation in SYS_CNTFRQ_EL0. Boot CPU: 0x000000018cba80, CPU1: 0x00000000000000
> [    0.133447] Unsupported CPU feature variation.
> ...
> [    0.133748] CPU1: Booted secondary processor [410fd032]
> [    0.165465] Detected VIPT I-cache on CPU2
> [    0.165474] CPU features: SANITY CHECK: Unexpected variation in SYS_CNTFRQ_EL0. Boot CPU: 0x000000018cba80, CPU2: 0x00000000000000
> [    0.165505] CPU2: Booted secondary processor [410fd032]
> [    0.197539] Detected VIPT I-cache on CPU3
> [    0.197546] CPU features: SANITY CHECK: Unexpected variation in SYS_CNTFRQ_EL0. Boot CPU: 0x000000018cba80, CPU3: 0x00000000000000
> [    0.197573] CPU3: Booted secondary processor [410fd032]
> [    0.197625] smp: Brought up 1 node, 4 CPUs
> [    0.522514] SMP: Total of 4 processors activated.
> [    0.527212] CPU features: detected feature: 32-bit EL0 Support
> [    0.533105] CPU: All CPU(s) started at EL2
>
> KVM appears to initialize okay, but was not yet tested with guests.
>
> [    0.865255] kvm [1]: 8-bit VMID
> [    0.868401] kvm [1]: IDMAP page: d23000
> [    0.872233] kvm [1]: HYP VA range: 800000000000:ffffffffffff
> [    0.878262] kvm [1]: Hyp mode initialized successfully
> [    0.883429] kvm [1]: vgic-v2@d1dfc000
> [    0.887179] kvm [1]: vgic interrupt IRQ1
> [    0.891120] kvm [1]: virtual timer IRQ4
>
> More Marvell drivers may be available in-tree for reuse - besides build errors
> the limitation is currently the lack of an IAP140 clk driver though. Patch 4/4
> works around that for UART0 with a fixed-clock.
>
> A 3.14 based tree is available on GitHub acorn-marvell/brillo_pxa_kernel. No
> driver comparisons to mainline have been attempted yet.
>
> Booting required changes to the vendor U-Boot,
> cf. https://en.opensuse.org/HCL:AndromedaBoxEdge
>
> https://github.com/afaerber/linux/commits/edge-next
>
> Have a lot of fun!
>
> Cheers,
> Andreas
>
> Cc: info@andromedabox.org
> Cc: devicetree@vger.kernel.org
>
> Andreas Färber (4):
>   ARM64: Prepare Marvell IAP140 aka PXA1908
>   Documentation: devicetree: arm: Document Marvell IAP140
>   ARM64: dts: marvell: Add IAP140 and Andromeda Box Edge
>   ARM64: dts: marvell: iap140-andromeda-box-edge: Add uart0 clock
>
>  .../devicetree/bindings/arm/marvell/iap140.txt     |   7 +
>  arch/arm64/Kconfig.platforms                       |   5 +
>  arch/arm64/boot/dts/marvell/Makefile               |   2 +
>  .../boot/dts/marvell/iap140-andromeda-box-edge.dts |  77 ++++++++
>  arch/arm64/boot/dts/marvell/iap140.dtsi            | 195 +++++++++++++++++++++
>  drivers/clk/Kconfig                                |   2 +-
>  drivers/mmc/host/Kconfig                           |   2 +-
>  drivers/tty/serial/Kconfig                         |   2 +-
>  8 files changed, 289 insertions(+), 3 deletions(-)
>  create mode 100644 Documentation/devicetree/bindings/arm/marvell/iap140.txt
>  create mode 100644 arch/arm64/boot/dts/marvell/iap140-andromeda-box-edge.dts
>  create mode 100644 arch/arm64/boot/dts/marvell/iap140.dtsi
>
> -- 
> 2.10.2
>

-- 
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com

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#1585600

FromAndreas Färber <afaerber@suse.de>
Date2017-02-21 19:30 +0100
Message-ID<tdnmi-6iG-17@gated-at.bofh.it>
In reply to#1584607
Hi Gregory,

Am 20.02.2017 um 14:17 schrieb Gregory CLEMENT:
>  On dim., févr. 19 2017, Andreas Färber <afaerber@suse.de> wrote:
> 
>> This mini-series adds initial support for the Marvell IAP140 SoC (aka PXA1908)
>> and the Andromeda Box Edge development board.
> 
> Given the name of the SoC (PXA1908) and the fact that you reuse driver
> related to PXA, for me these SoC is neither a mvebu nor a berlin SoC.

That matches my understanding.

> So
> just to avoid any misunderstanding, I don't mind being CC and possibly
> doing review but I don't plan to take this patch ( I don't think the
> berlin maintainer will do it too). 

Sure. There did not seem to be a MAINTAINERS-documented maintainer for
dts/marvell/Makefile, so I CC'ed both MVEBU and Berlin for review, in
addition to the unclear-to-me PXA vs. MMP separation.

I was unsure about the sort order used: Is it that Berlin was first and
therefore Berlin comes before Armada (then iap140 goes last), or is it
sorted by ARCH_? Becomes relevant below.

>> In order to enable the 8250 UART driver, it reuses ARCH_PXA; but some drivers
>> enabled with ARCH_PXA don't build due to arm assembly or arm64's lack of mach-,
>> so their dependencies need to be limited to ARM alongside (blacklisted). The
>> alternative would of course be to choose a new ARCH_ symbol and to selectively
>> add it to drivers known working (whitelisting). The latter would require
>> finding a suitable name.
> 
> For this kind of issue you can have a look on what we did when
> introducing mvebu SoC using ARM64.

This is how you introduced MVEBU for arm64:

http://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/commit/?id=b4f596b19624d14864596b5b43de5f04cadd4895

There was a discussion with Jisheng on whether to use ARCH_ARMADA_3700,
but since I did not propose ARCH_IAP140 here, what are you suggesting
exactly? Berlin does not sound like a BU name either.

What I am reading out of the documentation Thomas pointed to is that
ARCH_MMP would be more correct than ARCH_PXA, despite the PXA1908 name.

MMP does help with driver compilation. Just for the OF earlycon I still
need the PXA compatible fallback, or we would need to define an MMP
earlycon. Since mmp2.dtsi does not use the pxa compatible, I'll look
into the latter for v2.

MMP sorts before MVEBU, unlike PXA.

So MMP would mean Eric and Haojian only - I will drop the other Marvell
maintainers for v2 then, except where review comments have been provided.

Regards,
Andreas

-- 
SUSE Linux GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Felix Imendörffer, Jane Smithard, Graham Norton
HRB 21284 (AG Nürnberg)

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#1585671

FromAndrew Lunn <andrew@lunn.ch>
Date2017-02-21 20:30 +0100
Message-ID<tdoim-6Y4-29@gated-at.bofh.it>
In reply to#1585600
> So MMP would mean Eric and Haojian only - I will drop the other Marvell
> maintainers for v2 then, except where review comments have been provided.

Hi Andreas

If you find there are any drivers shared by MVEBU and MMP, please do
Cc: us if you need to touch them. We have knowledge we can share.

    Andrew

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#1585781

FromRobert Jarzmik <robert.jarzmik@free.fr>
Date2017-02-21 23:30 +0100
Message-ID<tdr6x-on-15@gated-at.bofh.it>
In reply to#1585600
Andreas Färber <afaerber@suse.de> writes:

> Hi Gregory,
>
> Am 20.02.2017 um 14:17 schrieb Gregory CLEMENT:
>>  On dim., févr. 19 2017, Andreas Färber <afaerber@suse.de> wrote:
>> 
>>> This mini-series adds initial support for the Marvell IAP140 SoC (aka PXA1908)
>>> and the Andromeda Box Edge development board.
>> 
>> Given the name of the SoC (PXA1908) and the fact that you reuse driver
>> related to PXA, for me these SoC is neither a mvebu nor a berlin SoC.
>
> That matches my understanding.

...zip...
> What I am reading out of the documentation Thomas pointed to is that
> ARCH_MMP would be more correct than ARCH_PXA, despite the PXA1908 name.
I agree here.

PXA for me are XScale micro-architecture based SoCs, quite old. PXA1908 has a
quite recent Cortex-A53 (or several of them), which makes me think its either an
MMP or something newer than MMP.

> MMP does help with driver compilation. Just for the OF earlycon I still
> need the PXA compatible fallback, or we would need to define an MMP
> earlycon. Since mmp2.dtsi does not use the pxa compatible, I'll look
> into the latter for v2.
>
> MMP sorts before MVEBU, unlike PXA.
>
> So MMP would mean Eric and Haojian only - I will drop the other Marvell
> maintainers for v2 then, except where review comments have been provided.
Yes please.

Cheers.

-- 
Robert

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