Groups | Search | Server Info | Keyboard shortcuts | Login | Register [http] [https] [nntp] [nntps]


Groups > linux.kernel > #1580482 > unrolled thread

[PATCH] mmc: sdhci-cadence: fix bit shift of read data from PHY port

Started byMasahiro Yamada <yamada.masahiro@socionext.com>
First post2017-02-14 12:10 +0100
Last post2017-02-15 11:50 +0100
Articles 3 — 3 participants

Back to article view | Back to linux.kernel


Contents

  [PATCH] mmc: sdhci-cadence: fix bit shift of read data from PHY port Masahiro Yamada <yamada.masahiro@socionext.com> - 2017-02-14 12:10 +0100
    Re: [PATCH] mmc: sdhci-cadence: fix bit shift of read data from PHY  port Adrian Hunter <adrian.hunter@intel.com> - 2017-02-14 12:40 +0100
    Re: [PATCH] mmc: sdhci-cadence: fix bit shift of read data from PHY port Ulf Hansson <ulf.hansson@linaro.org> - 2017-02-15 11:50 +0100

#1580482 — [PATCH] mmc: sdhci-cadence: fix bit shift of read data from PHY port

FromMasahiro Yamada <yamada.masahiro@socionext.com>
Date2017-02-14 12:10 +0100
Subject[PATCH] mmc: sdhci-cadence: fix bit shift of read data from PHY port
Message-ID<taJ9D-186-13@gated-at.bofh.it>
This macro is currently unused, but it may be useful for debug use.
Fix it just in case.

Fixes: ff6af28faff5 ("mmc: sdhci-cadence: add Cadence SD4HC support")
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
---

 drivers/mmc/host/sdhci-cadence.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/mmc/host/sdhci-cadence.c b/drivers/mmc/host/sdhci-cadence.c
index 4b0ecb9..5ffa2e5 100644
--- a/drivers/mmc/host/sdhci-cadence.c
+++ b/drivers/mmc/host/sdhci-cadence.c
@@ -25,7 +25,7 @@
 #define   SDHCI_CDNS_HRS04_ACK			BIT(26)
 #define   SDHCI_CDNS_HRS04_RD			BIT(25)
 #define   SDHCI_CDNS_HRS04_WR			BIT(24)
-#define   SDHCI_CDNS_HRS04_RDATA_SHIFT		12
+#define   SDHCI_CDNS_HRS04_RDATA_SHIFT		16
 #define   SDHCI_CDNS_HRS04_WDATA_SHIFT		8
 #define   SDHCI_CDNS_HRS04_ADDR_SHIFT		0
 
-- 
2.7.4

[toc] | [next] | [standalone]


#1580489 — Re: [PATCH] mmc: sdhci-cadence: fix bit shift of read data from PHY port

FromAdrian Hunter <adrian.hunter@intel.com>
Date2017-02-14 12:40 +0100
SubjectRe: [PATCH] mmc: sdhci-cadence: fix bit shift of read data from PHY port
Message-ID<taJCF-1jr-7@gated-at.bofh.it>
In reply to#1580482
On 14/02/17 13:05, Masahiro Yamada wrote:
> This macro is currently unused, but it may be useful for debug use.
> Fix it just in case.
> 
> Fixes: ff6af28faff5 ("mmc: sdhci-cadence: add Cadence SD4HC support")
> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

Acked-by: Adrian Hunter <adrian.hunter@intel.com>

> ---
> 
>  drivers/mmc/host/sdhci-cadence.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/mmc/host/sdhci-cadence.c b/drivers/mmc/host/sdhci-cadence.c
> index 4b0ecb9..5ffa2e5 100644
> --- a/drivers/mmc/host/sdhci-cadence.c
> +++ b/drivers/mmc/host/sdhci-cadence.c
> @@ -25,7 +25,7 @@
>  #define   SDHCI_CDNS_HRS04_ACK			BIT(26)
>  #define   SDHCI_CDNS_HRS04_RD			BIT(25)
>  #define   SDHCI_CDNS_HRS04_WR			BIT(24)
> -#define   SDHCI_CDNS_HRS04_RDATA_SHIFT		12
> +#define   SDHCI_CDNS_HRS04_RDATA_SHIFT		16
>  #define   SDHCI_CDNS_HRS04_WDATA_SHIFT		8
>  #define   SDHCI_CDNS_HRS04_ADDR_SHIFT		0
>  
> 

[toc] | [prev] | [next] | [standalone]


#1581210

FromUlf Hansson <ulf.hansson@linaro.org>
Date2017-02-15 11:50 +0100
Message-ID<tb5jQ-7f2-11@gated-at.bofh.it>
In reply to#1580482
On 14 February 2017 at 12:05, Masahiro Yamada
<yamada.masahiro@socionext.com> wrote:
> This macro is currently unused, but it may be useful for debug use.
> Fix it just in case.
>
> Fixes: ff6af28faff5 ("mmc: sdhci-cadence: add Cadence SD4HC support")
> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
> ---
>
>  drivers/mmc/host/sdhci-cadence.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/mmc/host/sdhci-cadence.c b/drivers/mmc/host/sdhci-cadence.c
> index 4b0ecb9..5ffa2e5 100644
> --- a/drivers/mmc/host/sdhci-cadence.c
> +++ b/drivers/mmc/host/sdhci-cadence.c
> @@ -25,7 +25,7 @@
>  #define   SDHCI_CDNS_HRS04_ACK                 BIT(26)
>  #define   SDHCI_CDNS_HRS04_RD                  BIT(25)
>  #define   SDHCI_CDNS_HRS04_WR                  BIT(24)
> -#define   SDHCI_CDNS_HRS04_RDATA_SHIFT         12
> +#define   SDHCI_CDNS_HRS04_RDATA_SHIFT         16
>  #define   SDHCI_CDNS_HRS04_WDATA_SHIFT         8
>  #define   SDHCI_CDNS_HRS04_ADDR_SHIFT          0
>
> --
> 2.7.4
>

Thanks, applied for next!

Kind regards
Uffe

[toc] | [prev] | [standalone]


Back to top | Article view | linux.kernel


csiph-web