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Re: [PATCH] mmc: sdhci-cadence: fix bit shift of read data from PHY port

From Adrian Hunter <adrian.hunter@intel.com>
Newsgroups linux.kernel
Subject Re: [PATCH] mmc: sdhci-cadence: fix bit shift of read data from PHY port
Date 2017-02-14 12:40 +0100
Message-ID <taJCF-1jr-7@gated-at.bofh.it> (permalink)
References <taJ9D-186-13@gated-at.bofh.it>
Organization Intel Finland Oy, Registered Address: PL 281, 00181 Helsinki, Business Identity Code: 0357606 - 4, Domiciled in Helsinki

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On 14/02/17 13:05, Masahiro Yamada wrote:
> This macro is currently unused, but it may be useful for debug use.
> Fix it just in case.
> 
> Fixes: ff6af28faff5 ("mmc: sdhci-cadence: add Cadence SD4HC support")
> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

Acked-by: Adrian Hunter <adrian.hunter@intel.com>

> ---
> 
>  drivers/mmc/host/sdhci-cadence.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/mmc/host/sdhci-cadence.c b/drivers/mmc/host/sdhci-cadence.c
> index 4b0ecb9..5ffa2e5 100644
> --- a/drivers/mmc/host/sdhci-cadence.c
> +++ b/drivers/mmc/host/sdhci-cadence.c
> @@ -25,7 +25,7 @@
>  #define   SDHCI_CDNS_HRS04_ACK			BIT(26)
>  #define   SDHCI_CDNS_HRS04_RD			BIT(25)
>  #define   SDHCI_CDNS_HRS04_WR			BIT(24)
> -#define   SDHCI_CDNS_HRS04_RDATA_SHIFT		12
> +#define   SDHCI_CDNS_HRS04_RDATA_SHIFT		16
>  #define   SDHCI_CDNS_HRS04_WDATA_SHIFT		8
>  #define   SDHCI_CDNS_HRS04_ADDR_SHIFT		0
>  
> 

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Thread

[PATCH] mmc: sdhci-cadence: fix bit shift of read data from PHY port Masahiro Yamada <yamada.masahiro@socionext.com> - 2017-02-14 12:10 +0100
  Re: [PATCH] mmc: sdhci-cadence: fix bit shift of read data from PHY  port Adrian Hunter <adrian.hunter@intel.com> - 2017-02-14 12:40 +0100
  Re: [PATCH] mmc: sdhci-cadence: fix bit shift of read data from PHY port Ulf Hansson <ulf.hansson@linaro.org> - 2017-02-15 11:50 +0100

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