Groups | Search | Server Info | Keyboard shortcuts | Login | Register [http] [https] [nntp] [nntps]
Groups > linux.kernel > #1681500 > unrolled thread
| Started by | Peter Zijlstra <peterz@infradead.org> |
|---|---|
| First post | 2017-07-05 14:30 +0200 |
| Last post | 2017-07-05 18:20 +0200 |
| Articles | 2 — 2 participants |
Back to article view | Back to linux.kernel
This discussion starts older than the indexed window; earlier articles aren't shown. The article labeled Started by
below is the oldest one visible, not the original post.
Re: [PATCH v4 10/10] x86/mm: Try to preserve old TLB entries using PCID Peter Zijlstra <peterz@infradead.org> - 2017-07-05 14:30 +0200
Re: [PATCH v4 10/10] x86/mm: Try to preserve old TLB entries using PCID Andy Lutomirski <luto@kernel.org> - 2017-07-05 18:20 +0200
| From | Peter Zijlstra <peterz@infradead.org> |
|---|---|
| Date | 2017-07-05 14:30 +0200 |
| Subject | Re: [PATCH v4 10/10] x86/mm: Try to preserve old TLB entries using PCID |
| Message-ID | <tZRBo-6aJ-13@gated-at.bofh.it> |
On Thu, Jun 29, 2017 at 08:53:22AM -0700, Andy Lutomirski wrote:
> +static void choose_new_asid(struct mm_struct *next, u64 next_tlb_gen,
> + u16 *new_asid, bool *need_flush)
> +{
> + u16 asid;
> +
> + if (!static_cpu_has(X86_FEATURE_PCID)) {
> + *new_asid = 0;
> + *need_flush = true;
> + return;
> + }
> +
> + for (asid = 0; asid < TLB_NR_DYN_ASIDS; asid++) {
> + if (this_cpu_read(cpu_tlbstate.ctxs[asid].ctx_id) !=
> + next->context.ctx_id)
> + continue;
> +
> + *new_asid = asid;
> + *need_flush = (this_cpu_read(cpu_tlbstate.ctxs[asid].tlb_gen) <
> + next_tlb_gen);
> + return;
> + }
> +
> + /*
> + * We don't currently own an ASID slot on this CPU.
> + * Allocate a slot.
> + */
> + *new_asid = this_cpu_add_return(cpu_tlbstate.next_asid, 1) - 1;
So this basically RR the ASID slots. Have you tried slightly more
complex replacement policies like CLOCK ?
> + if (*new_asid >= TLB_NR_DYN_ASIDS) {
> + *new_asid = 0;
> + this_cpu_write(cpu_tlbstate.next_asid, 1);
> + }
> + *need_flush = true;
> +}
[toc] | [next] | [standalone]
| From | Andy Lutomirski <luto@kernel.org> |
|---|---|
| Date | 2017-07-05 18:20 +0200 |
| Subject | Re: [PATCH v4 10/10] x86/mm: Try to preserve old TLB entries using PCID |
| Message-ID | <tZVbY-77-19@gated-at.bofh.it> |
| In reply to | #1681500 |
On Wed, Jul 5, 2017 at 5:25 AM, Peter Zijlstra <peterz@infradead.org> wrote:
> On Thu, Jun 29, 2017 at 08:53:22AM -0700, Andy Lutomirski wrote:
>> +static void choose_new_asid(struct mm_struct *next, u64 next_tlb_gen,
>> + u16 *new_asid, bool *need_flush)
>> +{
>> + u16 asid;
>> +
>> + if (!static_cpu_has(X86_FEATURE_PCID)) {
>> + *new_asid = 0;
>> + *need_flush = true;
>> + return;
>> + }
>> +
>> + for (asid = 0; asid < TLB_NR_DYN_ASIDS; asid++) {
>> + if (this_cpu_read(cpu_tlbstate.ctxs[asid].ctx_id) !=
>> + next->context.ctx_id)
>> + continue;
>> +
>> + *new_asid = asid;
>> + *need_flush = (this_cpu_read(cpu_tlbstate.ctxs[asid].tlb_gen) <
>> + next_tlb_gen);
>> + return;
>> + }
>> +
>> + /*
>> + * We don't currently own an ASID slot on this CPU.
>> + * Allocate a slot.
>> + */
>> + *new_asid = this_cpu_add_return(cpu_tlbstate.next_asid, 1) - 1;
>
> So this basically RR the ASID slots. Have you tried slightly more
> complex replacement policies like CLOCK ?
No, mainly because I'm lazy and because CLOCK requires scavenging a
bit. (Which we can certainly do, but it will further complicate the
code.) It could be worth playing with better replacement algorithms
as a followup, though.
I've also considered a slight elaboration of RR in which we make sure
not to reuse the most recent ASID slot, which would guarantee that, if
we switch from task A to B and back to A, we don't flush on the way
back to A. (Currently, if B is not in the cache, there's a 1/6 chance
we'll flush on the way back.)
[toc] | [prev] | [standalone]
Back to top | Article view | linux.kernel
csiph-web