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| Started by | Zhi Mao <zhi.mao@mediatek.com> |
|---|---|
| First post | 2017-06-23 07:10 +0200 |
| Last post | 2017-06-27 05:00 +0200 |
| Articles | 3 — 2 participants |
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[PATCH v2 5/6] pwm: mediatek: add PWM_CLK_DIV_MAX Zhi Mao <zhi.mao@mediatek.com> - 2017-06-23 07:10 +0200
Re: [PATCH v2 5/6] pwm: mediatek: add PWM_CLK_DIV_MAX m18063 <Claudiu.Beznea@microchip.com> - 2017-06-26 10:50 +0200
Re: [PATCH v2 5/6] pwm: mediatek: add PWM_CLK_DIV_MAX Zhi Mao <zhi.mao@mediatek.com> - 2017-06-27 05:00 +0200
| From | Zhi Mao <zhi.mao@mediatek.com> |
|---|---|
| Date | 2017-06-23 07:10 +0200 |
| Subject | [PATCH v2 5/6] pwm: mediatek: add PWM_CLK_DIV_MAX |
| Message-ID | <tVp0Z-6lw-15@gated-at.bofh.it> |
Replace "7" with "PWM_CLK_DIV_MAX" in function:mtk_pwm_config()
to improve the code readablity.
Signed-off-by: Zhi Mao <zhi.mao@mediatek.com>
---
drivers/pwm/pwm-mediatek.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/pwm/pwm-mediatek.c b/drivers/pwm/pwm-mediatek.c
index 554a042..e5f6425 100644
--- a/drivers/pwm/pwm-mediatek.c
+++ b/drivers/pwm/pwm-mediatek.c
@@ -30,6 +30,8 @@
#define PWMDWIDTH 0x2c
#define PWMTHRES 0x30
+#define PWM_CLK_DIV_MAX 7
+
enum {
MTK_CLK_MAIN = 0,
MTK_CLK_TOP,
@@ -130,8 +132,10 @@ static int mtk_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
clkdiv++;
}
- if (clkdiv > 7)
+ if (clkdiv > PWM_CLK_DIV_MAX) {
+ dev_err(chip->dev, "period %d not supported\n", period_ns);
return -EINVAL;
+ }
mtk_pwm_writel(pc, pwm->hwpwm, PWMCON, BIT(15) | clkdiv);
mtk_pwm_writel(pc, pwm->hwpwm, PWMDWIDTH, period_ns / resolution);
--
1.7.9.5
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| From | m18063 <Claudiu.Beznea@microchip.com> |
|---|---|
| Date | 2017-06-26 10:50 +0200 |
| Message-ID | <tWxSy-8w1-19@gated-at.bofh.it> |
| In reply to | #1673252 |
On 23.06.2017 08:08, Zhi Mao wrote:
> Replace "7" with "PWM_CLK_DIV_MAX" in function:mtk_pwm_config()
> to improve the code readablity.
>
> Signed-off-by: Zhi Mao <zhi.mao@mediatek.com>
> ---
> drivers/pwm/pwm-mediatek.c | 6 +++++-
> 1 file changed, 5 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/pwm/pwm-mediatek.c b/drivers/pwm/pwm-mediatek.c
> index 554a042..e5f6425 100644
> --- a/drivers/pwm/pwm-mediatek.c
> +++ b/drivers/pwm/pwm-mediatek.c
> @@ -30,6 +30,8 @@
> #define PWMDWIDTH 0x2c
> #define PWMTHRES 0x30
>
> +#define PWM_CLK_DIV_MAX 7
> +
> enum {
> MTK_CLK_MAIN = 0,
> MTK_CLK_TOP,
> @@ -130,8 +132,10 @@ static int mtk_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
> clkdiv++;
> }
>
> - if (clkdiv > 7)
> + if (clkdiv > PWM_CLK_DIV_MAX) {
You forgot to:
mtk_pwm_clk_disable(chip, pwm);
> + dev_err(chip->dev, "period %d not supported\n", period_ns);
> return -EINVAL;
> + }
>
> mtk_pwm_writel(pc, pwm->hwpwm, PWMCON, BIT(15) | clkdiv);
> mtk_pwm_writel(pc, pwm->hwpwm, PWMDWIDTH, period_ns / resolution);
>
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| From | Zhi Mao <zhi.mao@mediatek.com> |
|---|---|
| Date | 2017-06-27 05:00 +0200 |
| Message-ID | <tWOTn-2Bi-5@gated-at.bofh.it> |
| In reply to | #1674533 |
On Mon, 2017-06-26 at 11:43 +0300, m18063 wrote:
>
> On 23.06.2017 08:08, Zhi Mao wrote:
> > Replace "7" with "PWM_CLK_DIV_MAX" in function:mtk_pwm_config()
> > to improve the code readablity.
> >
> > Signed-off-by: Zhi Mao <zhi.mao@mediatek.com>
> > ---
> > drivers/pwm/pwm-mediatek.c | 6 +++++-
> > 1 file changed, 5 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/pwm/pwm-mediatek.c b/drivers/pwm/pwm-mediatek.c
> > index 554a042..e5f6425 100644
> > --- a/drivers/pwm/pwm-mediatek.c
> > +++ b/drivers/pwm/pwm-mediatek.c
> > @@ -30,6 +30,8 @@
> > #define PWMDWIDTH 0x2c
> > #define PWMTHRES 0x30
> >
> > +#define PWM_CLK_DIV_MAX 7
> > +
> > enum {
> > MTK_CLK_MAIN = 0,
> > MTK_CLK_TOP,
> > @@ -130,8 +132,10 @@ static int mtk_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
> > clkdiv++;
> > }
> >
> > - if (clkdiv > 7)
> > + if (clkdiv > PWM_CLK_DIV_MAX) {
> You forgot to:
> mtk_pwm_clk_disable(chip, pwm);
Hi Claudiu,
Thanks for your suggestion.
It's a problem, I will modify this in the next release.
Regards,
Zhi
> > + dev_err(chip->dev, "period %d not supported\n", period_ns);
> > return -EINVAL;
> > + }
> >
> > mtk_pwm_writel(pc, pwm->hwpwm, PWMCON, BIT(15) | clkdiv);
> > mtk_pwm_writel(pc, pwm->hwpwm, PWMDWIDTH, period_ns / resolution);
> >
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