[PATCH v2 5/6] pwm: mediatek: add PWM_CLK_DIV_MAX

From	Zhi Mao <zhi.mao@mediatek.com>
Newsgroups	linux.kernel
Subject	[PATCH v2 5/6] pwm: mediatek: add PWM_CLK_DIV_MAX
Date	2017-06-23 07:10 +0200
Message-ID	<tVp0Z-6lw-15@gated-at.bofh.it> (permalink)
References	<tVp0Z-6lw-7@gated-at.bofh.it>
Organization	linux.* mail to news gateway

Show all headers | View raw

Replace "7" with "PWM_CLK_DIV_MAX" in function:mtk_pwm_config()
to improve the code readablity.

Signed-off-by: Zhi Mao <zhi.mao@mediatek.com>
---
 drivers/pwm/pwm-mediatek.c |    6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/pwm/pwm-mediatek.c b/drivers/pwm/pwm-mediatek.c
index 554a042..e5f6425 100644
--- a/drivers/pwm/pwm-mediatek.c
+++ b/drivers/pwm/pwm-mediatek.c
@@ -30,6 +30,8 @@
 #define PWMDWIDTH		0x2c
 #define PWMTHRES		0x30
 
+#define PWM_CLK_DIV_MAX		7
+
 enum {
 	MTK_CLK_MAIN = 0,
 	MTK_CLK_TOP,
@@ -130,8 +132,10 @@ static int mtk_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
 		clkdiv++;
 	}
 
-	if (clkdiv > 7)
+	if (clkdiv > PWM_CLK_DIV_MAX) {
+		dev_err(chip->dev, "period %d not supported\n", period_ns);
 		return -EINVAL;
+	}
 
 	mtk_pwm_writel(pc, pwm->hwpwm, PWMCON, BIT(15) | clkdiv);
 	mtk_pwm_writel(pc, pwm->hwpwm, PWMDWIDTH, period_ns / resolution);
-- 
1.7.9.5

Back to linux.kernel | Previous | Next — Next in thread | Find similar | Unroll thread

Thread

[PATCH v2 5/6] pwm: mediatek: add PWM_CLK_DIV_MAX Zhi Mao <zhi.mao@mediatek.com> - 2017-06-23 07:10 +0200
  Re: [PATCH v2 5/6] pwm: mediatek: add PWM_CLK_DIV_MAX m18063 <Claudiu.Beznea@microchip.com> - 2017-06-26 10:50 +0200
    Re: [PATCH v2 5/6] pwm: mediatek: add PWM_CLK_DIV_MAX Zhi Mao <zhi.mao@mediatek.com> - 2017-06-27 05:00 +0200

csiph-web