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Re: [PATCH 2/2] amd: uncore: Get correct number of cores sharing last level cache

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  Re: [PATCH 2/2] amd: uncore: Get correct number of cores sharing  last level cache Peter Zijlstra <peterz@infradead.org> - 2017-06-06 12:20 +0200
    Re: [PATCH 2/2] amd: uncore: Get correct number of cores sharing  last level cache Borislav Petkov <bp@alien8.de> - 2017-06-06 19:50 +0200

#1658578 — Re: [PATCH 2/2] amd: uncore: Get correct number of cores sharing last level cache

On Mon, Jun 05, 2017 at 11:13:19AM -0500, Janakarajan Natarajan wrote:
> +		/*
> +		 * Iterate over Cache Topology Definition leaves until no
> +		 * more cache descriptions are available
> +		 */
> +		while (1) {
> +			cpuid_count(0x8000001d, cache_level,
> +				    &eax, &ebx, &ecx, &edx);
> +			/*
> +			 * EAX[0:4] gives type of cache. 0 = No more caches
> +			 */
> +			if ((eax & 0x1f) == 0)
> +				break;
> +			cache_level++;
> +			prev_eax = eax;
> +		}
> +		nshared = ((prev_eax >> 14) & 0xfff) + 1;

Egads, could we pretty please write that in a less horrible fashion?

Maybe something like:

	for (cache_level = 0; cache_level < 3; cache_level++) {
		cpuid_count(0x8000001d, cache_level, &eax, &ebx, &ecx, &edx);

		if ((eax & 0x1f) == 0) /* EAX[0:4] gives cache type */
			break;

		prev_eax = eax;
	}

That way we'll not run off into the woods if CPUID goes funny (never
trust a BIOS/virt monkey).

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#1658984

On Tue, Jun 06, 2017 at 12:15:30PM +0200, Peter Zijlstra wrote:
> Maybe something like:
> 
> 	for (cache_level = 0; cache_level < 3; cache_level++) {
> 		cpuid_count(0x8000001d, cache_level, &eax, &ebx, &ecx, &edx);
> 
> 		if ((eax & 0x1f) == 0) /* EAX[0:4] gives cache type */

		if (!(eax & 0x1f))

> 			break;
> 
> 		prev_eax = eax;
> 	}
> 
> That way we'll not run off into the woods if CPUID goes funny (never
> trust a BIOS/virt monkey).

Yap, especially if there are CPUID functions with subleafs with holes in
them.

-- 
Regards/Gruss,
    Boris.

Good mailing practices for 400: avoid top-posting and trim the reply.

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