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| Started by | Chen-Yu Tsai <wens@csie.org> |
|---|---|
| First post | 2017-06-03 16:50 +0200 |
| Last post | 2017-06-05 16:00 +0200 |
| Articles | 4 — 2 participants |
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[PATCH 0/3] pinctrl: sun8i: Add support for A83T R_PIO Chen-Yu Tsai <wens@csie.org> - 2017-06-03 16:50 +0200
[PATCH 1/3] dt-bindings: pinctrl: sunxi: Add compatible string for A83T R_PIO Chen-Yu Tsai <wens@csie.org> - 2017-06-03 16:50 +0200
[PATCH 3/3] ARM: sun8i: a83t: Add device node for R_PIO Chen-Yu Tsai <wens@csie.org> - 2017-06-03 16:50 +0200
Re: [PATCH 0/3] pinctrl: sun8i: Add support for A83T R_PIO Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-06-05 16:00 +0200
| From | Chen-Yu Tsai <wens@csie.org> |
|---|---|
| Date | 2017-06-03 16:50 +0200 |
| Subject | [PATCH 0/3] pinctrl: sun8i: Add support for A83T R_PIO |
| Message-ID | <tOixk-8g5-9@gated-at.bofh.it> |
Hi, This series adds support for the R_PIO pin controller on the A83T. The pins managed this controller are mainly used for communicating with the PMIC and codec, and various GPIOs for enabling power switches for USB ports and WiFi. Patch 1 updates the sunxi pinctrl bindings. Patch 2 adds the pinctrl driver. Patch 3 adds a device node for the pin controller. Please have a look. Regards ChenYu Chen-Yu Tsai (3): dt-bindings: pinctrl: sunxi: Add compatible string for A83T R_PIO pinctrl: sunxi: Add support for A83T R_PIO ARM: sun8i: a83t: Add device node for R_PIO .../bindings/pinctrl/allwinner,sunxi-pinctrl.txt | 1 + arch/arm/boot/dts/sun8i-a83t.dtsi | 15 +++ drivers/pinctrl/sunxi/Kconfig | 4 + drivers/pinctrl/sunxi/Makefile | 1 + drivers/pinctrl/sunxi/pinctrl-sun8i-a83t-r.c | 128 +++++++++++++++++++++ 5 files changed, 149 insertions(+) create mode 100644 drivers/pinctrl/sunxi/pinctrl-sun8i-a83t-r.c -- 2.11.0
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| From | Chen-Yu Tsai <wens@csie.org> |
|---|---|
| Date | 2017-06-03 16:50 +0200 |
| Subject | [PATCH 1/3] dt-bindings: pinctrl: sunxi: Add compatible string for A83T R_PIO |
| Message-ID | <tOixk-8g5-13@gated-at.bofh.it> |
| In reply to | #1656846 |
The R_PIO on the A83T is almost the same as the one found on the A64, except that the CIR_RX function was moved from pin PL11 to pin PL12. Add a compatible string for it. Signed-off-by: Chen-Yu Tsai <wens@csie.org> --- Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt index 3ab9f7849a19..6f2ec9af0de2 100644 --- a/Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt +++ b/Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt @@ -20,6 +20,7 @@ Required properties: "allwinner,sun9i-a80-pinctrl" "allwinner,sun9i-a80-r-pinctrl" "allwinner,sun8i-a83t-pinctrl" + "allwinner,sun8i-a83t-r-pinctrl" "allwinner,sun8i-h3-pinctrl" "allwinner,sun8i-h3-r-pinctrl" "allwinner,sun8i-r40-pinctrl" -- 2.11.0
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| From | Chen-Yu Tsai <wens@csie.org> |
|---|---|
| Date | 2017-06-03 16:50 +0200 |
| Subject | [PATCH 3/3] ARM: sun8i: a83t: Add device node for R_PIO |
| Message-ID | <tOixk-8g5-19@gated-at.bofh.it> |
| In reply to | #1656846 |
The A83T has 1 pingroup with 13 pins belonging to the R_PIO
or special pin controller.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
index 49aeb56970ba..bf63e3b77572 100644
--- a/arch/arm/boot/dts/sun8i-a83t.dtsi
+++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
@@ -44,6 +44,8 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/clock/sun8i-r-ccu.h>
+
/ {
interrupt-parent = <&gic>;
#address-cells = <1>;
@@ -280,5 +282,18 @@
#clock-cells = <1>;
#reset-cells = <1>;
};
+
+ r_pio: pinctrl@1f02c00 {
+ compatible = "allwinner,sun8i-a83t-r-pinctrl";
+ reg = <0x01f02c00 0x400>;
+ interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&r_ccu CLK_APB0_PIO>, <&osc24M>,
+ <&osc16Md512>;
+ clock-names = "apb", "hosc", "losc";
+ gpio-controller;
+ #gpio-cells = <3>;
+ interrupt-controller;
+ #interrupt-cells = <3>;
+ };
};
};
--
2.11.0
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| From | Maxime Ripard <maxime.ripard@free-electrons.com> |
|---|---|
| Date | 2017-06-05 16:00 +0200 |
| Message-ID | <tP0I2-3zX-21@gated-at.bofh.it> |
| In reply to | #1656846 |
[Multipart message — attachments visible in raw view] — view raw
On Sat, Jun 03, 2017 at 10:44:24PM +0800, Chen-Yu Tsai wrote: > Hi, > > This series adds support for the R_PIO pin controller on the A83T. > The pins managed this controller are mainly used for communicating > with the PMIC and codec, and various GPIOs for enabling power switches > for USB ports and WiFi. > > Patch 1 updates the sunxi pinctrl bindings. > > Patch 2 adds the pinctrl driver. > > Patch 3 adds a device node for the pin controller. Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Maxime -- Maxime Ripard, Free Electrons Embedded Linux and Kernel engineering http://free-electrons.com
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