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Groups > linux.kernel > #1656850
| From | Chen-Yu Tsai <wens@csie.org> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | [PATCH 3/3] ARM: sun8i: a83t: Add device node for R_PIO |
| Date | 2017-06-03 16:50 +0200 |
| Message-ID | <tOixk-8g5-19@gated-at.bofh.it> (permalink) |
| References | <tOixk-8g5-9@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
The A83T has 1 pingroup with 13 pins belonging to the R_PIO
or special pin controller.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
index 49aeb56970ba..bf63e3b77572 100644
--- a/arch/arm/boot/dts/sun8i-a83t.dtsi
+++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
@@ -44,6 +44,8 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/clock/sun8i-r-ccu.h>
+
/ {
interrupt-parent = <&gic>;
#address-cells = <1>;
@@ -280,5 +282,18 @@
#clock-cells = <1>;
#reset-cells = <1>;
};
+
+ r_pio: pinctrl@1f02c00 {
+ compatible = "allwinner,sun8i-a83t-r-pinctrl";
+ reg = <0x01f02c00 0x400>;
+ interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&r_ccu CLK_APB0_PIO>, <&osc24M>,
+ <&osc16Md512>;
+ clock-names = "apb", "hosc", "losc";
+ gpio-controller;
+ #gpio-cells = <3>;
+ interrupt-controller;
+ #interrupt-cells = <3>;
+ };
};
};
--
2.11.0
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[PATCH 0/3] pinctrl: sun8i: Add support for A83T R_PIO Chen-Yu Tsai <wens@csie.org> - 2017-06-03 16:50 +0200 [PATCH 1/3] dt-bindings: pinctrl: sunxi: Add compatible string for A83T R_PIO Chen-Yu Tsai <wens@csie.org> - 2017-06-03 16:50 +0200 [PATCH 3/3] ARM: sun8i: a83t: Add device node for R_PIO Chen-Yu Tsai <wens@csie.org> - 2017-06-03 16:50 +0200 Re: [PATCH 0/3] pinctrl: sun8i: Add support for A83T R_PIO Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-06-05 16:00 +0200
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