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[PATCH v2 0/2] reset: Basic reset controller

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  [PATCH v2 0/2] reset: Basic reset controller Joel Stanley <joel@jms.id.au> - 2017-05-30 08:10 +0200
    [PATCH v2 1/2] dt-bindings: reset: Add bindings for basic reset controller Joel Stanley <joel@jms.id.au> - 2017-05-30 08:10 +0200

#1652823 — [PATCH v2 0/2] reset: Basic reset controller

Hello,

This is v2 of the basic reset controller, which addresses the points that
Philipp made. See the individual patches for changelogs. The original cover
letter follows:

In the Aspeed SoCs we have some reset registers spread out in various parts of
the soc: in the system controller IP, as well as other peripherals. I need to be
able to deassert those resets before other drivers work.

In writing a driver to do this I realised it was very generic. So instead I've
sent a generic driver that can be used by the device tree to clear reset lines
described by single bits in a register.

I've tested this driver on our SoC to release the UART reset.

Joel Stanley (2):
  dt-bindings: reset: Add bindings for basic reset controller
  reset: Add basic single-register reset driver

 .../devicetree/bindings/reset/reset-basic.txt      |  43 ++++++++
 drivers/reset/Kconfig                              |   7 ++
 drivers/reset/Makefile                             |   1 +
 drivers/reset/reset-basic.c                        | 113 +++++++++++++++++++++
 4 files changed, 164 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/reset/reset-basic.txt
 create mode 100644 drivers/reset/reset-basic.c

-- 
2.11.0

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#1652824 — [PATCH v2 1/2] dt-bindings: reset: Add bindings for basic reset controller

This adds the bindings documentation for a basic single-register reset
controller.

The bindings describe a single 32-bit register that contains up to 32
reset lines, each deasserted by clearing the appropriate bit in the
register. Optionally a property can be provided that changes this
behaviour to assert on clear.

Signed-off-by: Joel Stanley <joel@jms.id.au>

---
V2:
 Address review from Philipp:
 - add note about not auto clearing
 - add property for set to assert behaviour
 - use a decimal for the bit number

Signed-off-by: Joel Stanley <joel@jms.id.au>
---
 .../devicetree/bindings/reset/reset-basic.txt      | 43 ++++++++++++++++++++++
 1 file changed, 43 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/reset/reset-basic.txt

diff --git a/Documentation/devicetree/bindings/reset/reset-basic.txt b/Documentation/devicetree/bindings/reset/reset-basic.txt
new file mode 100644
index 000000000000..c19e5368be67
--- /dev/null
+++ b/Documentation/devicetree/bindings/reset/reset-basic.txt
@@ -0,0 +1,43 @@
+Basic single-register reset controller
+======================================
+
+This describes a generic reset controller where the reset lines are controlled
+by single bits within a 32-bit memory location. The memory location is assumed
+to be part of a syscon regmap.
+
+By default the bit will be cleared on deassert. This behaviour can be inverted
+with the assert-on-clear property mentioned below.
+
+The bits are assumed to not be auto-clearing, and therefore can be read back to
+determine the status.
+
+Reset controller required properties:
+ - compatible: should be "reset-basic"
+ - #reset-cells: must be set to 1
+ - reg: reset register location within regmap
+
+Reset controller optional properties:
+ - assert-on-clear: add this property when the hardware should clear (set to 0)
+   the bit should to assert the reset.
+   When this property is omitted the default is to set the bit to assert the
+   reset
+
+Device node required properties:
+ - resets phandle
+ - bit number, counting from zero, for the desired reset line. Max is 31.
+
+Example:
+
+syscon {
+	compatible = "syscon";
+
+	uart_reset: reset-controller@c {
+		compatible = "reset-basic";
+		#reset-cells = <1>;
+		reg = <0xc>;
+	};
+}
+
+&uart {
+	resets = <&uart_rest 4>;
+}
-- 
2.11.0

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