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Re: [v5 1/4] ACPICA: IORT: Add Cavium ThunderX2 SMMUv3 model definition.

Started by"Rafael J. Wysocki" <rjw@rjwysocki.net>
First post2017-05-11 02:40 +0200
Last post2017-05-11 16:50 +0200
Articles 3 — 2 participants

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  Re: [v5 1/4] ACPICA: IORT: Add Cavium ThunderX2 SMMUv3 model definition. "Rafael J. Wysocki" <rjw@rjwysocki.net> - 2017-05-11 02:40 +0200
    Re: [v5 1/4] ACPICA: IORT: Add Cavium ThunderX2 SMMUv3 model  definition. Will Deacon <will.deacon@arm.com> - 2017-05-11 10:50 +0200
      Re: [v5 1/4] ACPICA: IORT: Add Cavium ThunderX2 SMMUv3 model definition. "Rafael J. Wysocki" <rjw@rjwysocki.net> - 2017-05-11 16:50 +0200

#1639124 — Re: [v5 1/4] ACPICA: IORT: Add Cavium ThunderX2 SMMUv3 model definition.

From"Rafael J. Wysocki" <rjw@rjwysocki.net>
Date2017-05-11 02:40 +0200
SubjectRe: [v5 1/4] ACPICA: IORT: Add Cavium ThunderX2 SMMUv3 model definition.
Message-ID<tFKj7-7BT-1@gated-at.bofh.it>
On Wednesday, May 10, 2017 05:01:55 PM Geetha sowjanya wrote:
> From: Linu Cherian <linu.cherian@cavium.com>
> 
> Add SMMUv3 model definition for ThunderX2.
> 
> Signed-off-by: Linu Cherian <linu.cherian@cavium.com>
> Signed-off-by: Geetha Sowjanya <geethasowjanya.akula@cavium.com>

This is an ACPICA change, but you have not included the ACPICA maintainers
into your original CC list (added now).

Bob, Lv, how should this be routed?

Do you want to apply this patch upstream first or can we make this change in
Linux and upstream in parallel?  That shouldn't be a big deal, right?

> ---
>  include/acpi/actbl2.h | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/include/acpi/actbl2.h b/include/acpi/actbl2.h
> index faa9f2c..76a6f5d 100644
> --- a/include/acpi/actbl2.h
> +++ b/include/acpi/actbl2.h
> @@ -779,6 +779,8 @@ struct acpi_iort_smmu {
>  #define ACPI_IORT_SMMU_CORELINK_MMU400  0x00000002	/* ARM Corelink MMU-400 */
>  #define ACPI_IORT_SMMU_CORELINK_MMU500  0x00000003	/* ARM Corelink MMU-500 */
>  
> +#define ACPI_IORT_SMMU_V3_CAVIUM_CN99XX 0x00000002 /* Cavium ThunderX2 SMMUv3 */
> +
>  /* Masks for Flags field above */
>  
>  #define ACPI_IORT_SMMU_DVM_SUPPORTED    (1)
> 

Thanks,
Rafael

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#1639254 — Re: [v5 1/4] ACPICA: IORT: Add Cavium ThunderX2 SMMUv3 model definition.

FromWill Deacon <will.deacon@arm.com>
Date2017-05-11 10:50 +0200
SubjectRe: [v5 1/4] ACPICA: IORT: Add Cavium ThunderX2 SMMUv3 model definition.
Message-ID<tFRXj-44b-11@gated-at.bofh.it>
In reply to#1639124
On Thu, May 11, 2017 at 02:26:02AM +0200, Rafael J. Wysocki wrote:
> On Wednesday, May 10, 2017 05:01:55 PM Geetha sowjanya wrote:
> > From: Linu Cherian <linu.cherian@cavium.com>
> > 
> > Add SMMUv3 model definition for ThunderX2.
> > 
> > Signed-off-by: Linu Cherian <linu.cherian@cavium.com>
> > Signed-off-by: Geetha Sowjanya <geethasowjanya.akula@cavium.com>
> 
> This is an ACPICA change, but you have not included the ACPICA maintainers
> into your original CC list (added now).
> 
> Bob, Lv, how should this be routed?
> 
> Do you want to apply this patch upstream first or can we make this change in
> Linux and upstream in parallel?  That shouldn't be a big deal, right?

I think we're still waiting for the updated IORT document to be published (I
think this should be in the next week or so), so I don't think we should
commit the new ID before that happens.

Will

> > ---
> >  include/acpi/actbl2.h | 2 ++
> >  1 file changed, 2 insertions(+)
> > 
> > diff --git a/include/acpi/actbl2.h b/include/acpi/actbl2.h
> > index faa9f2c..76a6f5d 100644
> > --- a/include/acpi/actbl2.h
> > +++ b/include/acpi/actbl2.h
> > @@ -779,6 +779,8 @@ struct acpi_iort_smmu {
> >  #define ACPI_IORT_SMMU_CORELINK_MMU400  0x00000002	/* ARM Corelink MMU-400 */
> >  #define ACPI_IORT_SMMU_CORELINK_MMU500  0x00000003	/* ARM Corelink MMU-500 */
> >  
> > +#define ACPI_IORT_SMMU_V3_CAVIUM_CN99XX 0x00000002 /* Cavium ThunderX2 SMMUv3 */
> > +
> >  /* Masks for Flags field above */
> >  
> >  #define ACPI_IORT_SMMU_DVM_SUPPORTED    (1)
> > 
> 
> Thanks,
> Rafael
> 

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#1639628

From"Rafael J. Wysocki" <rjw@rjwysocki.net>
Date2017-05-11 16:50 +0200
Message-ID<tFXzH-7Av-1@gated-at.bofh.it>
In reply to#1639254
On Thursday, May 11, 2017 09:45:25 AM Will Deacon wrote:
> On Thu, May 11, 2017 at 02:26:02AM +0200, Rafael J. Wysocki wrote:
> > On Wednesday, May 10, 2017 05:01:55 PM Geetha sowjanya wrote:
> > > From: Linu Cherian <linu.cherian@cavium.com>
> > > 
> > > Add SMMUv3 model definition for ThunderX2.
> > > 
> > > Signed-off-by: Linu Cherian <linu.cherian@cavium.com>
> > > Signed-off-by: Geetha Sowjanya <geethasowjanya.akula@cavium.com>
> > 
> > This is an ACPICA change, but you have not included the ACPICA maintainers
> > into your original CC list (added now).
> > 
> > Bob, Lv, how should this be routed?
> > 
> > Do you want to apply this patch upstream first or can we make this change in
> > Linux and upstream in parallel?  That shouldn't be a big deal, right?
> 
> I think we're still waiting for the updated IORT document to be published (I
> think this should be in the next week or so), so I don't think we should
> commit the new ID before that happens.

OK, thanks for the heads-up.

I think it's better to submit the actbl2.h update directly to ACPICA
upstream when the doc is published and then work on top of that.

Thanks,
Rafael

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