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Groups > linux.kernel > #1575834 > unrolled thread

[PATCH 0/7] serial: exar: Fixes and cleanups

Started byJan Kiszka <jan.kiszka@siemens.com>
First post2017-02-07 17:20 +0100
Last post2017-02-07 23:50 +0100
Articles 12 — 2 participants

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Contents

  [PATCH 0/7] serial: exar: Fixes and cleanups Jan Kiszka <jan.kiszka@siemens.com> - 2017-02-07 17:20 +0100
    [PATCH 5/7] serial: pci: Remove unused pci_boards entries Jan Kiszka <jan.kiszka@siemens.com> - 2017-02-07 17:20 +0100
    [PATCH 7/7] serial: exar: Enable MSI support Jan Kiszka <jan.kiszka@siemens.com> - 2017-02-07 17:20 +0100
      Re: [PATCH 7/7] serial: exar: Enable MSI support Andy Shevchenko <andy.shevchenko@gmail.com> - 2017-02-08 00:30 +0100
    [PATCH 4/7] serial: exar: Move Commtech adapters to 8250_exar as well Jan Kiszka <jan.kiszka@siemens.com> - 2017-02-07 17:20 +0100
      Re: [PATCH 4/7] serial: exar: Move Commtech adapters to 8250_exar as well Andy Shevchenko <andy.shevchenko@gmail.com> - 2017-02-08 00:30 +0100
        Re: [PATCH 4/7] serial: exar: Move Commtech adapters to 8250_exar as  well Jan Kiszka <jan.kiszka@siemens.com> - 2017-02-08 08:10 +0100
    [PATCH 1/7] serial: exar: Fix mapping of port I/O resources Jan Kiszka <jan.kiszka@siemens.com> - 2017-02-07 17:20 +0100
      Re: [PATCH 1/7] serial: exar: Fix mapping of port I/O resources Andy Shevchenko <andy.shevchenko@gmail.com> - 2017-02-07 23:50 +0100
    [PATCH 6/7] serial: exar: Move register defines from uapi header to consumer site Jan Kiszka <jan.kiszka@siemens.com> - 2017-02-07 17:20 +0100
    [PATCH 3/7] serial: exar: Fix feature control register constants Jan Kiszka <jan.kiszka@siemens.com> - 2017-02-07 17:20 +0100
      Re: [PATCH 3/7] serial: exar: Fix feature control register constants Andy Shevchenko <andy.shevchenko@gmail.com> - 2017-02-07 23:50 +0100

#1575834 — [PATCH 0/7] serial: exar: Fixes and cleanups

FromJan Kiszka <jan.kiszka@siemens.com>
Date2017-02-07 17:20 +0100
Subject[PATCH 0/7] serial: exar: Fixes and cleanups
Message-ID<t8gEN-5ar-5@gated-at.bofh.it>
Fixes one fall-out from the exar split-up and two longer pending issue
regarding the correct initialization of exar registers ports > 0.
Furthermore, it moves remaining exar code over to the new module and
also cleans up & fixes some registers defines.

This includes the previously posted "Fix EXAR feature control register
constants".

Note that I have no chance to test the Commtech change on real hardware.

Jan

Jan Kiszka (7):
  serial: exar: Fix mapping of port I/O resources
  serial: exar: Fix initialization of EXAR registers for ports > 0
  serial: exar: Fix feature control register constants
  serial: exar: Move Commtech adapters to 8250_exar as well
  serial: pci: Remove unused pci_boards entries
  serial: exar: Move register defines from uapi header to consumer site
  serial: exar: Enable MSI support

 drivers/tty/serial/8250/8250_exar.c | 126 ++++++++++++++++++++++++++-----
 drivers/tty/serial/8250/8250_pci.c  | 147 ------------------------------------
 drivers/tty/serial/8250/8250_port.c |   6 ++
 include/uapi/linux/serial_reg.h     |  18 -----
 4 files changed, 115 insertions(+), 182 deletions(-)

-- 
2.1.4

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#1575837 — [PATCH 5/7] serial: pci: Remove unused pci_boards entries

FromJan Kiszka <jan.kiszka@siemens.com>
Date2017-02-07 17:20 +0100
Subject[PATCH 5/7] serial: pci: Remove unused pci_boards entries
Message-ID<t8gEN-5ar-11@gated-at.bofh.it>
In reply to#1575834
Became obsolete with the split-out of 8250_exar.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
---
 drivers/tty/serial/8250/8250_pci.c | 22 ----------------------
 1 file changed, 22 deletions(-)

diff --git a/drivers/tty/serial/8250/8250_pci.c b/drivers/tty/serial/8250/8250_pci.c
index 50cd1cf..d365a57 100644
--- a/drivers/tty/serial/8250/8250_pci.c
+++ b/drivers/tty/serial/8250/8250_pci.c
@@ -2498,10 +2498,6 @@ enum pci_board_num_t {
 	pbn_b0_2_1843200,
 	pbn_b0_4_1843200,
 
-	pbn_b0_2_1843200_200,
-	pbn_b0_4_1843200_200,
-	pbn_b0_8_1843200_200,
-
 	pbn_b0_1_4000000,
 
 	pbn_b0_bt_1_115200,
@@ -2716,24 +2712,6 @@ static struct pciserial_board pci_boards[] = {
 		.uart_offset	= 8,
 	},
 
-	[pbn_b0_2_1843200_200] = {
-		.flags		= FL_BASE0,
-		.num_ports	= 2,
-		.base_baud	= 1843200,
-		.uart_offset	= 0x200,
-	},
-	[pbn_b0_4_1843200_200] = {
-		.flags		= FL_BASE0,
-		.num_ports	= 4,
-		.base_baud	= 1843200,
-		.uart_offset	= 0x200,
-	},
-	[pbn_b0_8_1843200_200] = {
-		.flags		= FL_BASE0,
-		.num_ports	= 8,
-		.base_baud	= 1843200,
-		.uart_offset	= 0x200,
-	},
 	[pbn_b0_1_4000000] = {
 		.flags		= FL_BASE0,
 		.num_ports	= 1,
-- 
2.1.4

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#1575840 — [PATCH 7/7] serial: exar: Enable MSI support

FromJan Kiszka <jan.kiszka@siemens.com>
Date2017-02-07 17:20 +0100
Subject[PATCH 7/7] serial: exar: Enable MSI support
Message-ID<t8gEO-5ar-15@gated-at.bofh.it>
In reply to#1575834
Use pci_alloc_irq_vectors to enable MSI when available. At least the
XR17V352 supports this.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
---
 drivers/tty/serial/8250/8250_exar.c | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/drivers/tty/serial/8250/8250_exar.c b/drivers/tty/serial/8250/8250_exar.c
index 13cc1da..236de60 100644
--- a/drivers/tty/serial/8250/8250_exar.c
+++ b/drivers/tty/serial/8250/8250_exar.c
@@ -284,10 +284,16 @@ exar_pci_probe(struct pci_dev *pcidev, const struct pci_device_id *ent)
 
 	priv->board = board;
 
+	pci_set_master(pcidev);
+
+	rc = pci_alloc_irq_vectors(pcidev, 1, 1, PCI_IRQ_ALL_TYPES);
+	if (rc < 0)
+		return rc;
+
 	memset(&uart, 0, sizeof(uart));
 	uart.port.flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF | UPF_SHARE_IRQ
 			  | UPF_EXAR_EFR;
-	uart.port.irq = pcidev->irq;
+	uart.port.irq = pci_irq_vector(pcidev, 0);
 	uart.port.dev = &pcidev->dev;
 
 	for (i = 0; i < nr_ports && i < maxnr; i++) {
-- 
2.1.4

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#1576163 — Re: [PATCH 7/7] serial: exar: Enable MSI support

FromAndy Shevchenko <andy.shevchenko@gmail.com>
Date2017-02-08 00:30 +0100
SubjectRe: [PATCH 7/7] serial: exar: Enable MSI support
Message-ID<t8nmW-ST-13@gated-at.bofh.it>
In reply to#1575840
On Tue, Feb 7, 2017 at 6:10 PM, Jan Kiszka <jan.kiszka@siemens.com> wrote:
> Use pci_alloc_irq_vectors to enable MSI when available. At least the
> XR17V352 supports this.
>

FWIW:
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>

> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
> ---
>  drivers/tty/serial/8250/8250_exar.c | 8 +++++++-
>  1 file changed, 7 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/tty/serial/8250/8250_exar.c b/drivers/tty/serial/8250/8250_exar.c
> index 13cc1da..236de60 100644
> --- a/drivers/tty/serial/8250/8250_exar.c
> +++ b/drivers/tty/serial/8250/8250_exar.c
> @@ -284,10 +284,16 @@ exar_pci_probe(struct pci_dev *pcidev, const struct pci_device_id *ent)
>
>         priv->board = board;
>
> +       pci_set_master(pcidev);
> +
> +       rc = pci_alloc_irq_vectors(pcidev, 1, 1, PCI_IRQ_ALL_TYPES);
> +       if (rc < 0)
> +               return rc;
> +
>         memset(&uart, 0, sizeof(uart));
>         uart.port.flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF | UPF_SHARE_IRQ
>                           | UPF_EXAR_EFR;
> -       uart.port.irq = pcidev->irq;
> +       uart.port.irq = pci_irq_vector(pcidev, 0);
>         uart.port.dev = &pcidev->dev;
>
>         for (i = 0; i < nr_ports && i < maxnr; i++) {
> --
> 2.1.4
>



-- 
With Best Regards,
Andy Shevchenko

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#1575841 — [PATCH 4/7] serial: exar: Move Commtech adapters to 8250_exar as well

FromJan Kiszka <jan.kiszka@siemens.com>
Date2017-02-07 17:20 +0100
Subject[PATCH 4/7] serial: exar: Move Commtech adapters to 8250_exar as well
Message-ID<t8gEO-5ar-19@gated-at.bofh.it>
In reply to#1575834
Those are exar-based, too.

With the required refactoring of the code to fit into 8250_exar, we
automatically fix the same issue pci_xr17v35x_setup had before: 8XMODE,
FCTL, TXTRG and RXTRG were always only set for port 0. Now they are
initialized for the correct target port by using port.membase.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
---
 drivers/tty/serial/8250/8250_exar.c |  83 ++++++++++++++++++++++--
 drivers/tty/serial/8250/8250_pci.c  | 125 ------------------------------------
 2 files changed, 78 insertions(+), 130 deletions(-)

diff --git a/drivers/tty/serial/8250/8250_exar.c b/drivers/tty/serial/8250/8250_exar.c
index d3e3a7d..623b9d0 100644
--- a/drivers/tty/serial/8250/8250_exar.c
+++ b/drivers/tty/serial/8250/8250_exar.c
@@ -24,11 +24,15 @@
 
 #include "8250.h"
 
-#define PCI_DEVICE_ID_COMMTECH_4224PCIE	0x0020
-#define PCI_DEVICE_ID_COMMTECH_4228PCIE	0x0021
-#define PCI_DEVICE_ID_COMMTECH_4222PCIE	0x0022
-#define PCI_DEVICE_ID_EXAR_XR17V4358	0x4358
-#define PCI_DEVICE_ID_EXAR_XR17V8358	0x8358
+#define PCI_DEVICE_ID_COMMTECH_4222PCI335	0x0004
+#define PCI_DEVICE_ID_COMMTECH_4224PCI335	0x0002
+#define PCI_DEVICE_ID_COMMTECH_2324PCI335	0x000a
+#define PCI_DEVICE_ID_COMMTECH_2328PCI335	0x000b
+#define PCI_DEVICE_ID_COMMTECH_4224PCIE		0x0020
+#define PCI_DEVICE_ID_COMMTECH_4228PCIE		0x0021
+#define PCI_DEVICE_ID_COMMTECH_4222PCIE		0x0022
+#define PCI_DEVICE_ID_EXAR_XR17V4358		0x4358
+#define PCI_DEVICE_ID_EXAR_XR17V8358		0x8358
 
 #define UART_EXAR_MPIOINT_7_0	0x8f	/* MPIOINT[7:0] */
 #define UART_EXAR_MPIOLVL_7_0	0x90	/* MPIOLVL[7:0] */
@@ -84,6 +88,55 @@ static int default_setup(struct exar8250 *priv, struct pci_dev *pcidev,
 }
 
 static int
+pci_fastcom335_setup(struct exar8250 *priv, struct pci_dev *pcidev,
+		     struct uart_8250_port *port, int idx)
+{
+	unsigned int offset = idx * 0x200;
+	unsigned int baud = 1843200;
+	u8 __iomem *p;
+	int err;
+
+	port->port.flags |= UPF_EXAR_EFR;
+	port->port.uartclk = baud * 16;
+
+	err = default_setup(priv, pcidev, idx, offset, port);
+	if (err)
+		return err;
+
+	p = port->port.membase;
+
+	writeb(0x00, p + UART_EXAR_8XMODE);
+	writeb(UART_FCTR_EXAR_TRGD, p + UART_EXAR_FCTR);
+	writeb(32, p + UART_EXAR_TXTRG);
+	writeb(32, p + UART_EXAR_RXTRG);
+
+	/*
+	 * Setup Multipurpose Input/Output pins.
+	 */
+	if (idx == 0) {
+		switch (pcidev->device) {
+		case PCI_DEVICE_ID_COMMTECH_4222PCI335:
+		case PCI_DEVICE_ID_COMMTECH_4224PCI335:
+			writeb(0x78, p + UART_EXAR_MPIOLVL_7_0);
+			writeb(0x00, p + UART_EXAR_MPIOINV_7_0);
+			writeb(0x00, p + UART_EXAR_MPIOSEL_7_0);
+			break;
+		case PCI_DEVICE_ID_COMMTECH_2324PCI335:
+		case PCI_DEVICE_ID_COMMTECH_2328PCI335:
+			writeb(0x00, p + UART_EXAR_MPIOLVL_7_0);
+			writeb(0xc0, p + UART_EXAR_MPIOINV_7_0);
+			writeb(0xc0, p + UART_EXAR_MPIOSEL_7_0);
+			break;
+		}
+		writeb(0x00, p + UART_EXAR_MPIOINT_7_0);
+		writeb(0x00, p + UART_EXAR_MPIO3T_7_0);
+		writeb(0x00, p + UART_EXAR_MPIOOD_7_0);
+	}
+
+	return 0;
+}
+
+static int
 pci_connect_tech_setup(struct exar8250 *priv, struct pci_dev *pcidev,
 		       struct uart_8250_port *port, int idx)
 {
@@ -292,6 +345,21 @@ static int __maybe_unused exar_resume(struct device *dev)
 
 static SIMPLE_DEV_PM_OPS(exar_pci_pm, exar_suspend, exar_resume);
 
+static const struct exar8250_board pbn_fastcom335_2 = {
+	.num_ports	= 2,
+	.setup		= pci_fastcom335_setup,
+};
+
+static const struct exar8250_board pbn_fastcom335_4 = {
+	.num_ports	= 4,
+	.setup		= pci_fastcom335_setup,
+};
+
+static const struct exar8250_board pbn_fastcom335_8 = {
+	.num_ports	= 8,
+	.setup		= pci_fastcom335_setup,
+};
+
 static const struct exar8250_board pbn_connect = {
 	.setup		= pci_connect_tech_setup,
 };
@@ -376,6 +444,11 @@ static struct pci_device_id exar_pci_tbl[] = {
 	EXAR_DEVICE(COMMTECH, COMMTECH_4222PCIE, pbn_exar_XR17V35x),
 	EXAR_DEVICE(COMMTECH, COMMTECH_4224PCIE, pbn_exar_XR17V35x),
 	EXAR_DEVICE(COMMTECH, COMMTECH_4228PCIE, pbn_exar_XR17V35x),
+
+	EXAR_DEVICE(COMMTECH, COMMTECH_4222PCI335, pbn_fastcom335_2),
+	EXAR_DEVICE(COMMTECH, COMMTECH_4224PCI335, pbn_fastcom335_4),
+	EXAR_DEVICE(COMMTECH, COMMTECH_2324PCI335, pbn_fastcom335_4),
+	EXAR_DEVICE(COMMTECH, COMMTECH_2328PCI335, pbn_fastcom335_8),
 	{ 0, }
 };
 MODULE_DEVICE_TABLE(pci, exar_pci_tbl);
diff --git a/drivers/tty/serial/8250/8250_pci.c b/drivers/tty/serial/8250/8250_pci.c
index 0b63109..50cd1cf 100644
--- a/drivers/tty/serial/8250/8250_pci.c
+++ b/drivers/tty/serial/8250/8250_pci.c
@@ -1622,54 +1622,6 @@ static int pci_eg20t_init(struct pci_dev *dev)
 #define UART_EXAR_MPIOINV_15_8	0x98	/* MPIOINV[15:8] */
 #define UART_EXAR_MPIOSEL_15_8	0x99	/* MPIOSEL[15:8] */
 #define UART_EXAR_MPIOOD_15_8	0x9a	/* MPIOOD[15:8] */
-#define PCI_DEVICE_ID_COMMTECH_4222PCI335 0x0004
-#define PCI_DEVICE_ID_COMMTECH_4224PCI335 0x0002
-#define PCI_DEVICE_ID_COMMTECH_2324PCI335 0x000a
-#define PCI_DEVICE_ID_COMMTECH_2328PCI335 0x000b
-
-static int
-pci_fastcom335_setup(struct serial_private *priv,
-		  const struct pciserial_board *board,
-		  struct uart_8250_port *port, int idx)
-{
-	u8 __iomem *p;
-
-	p = pci_ioremap_bar(priv->dev, 0);
-	if (p == NULL)
-		return -ENOMEM;
-
-	port->port.flags |= UPF_EXAR_EFR;
-
-	/*
-	 * Setup Multipurpose Input/Output pins.
-	 */
-	if (idx == 0) {
-		switch (priv->dev->device) {
-		case PCI_DEVICE_ID_COMMTECH_4222PCI335:
-		case PCI_DEVICE_ID_COMMTECH_4224PCI335:
-			writeb(0x78, p + UART_EXAR_MPIOLVL_7_0);
-			writeb(0x00, p + UART_EXAR_MPIOINV_7_0);
-			writeb(0x00, p + UART_EXAR_MPIOSEL_7_0);
-			break;
-		case PCI_DEVICE_ID_COMMTECH_2324PCI335:
-		case PCI_DEVICE_ID_COMMTECH_2328PCI335:
-			writeb(0x00, p + UART_EXAR_MPIOLVL_7_0);
-			writeb(0xc0, p + UART_EXAR_MPIOINV_7_0);
-			writeb(0xc0, p + UART_EXAR_MPIOSEL_7_0);
-			break;
-		}
-		writeb(0x00, p + UART_EXAR_MPIOINT_7_0);
-		writeb(0x00, p + UART_EXAR_MPIO3T_7_0);
-		writeb(0x00, p + UART_EXAR_MPIOOD_7_0);
-	}
-	writeb(0x00, p + UART_EXAR_8XMODE);
-	writeb(UART_FCTR_EXAR_TRGD, p + UART_EXAR_FCTR);
-	writeb(32, p + UART_EXAR_TXTRG);
-	writeb(32, p + UART_EXAR_RXTRG);
-	iounmap(p);
-
-	return pci_default_setup(priv, board, port, idx);
-}
 
 static int
 pci_wch_ch353_setup(struct serial_private *priv,
@@ -2431,38 +2383,6 @@ static struct pci_serial_quirk pci_serial_quirks[] __refdata = {
 		.setup		= pci_asix_setup,
 	},
 	/*
-	 * Commtech, Inc. Fastcom adapters
-	 *
-	 */
-	{
-		.vendor = PCI_VENDOR_ID_COMMTECH,
-		.device = PCI_DEVICE_ID_COMMTECH_4222PCI335,
-		.subvendor	= PCI_ANY_ID,
-		.subdevice	= PCI_ANY_ID,
-		.setup		= pci_fastcom335_setup,
-	},
-	{
-		.vendor = PCI_VENDOR_ID_COMMTECH,
-		.device = PCI_DEVICE_ID_COMMTECH_4224PCI335,
-		.subvendor	= PCI_ANY_ID,
-		.subdevice	= PCI_ANY_ID,
-		.setup		= pci_fastcom335_setup,
-	},
-	{
-		.vendor = PCI_VENDOR_ID_COMMTECH,
-		.device = PCI_DEVICE_ID_COMMTECH_2324PCI335,
-		.subvendor	= PCI_ANY_ID,
-		.subdevice	= PCI_ANY_ID,
-		.setup		= pci_fastcom335_setup,
-	},
-	{
-		.vendor = PCI_VENDOR_ID_COMMTECH,
-		.device = PCI_DEVICE_ID_COMMTECH_2328PCI335,
-		.subvendor	= PCI_ANY_ID,
-		.subdevice	= PCI_ANY_ID,
-		.setup		= pci_fastcom335_setup,
-	},
-	/*
 	 * Broadcom TruManage (NetXtreme)
 	 */
 	{
@@ -2573,10 +2493,6 @@ enum pci_board_num_t {
 
 	pbn_b0_4_1152000,
 
-	pbn_b0_2_1152000_200,
-	pbn_b0_4_1152000_200,
-	pbn_b0_8_1152000_200,
-
 	pbn_b0_4_1250000,
 
 	pbn_b0_2_1843200,
@@ -2780,27 +2696,6 @@ static struct pciserial_board pci_boards[] = {
 		.uart_offset	= 8,
 	},
 
-	[pbn_b0_2_1152000_200] = {
-		.flags		= FL_BASE0,
-		.num_ports	= 2,
-		.base_baud	= 1152000,
-		.uart_offset	= 0x200,
-	},
-
-	[pbn_b0_4_1152000_200] = {
-		.flags		= FL_BASE0,
-		.num_ports	= 4,
-		.base_baud	= 1152000,
-		.uart_offset	= 0x200,
-	},
-
-	[pbn_b0_8_1152000_200] = {
-		.flags		= FL_BASE0,
-		.num_ports	= 8,
-		.base_baud	= 1152000,
-		.uart_offset	= 0x200,
-	},
-
 	[pbn_b0_4_1250000] = {
 		.flags		= FL_BASE0,
 		.num_ports	= 4,
@@ -5248,26 +5143,6 @@ static struct pci_device_id serial_pci_tbl[] = {
 		PCI_ANY_ID, PCI_ANY_ID,
 		0, 0, pbn_wch384_4 },
 
-	/*
-	 * Commtech, Inc. Fastcom adapters
-	 */
-	{	PCI_VENDOR_ID_COMMTECH, PCI_DEVICE_ID_COMMTECH_4222PCI335,
-		PCI_ANY_ID, PCI_ANY_ID,
-		0,
-		0, pbn_b0_2_1152000_200 },
-	{	PCI_VENDOR_ID_COMMTECH, PCI_DEVICE_ID_COMMTECH_4224PCI335,
-		PCI_ANY_ID, PCI_ANY_ID,
-		0,
-		0, pbn_b0_4_1152000_200 },
-	{	PCI_VENDOR_ID_COMMTECH, PCI_DEVICE_ID_COMMTECH_2324PCI335,
-		PCI_ANY_ID, PCI_ANY_ID,
-		0,
-		0, pbn_b0_4_1152000_200 },
-	{	PCI_VENDOR_ID_COMMTECH, PCI_DEVICE_ID_COMMTECH_2328PCI335,
-		PCI_ANY_ID, PCI_ANY_ID,
-		0,
-		0, pbn_b0_8_1152000_200 },
-
 	/* Fintek PCI serial cards */
 	{ PCI_DEVICE(0x1c29, 0x1104), .driver_data = pbn_fintek_4 },
 	{ PCI_DEVICE(0x1c29, 0x1108), .driver_data = pbn_fintek_8 },
-- 
2.1.4

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#1576165 — Re: [PATCH 4/7] serial: exar: Move Commtech adapters to 8250_exar as well

FromAndy Shevchenko <andy.shevchenko@gmail.com>
Date2017-02-08 00:30 +0100
SubjectRe: [PATCH 4/7] serial: exar: Move Commtech adapters to 8250_exar as well
Message-ID<t8nmW-ST-15@gated-at.bofh.it>
In reply to#1575841
On Tue, Feb 7, 2017 at 6:10 PM, Jan Kiszka <jan.kiszka@siemens.com> wrote:
> Those are exar-based, too.

Exar-based

> With the required refactoring of the code to fit into 8250_exar, we
> automatically fix the same issue pci_xr17v35x_setup had before: 8XMODE,
> FCTL, TXTRG and RXTRG were always only set for port 0. Now they are
> initialized for the correct target port by using port.membase.

My comments below.

> --- a/drivers/tty/serial/8250/8250_exar.c
> +++ b/drivers/tty/serial/8250/8250_exar.c
> @@ -24,11 +24,15 @@
>
>  #include "8250.h"
>
> -#define PCI_DEVICE_ID_COMMTECH_4224PCIE        0x0020
> -#define PCI_DEVICE_ID_COMMTECH_4228PCIE        0x0021
> -#define PCI_DEVICE_ID_COMMTECH_4222PCIE        0x0022
> -#define PCI_DEVICE_ID_EXAR_XR17V4358   0x4358
> -#define PCI_DEVICE_ID_EXAR_XR17V8358   0x8358

> +#define PCI_DEVICE_ID_COMMTECH_4222PCI335      0x0004
> +#define PCI_DEVICE_ID_COMMTECH_4224PCI335      0x0002

I think you assumed ID ordered list?

> +#define PCI_DEVICE_ID_COMMTECH_2324PCI335      0x000a
> +#define PCI_DEVICE_ID_COMMTECH_2328PCI335      0x000b
> +#define PCI_DEVICE_ID_COMMTECH_4224PCIE                0x0020
> +#define PCI_DEVICE_ID_COMMTECH_4228PCIE                0x0021
> +#define PCI_DEVICE_ID_COMMTECH_4222PCIE                0x0022
> +#define PCI_DEVICE_ID_EXAR_XR17V4358           0x4358
> +#define PCI_DEVICE_ID_EXAR_XR17V8358           0x8358

> @@ -292,6 +345,21 @@ static int __maybe_unused exar_resume(struct device *dev)

> +static const struct exar8250_board pbn_fastcom335_2 = {
> +       .num_ports      = 2,
> +       .setup          = pci_fastcom335_setup,
> +};
> +
> +static const struct exar8250_board pbn_fastcom335_4 = {
> +       .num_ports      = 4,
> +       .setup          = pci_fastcom335_setup,
> +};
> +
> +static const struct exar8250_board pbn_fastcom335_8 = {
> +       .num_ports      = 8,
> +       .setup          = pci_fastcom335_setup,
> +};

> --- a/drivers/tty/serial/8250/8250_pci.c
> +++ b/drivers/tty/serial/8250/8250_pci.c
> @@ -1622,54 +1622,6 @@ static int pci_eg20t_init(struct pci_dev *dev)
>  #define UART_EXAR_MPIOINV_15_8 0x98    /* MPIOINV[15:8] */
>  #define UART_EXAR_MPIOSEL_15_8 0x99    /* MPIOSEL[15:8] */
>  #define UART_EXAR_MPIOOD_15_8  0x9a    /* MPIOOD[15:8] */

And why not to remove above constants?

> -       /*
> -        * Commtech, Inc. Fastcom adapters
> -        */
> -       {       PCI_VENDOR_ID_COMMTECH, PCI_DEVICE_ID_COMMTECH_4222PCI335,
> -               PCI_ANY_ID, PCI_ANY_ID,
> -               0,
> -               0, pbn_b0_2_1152000_200 },
> -       {       PCI_VENDOR_ID_COMMTECH, PCI_DEVICE_ID_COMMTECH_4224PCI335,
> -               PCI_ANY_ID, PCI_ANY_ID,
> -               0,
> -               0, pbn_b0_4_1152000_200 },
> -       {       PCI_VENDOR_ID_COMMTECH, PCI_DEVICE_ID_COMMTECH_2324PCI335,
> -               PCI_ANY_ID, PCI_ANY_ID,
> -               0,
> -               0, pbn_b0_4_1152000_200 },
> -       {       PCI_VENDOR_ID_COMMTECH, PCI_DEVICE_ID_COMMTECH_2328PCI335,
> -               PCI_ANY_ID, PCI_ANY_ID,
> -               0,
> -               0, pbn_b0_8_1152000_200 },
> -

Check black list as well. I suppose now there is a bug and it's left
even after this patch.

-- 
With Best Regards,
Andy Shevchenko

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#1576307 — Re: [PATCH 4/7] serial: exar: Move Commtech adapters to 8250_exar as well

FromJan Kiszka <jan.kiszka@siemens.com>
Date2017-02-08 08:10 +0100
SubjectRe: [PATCH 4/7] serial: exar: Move Commtech adapters to 8250_exar as well
Message-ID<t8uy6-5F3-17@gated-at.bofh.it>
In reply to#1576165
On 2017-02-08 00:23, Andy Shevchenko wrote:
> On Tue, Feb 7, 2017 at 6:10 PM, Jan Kiszka <jan.kiszka@siemens.com> wrote:
>> Those are exar-based, too.
> 
> Exar-based
> 
>> With the required refactoring of the code to fit into 8250_exar, we
>> automatically fix the same issue pci_xr17v35x_setup had before: 8XMODE,
>> FCTL, TXTRG and RXTRG were always only set for port 0. Now they are
>> initialized for the correct target port by using port.membase.
> 
> My comments below.
> 
>> --- a/drivers/tty/serial/8250/8250_exar.c
>> +++ b/drivers/tty/serial/8250/8250_exar.c
>> @@ -24,11 +24,15 @@
>>
>>  #include "8250.h"
>>
>> -#define PCI_DEVICE_ID_COMMTECH_4224PCIE        0x0020
>> -#define PCI_DEVICE_ID_COMMTECH_4228PCIE        0x0021
>> -#define PCI_DEVICE_ID_COMMTECH_4222PCIE        0x0022
>> -#define PCI_DEVICE_ID_EXAR_XR17V4358   0x4358
>> -#define PCI_DEVICE_ID_EXAR_XR17V8358   0x8358
> 
>> +#define PCI_DEVICE_ID_COMMTECH_4222PCI335      0x0004
>> +#define PCI_DEVICE_ID_COMMTECH_4224PCI335      0x0002
> 
> I think you assumed ID ordered list?

Yeah, will reorder at this chance.

> 
>> +#define PCI_DEVICE_ID_COMMTECH_2324PCI335      0x000a
>> +#define PCI_DEVICE_ID_COMMTECH_2328PCI335      0x000b
>> +#define PCI_DEVICE_ID_COMMTECH_4224PCIE                0x0020
>> +#define PCI_DEVICE_ID_COMMTECH_4228PCIE                0x0021
>> +#define PCI_DEVICE_ID_COMMTECH_4222PCIE                0x0022
>> +#define PCI_DEVICE_ID_EXAR_XR17V4358           0x4358
>> +#define PCI_DEVICE_ID_EXAR_XR17V8358           0x8358
> 
>> @@ -292,6 +345,21 @@ static int __maybe_unused exar_resume(struct device *dev)
> 
>> +static const struct exar8250_board pbn_fastcom335_2 = {
>> +       .num_ports      = 2,
>> +       .setup          = pci_fastcom335_setup,
>> +};
>> +
>> +static const struct exar8250_board pbn_fastcom335_4 = {
>> +       .num_ports      = 4,
>> +       .setup          = pci_fastcom335_setup,
>> +};
>> +
>> +static const struct exar8250_board pbn_fastcom335_8 = {
>> +       .num_ports      = 8,
>> +       .setup          = pci_fastcom335_setup,
>> +};
> 
>> --- a/drivers/tty/serial/8250/8250_pci.c
>> +++ b/drivers/tty/serial/8250/8250_pci.c
>> @@ -1622,54 +1622,6 @@ static int pci_eg20t_init(struct pci_dev *dev)
>>  #define UART_EXAR_MPIOINV_15_8 0x98    /* MPIOINV[15:8] */
>>  #define UART_EXAR_MPIOSEL_15_8 0x99    /* MPIOSEL[15:8] */
>>  #define UART_EXAR_MPIOOD_15_8  0x9a    /* MPIOOD[15:8] */
> 
> And why not to remove above constants?

Forgotten, will remove.

> 
>> -       /*
>> -        * Commtech, Inc. Fastcom adapters
>> -        */
>> -       {       PCI_VENDOR_ID_COMMTECH, PCI_DEVICE_ID_COMMTECH_4222PCI335,
>> -               PCI_ANY_ID, PCI_ANY_ID,
>> -               0,
>> -               0, pbn_b0_2_1152000_200 },
>> -       {       PCI_VENDOR_ID_COMMTECH, PCI_DEVICE_ID_COMMTECH_4224PCI335,
>> -               PCI_ANY_ID, PCI_ANY_ID,
>> -               0,
>> -               0, pbn_b0_4_1152000_200 },
>> -       {       PCI_VENDOR_ID_COMMTECH, PCI_DEVICE_ID_COMMTECH_2324PCI335,
>> -               PCI_ANY_ID, PCI_ANY_ID,
>> -               0,
>> -               0, pbn_b0_4_1152000_200 },
>> -       {       PCI_VENDOR_ID_COMMTECH, PCI_DEVICE_ID_COMMTECH_2328PCI335,
>> -               PCI_ANY_ID, PCI_ANY_ID,
>> -               0,
>> -               0, pbn_b0_8_1152000_200 },
>> -
> 
> Check black list as well. I suppose now there is a bug and it's left
> even after this patch.
> 

Yeah, it lacks PCI_VENDOR_ID_COMMTECH... will send an update.

Jan

-- 
Siemens AG, Corporate Technology, CT RDA ITP SES-DE
Corporate Competence Center Embedded Linux

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#1575845 — [PATCH 1/7] serial: exar: Fix mapping of port I/O resources

FromJan Kiszka <jan.kiszka@siemens.com>
Date2017-02-07 17:20 +0100
Subject[PATCH 1/7] serial: exar: Fix mapping of port I/O resources
Message-ID<t8gEO-5ar-37@gated-at.bofh.it>
In reply to#1575834
pcim_iomap_table only returns the table of mapping, it does not perform
them. For that, we need to call pcim_iomap, but only if that mapping was
not done before.

Fixes: d0aeaa83f0b0 ("serial: exar: split out the exar code from 8250_pci")
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
---
 drivers/tty/serial/8250/8250_exar.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/tty/serial/8250/8250_exar.c b/drivers/tty/serial/8250/8250_exar.c
index e6b44a7..58469d9 100644
--- a/drivers/tty/serial/8250/8250_exar.c
+++ b/drivers/tty/serial/8250/8250_exar.c
@@ -72,6 +72,9 @@ static int default_setup(struct exar8250 *priv, struct pci_dev *pcidev,
 	const struct exar8250_board *board = priv->board;
 	unsigned int bar = 0;
 
+	if (!pcim_iomap_table(pcidev)[bar] && !pcim_iomap(pcidev, bar, 0))
+		return -ENOMEM;
+
 	port->port.iotype = UPIO_MEM;
 	port->port.mapbase = pci_resource_start(pcidev, bar) + offset;
 	port->port.membase = pcim_iomap_table(pcidev)[bar] + offset;
-- 
2.1.4

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#1576139 — Re: [PATCH 1/7] serial: exar: Fix mapping of port I/O resources

FromAndy Shevchenko <andy.shevchenko@gmail.com>
Date2017-02-07 23:50 +0100
SubjectRe: [PATCH 1/7] serial: exar: Fix mapping of port I/O resources
Message-ID<t8mKf-q3-35@gated-at.bofh.it>
In reply to#1575845
On Tue, Feb 7, 2017 at 6:09 PM, Jan Kiszka <jan.kiszka@siemens.com> wrote:
> pcim_iomap_table only returns the table of mapping, it does not perform
> them. For that, we need to call pcim_iomap, but only if that mapping was
> not done before.

Basically by this change you answered to one of my question during review.

FWIW:
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>

> Fixes: d0aeaa83f0b0 ("serial: exar: split out the exar code from 8250_pci")
> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
> ---
>  drivers/tty/serial/8250/8250_exar.c | 3 +++
>  1 file changed, 3 insertions(+)
>
> diff --git a/drivers/tty/serial/8250/8250_exar.c b/drivers/tty/serial/8250/8250_exar.c
> index e6b44a7..58469d9 100644
> --- a/drivers/tty/serial/8250/8250_exar.c
> +++ b/drivers/tty/serial/8250/8250_exar.c
> @@ -72,6 +72,9 @@ static int default_setup(struct exar8250 *priv, struct pci_dev *pcidev,
>         const struct exar8250_board *board = priv->board;
>         unsigned int bar = 0;
>
> +       if (!pcim_iomap_table(pcidev)[bar] && !pcim_iomap(pcidev, bar, 0))
> +               return -ENOMEM;
> +
>         port->port.iotype = UPIO_MEM;
>         port->port.mapbase = pci_resource_start(pcidev, bar) + offset;
>         port->port.membase = pcim_iomap_table(pcidev)[bar] + offset;
> --
> 2.1.4
>



-- 
With Best Regards,
Andy Shevchenko

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#1575846 — [PATCH 6/7] serial: exar: Move register defines from uapi header to consumer site

FromJan Kiszka <jan.kiszka@siemens.com>
Date2017-02-07 17:20 +0100
Subject[PATCH 6/7] serial: exar: Move register defines from uapi header to consumer site
Message-ID<t8gEP-5ar-41@gated-at.bofh.it>
In reply to#1575834
None of these registers is relevant for the userspace API.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
---
 drivers/tty/serial/8250/8250_exar.c | 13 +++++++++++++
 drivers/tty/serial/8250/8250_port.c |  6 ++++++
 include/uapi/linux/serial_reg.h     | 18 ------------------
 3 files changed, 19 insertions(+), 18 deletions(-)

diff --git a/drivers/tty/serial/8250/8250_exar.c b/drivers/tty/serial/8250/8250_exar.c
index 623b9d0..13cc1da 100644
--- a/drivers/tty/serial/8250/8250_exar.c
+++ b/drivers/tty/serial/8250/8250_exar.c
@@ -34,6 +34,19 @@
 #define PCI_DEVICE_ID_EXAR_XR17V4358		0x4358
 #define PCI_DEVICE_ID_EXAR_XR17V8358		0x8358
 
+#define UART_EXAR_8XMODE	0x88	/* 8X sampling rate select */
+
+#define UART_EXAR_FCTR		0x08	/* Feature Control Register */
+#define UART_FCTR_EXAR_IRDA	0x10	/* IrDa data encode select */
+#define UART_FCTR_EXAR_485	0x20	/* Auto 485 half duplex dir ctl */
+#define UART_FCTR_EXAR_TRGA	0x00	/* FIFO trigger table A */
+#define UART_FCTR_EXAR_TRGB	0x60	/* FIFO trigger table B */
+#define UART_FCTR_EXAR_TRGC	0x80	/* FIFO trigger table C */
+#define UART_FCTR_EXAR_TRGD	0xc0	/* FIFO trigger table D programmable */
+
+#define UART_EXAR_TXTRG		0x0a	/* Tx FIFO trigger level write-only */
+#define UART_EXAR_RXTRG		0x0b	/* Rx FIFO trigger level write-only */
+
 #define UART_EXAR_MPIOINT_7_0	0x8f	/* MPIOINT[7:0] */
 #define UART_EXAR_MPIOLVL_7_0	0x90	/* MPIOLVL[7:0] */
 #define UART_EXAR_MPIO3T_7_0	0x91	/* MPIO3T[7:0] */
diff --git a/drivers/tty/serial/8250/8250_port.c b/drivers/tty/serial/8250/8250_port.c
index ec6b5e3..6119516 100644
--- a/drivers/tty/serial/8250/8250_port.c
+++ b/drivers/tty/serial/8250/8250_port.c
@@ -45,6 +45,12 @@
 #include "8250.h"
 
 /*
+ * These are definitions for the Exar XR17V35X and XR17(C|D)15X
+ */
+#define UART_EXAR_SLEEP		0x8b	/* Sleep mode */
+#define UART_EXAR_DVID		0x8d	/* Device identification */
+
+/*
  * Debugging.
  */
 #if 0
diff --git a/include/uapi/linux/serial_reg.h b/include/uapi/linux/serial_reg.h
index 25b93a7..5db7688 100644
--- a/include/uapi/linux/serial_reg.h
+++ b/include/uapi/linux/serial_reg.h
@@ -367,24 +367,6 @@
 #define UART_OMAP_MDR1_DISABLE		0x07	/* Disable (default state) */
 
 /*
- * These are definitions for the Exar XR17V35X and XR17(C|D)15X
- */
-#define UART_EXAR_8XMODE	0x88	/* 8X sampling rate select */
-#define UART_EXAR_SLEEP		0x8b	/* Sleep mode */
-#define UART_EXAR_DVID		0x8d	/* Device identification */
-
-#define UART_EXAR_FCTR		0x08	/* Feature Control Register */
-#define UART_FCTR_EXAR_IRDA	0x10	/* IrDa data encode select */
-#define UART_FCTR_EXAR_485	0x20	/* Auto 485 half duplex dir ctl */
-#define UART_FCTR_EXAR_TRGA	0x00	/* FIFO trigger table A */
-#define UART_FCTR_EXAR_TRGB	0x60	/* FIFO trigger table B */
-#define UART_FCTR_EXAR_TRGC	0x80	/* FIFO trigger table C */
-#define UART_FCTR_EXAR_TRGD	0xc0	/* FIFO trigger table D programmable */
-
-#define UART_EXAR_TXTRG		0x0a	/* Tx FIFO trigger level write-only */
-#define UART_EXAR_RXTRG		0x0b	/* Rx FIFO trigger level write-only */
-
-/*
  * These are definitions for the Altera ALTR_16550_F32/F64/F128
  * Normalized from 0x100 to 0x40 because of shift by 2 (32 bit regs).
  */
-- 
2.1.4

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#1575849 — [PATCH 3/7] serial: exar: Fix feature control register constants

FromJan Kiszka <jan.kiszka@siemens.com>
Date2017-02-07 17:20 +0100
Subject[PATCH 3/7] serial: exar: Fix feature control register constants
Message-ID<t8gEO-5ar-31@gated-at.bofh.it>
In reply to#1575834
According to the XR17V352 manual, bit 4 is IrDA control and bit 5 for
485. Fortunately, no driver used them so far.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
---
 include/uapi/linux/serial_reg.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/include/uapi/linux/serial_reg.h b/include/uapi/linux/serial_reg.h
index 274d8fc..25b93a7 100644
--- a/include/uapi/linux/serial_reg.h
+++ b/include/uapi/linux/serial_reg.h
@@ -374,8 +374,8 @@
 #define UART_EXAR_DVID		0x8d	/* Device identification */
 
 #define UART_EXAR_FCTR		0x08	/* Feature Control Register */
-#define UART_FCTR_EXAR_IRDA	0x08	/* IrDa data encode select */
-#define UART_FCTR_EXAR_485	0x10	/* Auto 485 half duplex dir ctl */
+#define UART_FCTR_EXAR_IRDA	0x10	/* IrDa data encode select */
+#define UART_FCTR_EXAR_485	0x20	/* Auto 485 half duplex dir ctl */
 #define UART_FCTR_EXAR_TRGA	0x00	/* FIFO trigger table A */
 #define UART_FCTR_EXAR_TRGB	0x60	/* FIFO trigger table B */
 #define UART_FCTR_EXAR_TRGC	0x80	/* FIFO trigger table C */
-- 
2.1.4

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#1576134 — Re: [PATCH 3/7] serial: exar: Fix feature control register constants

FromAndy Shevchenko <andy.shevchenko@gmail.com>
Date2017-02-07 23:50 +0100
SubjectRe: [PATCH 3/7] serial: exar: Fix feature control register constants
Message-ID<t8mKe-q3-11@gated-at.bofh.it>
In reply to#1575849
On Tue, Feb 7, 2017 at 6:10 PM, Jan Kiszka <jan.kiszka@siemens.com> wrote:
> According to the XR17V352 manual, bit 4 is IrDA control and bit 5 for
> 485. Fortunately, no driver used them so far.

RS-485

>

FWIW:
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>

> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
> ---
>  include/uapi/linux/serial_reg.h | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/include/uapi/linux/serial_reg.h b/include/uapi/linux/serial_reg.h
> index 274d8fc..25b93a7 100644
> --- a/include/uapi/linux/serial_reg.h
> +++ b/include/uapi/linux/serial_reg.h
> @@ -374,8 +374,8 @@
>  #define UART_EXAR_DVID         0x8d    /* Device identification */
>
>  #define UART_EXAR_FCTR         0x08    /* Feature Control Register */
> -#define UART_FCTR_EXAR_IRDA    0x08    /* IrDa data encode select */
> -#define UART_FCTR_EXAR_485     0x10    /* Auto 485 half duplex dir ctl */
> +#define UART_FCTR_EXAR_IRDA    0x10    /* IrDa data encode select */
> +#define UART_FCTR_EXAR_485     0x20    /* Auto 485 half duplex dir ctl */
>  #define UART_FCTR_EXAR_TRGA    0x00    /* FIFO trigger table A */
>  #define UART_FCTR_EXAR_TRGB    0x60    /* FIFO trigger table B */
>  #define UART_FCTR_EXAR_TRGC    0x80    /* FIFO trigger table C */
> --
> 2.1.4
>



-- 
With Best Regards,
Andy Shevchenko

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