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Re: [PATCH v3] gpio: aspeed: Add banks Y, Z, AA, AB and AC

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  Re: [PATCH v3] gpio: aspeed: Add banks Y, Z, AA, AB and AC Linus Walleij <linus.walleij@linaro.org> - 2017-01-31 16:00 +0100
    Re: [PATCH v3] gpio: aspeed: Add banks Y, Z, AA, AB and AC Andrew Jeffery <andrew@aj.id.au> - 2017-02-01 02:00 +0100
      Re: [PATCH v3] gpio: aspeed: Add banks Y, Z, AA, AB and AC Andrew Jeffery <andrew@aj.id.au> - 2017-02-01 02:30 +0100
        Re: [PATCH v3] gpio: aspeed: Add banks Y, Z, AA, AB and AC Linus Walleij <linus.walleij@linaro.org> - 2017-02-01 16:00 +0100

#1570808 — Re: [PATCH v3] gpio: aspeed: Add banks Y, Z, AA, AB and AC

On Fri, Jan 27, 2017 at 5:24 AM, Andrew Jeffery <andrew@aj.id.au> wrote:

> This is less straight-forward than one would hope, as some banks only
> have 4 pins rather than 8, others are output only, yet more (W and
> X, already supported) are input-only, and in the case of the g4 SoC bank
> AC doesn't exist.
>
> Add some structs to describe the varying properties of different banks
> and integrate mechanisms to deny requests for unsupported
> configurations.
>
> Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
> ---
>
> Since v2:

Patch applied with some patch -p1 < fuzz
please check the result.

Yours,
Linus Walleij

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#1571229

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On Tue, 2017-01-31 at 15:50 +0100, Linus Walleij wrote:
> > On Fri, Jan 27, 2017 at 5:24 AM, Andrew Jeffery <andrew@aj.id.au> wrote:
> 
> > This is less straight-forward than one would hope, as some banks only
> > have 4 pins rather than 8, others are output only, yet more (W and
> > X, already supported) are input-only, and in the case of the g4 SoC bank
> > AC doesn't exist.
> > 
> > Add some structs to describe the varying properties of different banks
> > and integrate mechanisms to deny requests for unsupported
> > configurations.
> > 
> > > > Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
> > ---
> > 
> > Since v2:
> 
> Patch applied with some patch -p1 < fuzz
> please check the result.

Have you pushed the tree with the fuzzy patch applied? I can't find it.
I fetched the gpio (and pinctrl) trees just now, but all I'm seeing is:

    $ git log --all --author "Andrew Jeffery" --committer "Linus Walleij" --grep "AA, AB" --oneline
    1736f75d35e4 gpio: aspeed: Add banks Y, Z, AA, AB and AC
    8ccb6dc6e999 pinctrl: aspeed: g4: Fix mux configuration for GPIOs AA[4-7], AB[0-7]

and 

    $ git show --stat --pretty=fuller 1736f75d35e4
    commit 1736f75d35e47409ad776273133d0f558a4c8253
    Author:     Andrew Jeffery <    andrew@aj.id.au    >
    AuthorDate: Tue Jan 24 16:46:46 2017 +1030
    Commit:     Linus Walleij <    linus.walleij@linaro.org    >
    CommitDate: Thu Jan 26 14:45:43 2017 +0100

v3 wasn't sent until Friday the 27th, and the diff of 1736f75d35e4
still drags in <linux/gpio.h> which v3 removes.

Regardless, I'll try to recreate it myself and inspect the fuzz damage.

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#1571236

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On Wed, 2017-02-01 at 11:22 +1030, Andrew Jeffery wrote:
> On Tue, 2017-01-31 at 15:50 +0100, Linus Walleij wrote:
> > > > > > On Fri, Jan 27, 2017 at 5:24 AM, Andrew Jeffery <andrew@aj.id.au> wrote:
> > > This is less straight-forward than one would hope, as some banks only
> > > have 4 pins rather than 8, others are output only, yet more (W and
> > > X, already supported) are input-only, and in the case of the g4 SoC bank
> > > AC doesn't exist.
> > > 
> > > Add some structs to describe the varying properties of different banks
> > > and integrate mechanisms to deny requests for unsupported
> > > configurations.
> > > 
> > > > > Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
> > > 
> > > ---
> > > 
> > > Since v2:
> > 
> > Patch applied with some patch -p1 < fuzz
> > please check the result.
> 

*snip*

> Regardless, I'll try to recreate it myself and inspect the fuzz damage.

Ah, I think I see what's happened. I didn't send "gpio: aspeed: Make
bank names strings" again because you claimed you had applied v1 in the
v2 thread[1]. This patch doesn't fuzz when "gpio: aspeed: Make bank
names strings" has been applied, so is it possible that you tried
applying it to a tree missing "gpio: aspeed: Make bank names strings"?

    $ git reset --hard gpio/for-next
    HEAD is now at f334eae9c4e9 Merge branch 'devel' into for-next
    $ git am "/home/andrew/patches/[PATCH_v2_1_2]_gpio:_aspeed:_Make_bank_names_strings.mbox"
    Applying: gpio: aspeed: Make bank names strings
    $ git am "/home/andrew/patches/[PATCH_v3]_gpio:_aspeed:_Add_banks_Y,_Z,_AA,_AB_and_AC.mbox"
    Applying: gpio: aspeed: Add banks Y, Z, AA, AB and AC
    $

    Sorry for the confusion. What should I be doing when sending an updated
    series where some of the patches have been applied? Send the whole
    series regardless?

    Andrew

    [1]     https://lkml.org/lkml/2017/1/26/334

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#1571628

On Wed, Feb 1, 2017 at 2:20 AM, Andrew Jeffery <andrew@aj.id.au> wrote:
> On Wed, 2017-02-01 at 11:22 +1030, Andrew Jeffery wrote:
>> On Tue, 2017-01-31 at 15:50 +0100, Linus Walleij wrote:
>> > > > > > On Fri, Jan 27, 2017 at 5:24 AM, Andrew Jeffery <andrew@aj.id.au> wrote:
>> > > This is less straight-forward than one would hope, as some banks only
>> > > have 4 pins rather than 8, others are output only, yet more (W and
>> > > X, already supported) are input-only, and in the case of the g4 SoC bank
>> > > AC doesn't exist.
>> > >
>> > > Add some structs to describe the varying properties of different banks
>> > > and integrate mechanisms to deny requests for unsupported
>> > > configurations.
>> > >
>> > > > > Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
>> > >
>> > > ---
>> > >
>> > > Since v2:
>> >
>> > Patch applied with some patch -p1 < fuzz
>> > please check the result.
>>
>
> *snip*
>
>> Regardless, I'll try to recreate it myself and inspect the fuzz damage.
>
> Ah, I think I see what's happened. I didn't send "gpio: aspeed: Make
> bank names strings" again because you claimed you had applied v1 in the
> v2 thread[1]. This patch doesn't fuzz when "gpio: aspeed: Make bank
> names strings" has been applied, so is it possible that you tried
> applying it to a tree missing "gpio: aspeed: Make bank names strings"?

I mistakedly applied *both* patches to the pinctrl tree, devel branch.

I blame stress.

Oh well I guess I have to keep them there and remove this copy
from the gpio tree.

If the version I applied in the pinctrl tree is the wrong one (which
is possible) then please send an incremental patch on top fixing
the difference, so I can apply that to the pinctrl tree too....

Yours,
Linus Walleij

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