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Re: [PATCH v3] gpio: aspeed: Add banks Y, Z, AA, AB and AC

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On Tue, 2017-01-31 at 15:50 +0100, Linus Walleij wrote:
> > On Fri, Jan 27, 2017 at 5:24 AM, Andrew Jeffery <andrew@aj.id.au> wrote:
> 
> > This is less straight-forward than one would hope, as some banks only
> > have 4 pins rather than 8, others are output only, yet more (W and
> > X, already supported) are input-only, and in the case of the g4 SoC bank
> > AC doesn't exist.
> > 
> > Add some structs to describe the varying properties of different banks
> > and integrate mechanisms to deny requests for unsupported
> > configurations.
> > 
> > > > Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
> > ---
> > 
> > Since v2:
> 
> Patch applied with some patch -p1 < fuzz
> please check the result.

Have you pushed the tree with the fuzzy patch applied? I can't find it.
I fetched the gpio (and pinctrl) trees just now, but all I'm seeing is:

    $ git log --all --author "Andrew Jeffery" --committer "Linus Walleij" --grep "AA, AB" --oneline
    1736f75d35e4 gpio: aspeed: Add banks Y, Z, AA, AB and AC
    8ccb6dc6e999 pinctrl: aspeed: g4: Fix mux configuration for GPIOs AA[4-7], AB[0-7]

and 

    $ git show --stat --pretty=fuller 1736f75d35e4
    commit 1736f75d35e47409ad776273133d0f558a4c8253
    Author:     Andrew Jeffery <    andrew@aj.id.au    >
    AuthorDate: Tue Jan 24 16:46:46 2017 +1030
    Commit:     Linus Walleij <    linus.walleij@linaro.org    >
    CommitDate: Thu Jan 26 14:45:43 2017 +0100

v3 wasn't sent until Friday the 27th, and the diff of 1736f75d35e4
still drags in <linux/gpio.h> which v3 removes.

Regardless, I'll try to recreate it myself and inspect the fuzz damage.

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Re: [PATCH v3] gpio: aspeed: Add banks Y, Z, AA, AB and AC Linus Walleij <linus.walleij@linaro.org> - 2017-01-31 16:00 +0100
  Re: [PATCH v3] gpio: aspeed: Add banks Y, Z, AA, AB and AC Andrew Jeffery <andrew@aj.id.au> - 2017-02-01 02:00 +0100
    Re: [PATCH v3] gpio: aspeed: Add banks Y, Z, AA, AB and AC Andrew Jeffery <andrew@aj.id.au> - 2017-02-01 02:30 +0100
      Re: [PATCH v3] gpio: aspeed: Add banks Y, Z, AA, AB and AC Linus Walleij <linus.walleij@linaro.org> - 2017-02-01 16:00 +0100

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