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Groups > linux.kernel > #1514324 > unrolled thread
| Started by | Chanwoo Choi <cw00.choi@samsung.com> |
|---|---|
| First post | 2016-11-03 07:40 +0100 |
| Last post | 2016-11-03 21:20 +0100 |
| Articles | 16 — 4 participants |
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[PATCH v3 0/5] arm64: dts: Add the dts file for Exynos5433 and TM/TM2E board Chanwoo Choi <cw00.choi@samsung.com> - 2016-11-03 07:40 +0100
[PATCH v3 5/5] arm64: dts: exynos: Add dts file for Exynos5433-based TM2E board Chanwoo Choi <cw00.choi@samsung.com> - 2016-11-03 07:40 +0100
Re: [PATCH v3 5/5] arm64: dts: exynos: Add dts file for Exynos5433-based TM2E board Andi Shyti <andi.shyti@samsung.com> - 2016-11-03 13:30 +0100
Re: [PATCH v3 5/5] arm64: dts: exynos: Add dts file for Exynos5433-based TM2E board Krzysztof Kozlowski <krzk@kernel.org> - 2016-11-03 21:20 +0100
[PATCH v3 4/5] arm64: dts: exynos: Add dts file for Exynos5433-based TM2 board Chanwoo Choi <cw00.choi@samsung.com> - 2016-11-03 07:40 +0100
Re: [PATCH v3 4/5] arm64: dts: exynos: Add dts file for Exynos5433-based TM2 board Andi Shyti <andi.shyti@samsung.com> - 2016-11-03 13:30 +0100
Re: [PATCH v3 4/5] arm64: dts: exynos: Add dts file for Exynos5433-based TM2 board Krzysztof Kozlowski <krzk@kernel.org> - 2016-11-03 21:20 +0100
[PATCH v3 1/5] pinctrl: samsung: Add the support the multiple IORESOURCE_MEM for one pin-bank Chanwoo Choi <cw00.choi@samsung.com> - 2016-11-03 07:50 +0100
Re: [PATCH v3 1/5] pinctrl: samsung: Add the support the multiple IORESOURCE_MEM for one pin-bank Krzysztof Kozlowski <krzk@kernel.org> - 2016-11-03 20:20 +0100
Re: [PATCH v3 1/5] pinctrl: samsung: Add the support the multiple IORESOURCE_MEM for one pin-bank Linus Walleij <linus.walleij@linaro.org> - 2016-11-08 10:40 +0100
[PATCH v3 2/5] pinctrl: samsung: Add GPF support for Exynos5433 Chanwoo Choi <cw00.choi@samsung.com> - 2016-11-03 07:50 +0100
Re: [PATCH v3 2/5] pinctrl: samsung: Add GPF support for Exynos5433 Krzysztof Kozlowski <krzk@kernel.org> - 2016-11-03 20:30 +0100
Re: [PATCH v3 2/5] pinctrl: samsung: Add GPF support for Exynos5433 Linus Walleij <linus.walleij@linaro.org> - 2016-11-08 10:40 +0100
Re: [PATCH v3 2/5] pinctrl: samsung: Add GPF support for Exynos5433 Linus Walleij <linus.walleij@linaro.org> - 2016-11-08 10:40 +0100
Re: [PATCH v3 3/5] arm64: dts: exynos: Add dts files for Samsung Exynos5433 64bit SoC Krzysztof Kozlowski <krzk@kernel.org> - 2016-11-03 20:50 +0100
Re: [PATCH v3 3/5] arm64: dts: exynos: Add dts files for Samsung Exynos5433 64bit SoC Krzysztof Kozlowski <krzk@kernel.org> - 2016-11-03 21:20 +0100
| From | Chanwoo Choi <cw00.choi@samsung.com> |
|---|---|
| Date | 2016-11-03 07:40 +0100 |
| Subject | [PATCH v3 0/5] arm64: dts: Add the dts file for Exynos5433 and TM/TM2E board |
| Message-ID | <szjQS-iS-1@gated-at.bofh.it> |
This patchset adds the Device Tree file for Samsung 64-bit Exynos5433 SoC and TM/TM2E board based on Exynos5433. The Exynos5433 has Octa-core CPUs (quad Cortex-A57 and quad Cortex-A53). The TM2 and TM2E are the Samsung board based on Exynos5433 SoC. I tested the display controller by using the modetest tool. But, Samsung s6e3ha2 panel driver has not yet posted. So, the TM2 dts file don't include the panel Device Tree node. I'll post the s6e3ha2 panel driver on separate patch with a dt patch. Changes from v2: (https://lkml.org/lkml/2016/8/24/426) - Add new pctl_base and eint_base instead of virt_base on patch1. - Modify the documentation of pinctrl-samsung.txt on patch1. - Modify the cooling level for big.LITTLE cores. - Use the GIC_SPI definition on dtsi file. - Removes the unneeded 'regulator-always-on' property. - Fix the kbuild report of the compatible string for TM2/TM2E patches. - Two patches(exynos-mct, exynos5433-pmu) were merged. - Add the reviewed-by tag of Javier Martinez Canillas on patch3/4/5 - Add the reviewed-by tag of Krzysztof Kozlowski on patch4/5 - Add the acked-by tag of Rob Herring on patch5 - Fix the minor issues. Changes from v1: (https://lkml.org/lkml/2016/8/16/61) - Merge the cpufreq patch for exynos5433[3] on PM/cpufreq tree. - Add new patch to support the multiple IORESOURCE_MAP for samsung pinctrl driver. - Drop the SYSMMU Device-Tree node which will be posted by Marek Szyprowski. - Fix the code clean issue by Krzysztof Kozlowski and Rob Herring's comment. - Delete the unnecessary alias from exynos5433-tm2.dts. - Expand the range of cooling level of CPU device. - Update the binding method of 'Exynos5433 audio subsystem' Depends on: This patchset are based on v4.9-rc3. Chanwoo Choi (5): pinctrl: samsung: Add the support the multiple IORESOURCE_MEM for one pin-bank pinctrl: samsung: Add GPF support for Exynos5433 arm64: dts: exynos: Add dts files for Samsung Exynos5433 64bit SoC arm64: dts: exynos: Add dts file for Exynos5433-based TM2 board arm64: dts: exynos: Add dts file for Exynos5433-based TM2E board .../bindings/arm/samsung/samsung-boards.txt | 2 + .../bindings/pinctrl/samsung-pinctrl.txt | 19 + arch/arm64/boot/dts/exynos/Makefile | 5 +- arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi | 794 ++++++++++++ arch/arm64/boot/dts/exynos/exynos5433-tm2.dts | 974 ++++++++++++++ arch/arm64/boot/dts/exynos/exynos5433-tm2e.dts | 41 + .../dts/exynos/exynos5433-tmu-g3d-sensor-conf.dtsi | 23 + .../dts/exynos/exynos5433-tmu-sensor-conf.dtsi | 22 + arch/arm64/boot/dts/exynos/exynos5433-tmu.dtsi | 296 +++++ arch/arm64/boot/dts/exynos/exynos5433.dtsi | 1356 ++++++++++++++++++++ drivers/pinctrl/samsung/pinctrl-exynos.c | 45 +- drivers/pinctrl/samsung/pinctrl-exynos.h | 11 + drivers/pinctrl/samsung/pinctrl-samsung.c | 40 +- drivers/pinctrl/samsung/pinctrl-samsung.h | 10 +- 14 files changed, 3598 insertions(+), 40 deletions(-) create mode 100644 arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi create mode 100644 arch/arm64/boot/dts/exynos/exynos5433-tm2.dts create mode 100644 arch/arm64/boot/dts/exynos/exynos5433-tm2e.dts create mode 100644 arch/arm64/boot/dts/exynos/exynos5433-tmu-g3d-sensor-conf.dtsi create mode 100644 arch/arm64/boot/dts/exynos/exynos5433-tmu-sensor-conf.dtsi create mode 100644 arch/arm64/boot/dts/exynos/exynos5433-tmu.dtsi create mode 100644 arch/arm64/boot/dts/exynos/exynos5433.dtsi -- 1.9.1
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| From | Chanwoo Choi <cw00.choi@samsung.com> |
|---|---|
| Date | 2016-11-03 07:40 +0100 |
| Subject | [PATCH v3 5/5] arm64: dts: exynos: Add dts file for Exynos5433-based TM2E board |
| Message-ID | <szjQS-iS-15@gated-at.bofh.it> |
| In reply to | #1514324 |
This patch adds the Device Tree source for Exynos5433-based Samsung TM2E
board. TM2E board is the most similar with TM2 board. The exynos5433-tm2e.dts
include the difference between TM2 and TM2E.
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Jonghwa Lee <jonghwa3.lee@samsung.com>
Signed-off-by: Beomho Seo <beomho.seo@samsung.com>
Signed-off-by: Jaewon Kim <jaewon02.kim@samsung.com>
Signed-off-by: Hyungwon Hwang <human.hwang@samsung.com>
Signed-off-by: Inha Song <ideal.song@samsung.com>
Signed-off-by: Ingi kim <ingi2.kim@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
---
.../bindings/arm/samsung/samsung-boards.txt | 1 +
arch/arm64/boot/dts/exynos/Makefile | 1 +
arch/arm64/boot/dts/exynos/exynos5433-tm2e.dts | 41 ++++++++++++++++++++++
3 files changed, 43 insertions(+)
create mode 100644 arch/arm64/boot/dts/exynos/exynos5433-tm2e.dts
diff --git a/Documentation/devicetree/bindings/arm/samsung/samsung-boards.txt b/Documentation/devicetree/bindings/arm/samsung/samsung-boards.txt
index 339af8b9cdc5..c64c7b515777 100644
--- a/Documentation/devicetree/bindings/arm/samsung/samsung-boards.txt
+++ b/Documentation/devicetree/bindings/arm/samsung/samsung-boards.txt
@@ -16,6 +16,7 @@ Required root node properties:
- "samsung,smdk5410" - for Exynos5410-based Samsung SMDK5410 eval board.
- "samsung,smdk5420" - for Exynos5420-based Samsung SMDK5420 eval board.
- "samsung,tm2" - for Exynos5433-based Samsung TM2 board.
+ - "samsung,tm2e" - for Exynos5433-based Samsung TM2E board.
- "samsung,sd5v1" - for Exynos5440-based Samsung board.
- "samsung,ssdk5440" - for Exynos5440-based Samsung board.
diff --git a/arch/arm64/boot/dts/exynos/Makefile b/arch/arm64/boot/dts/exynos/Makefile
index 947c750acba1..7ddea53769a7 100644
--- a/arch/arm64/boot/dts/exynos/Makefile
+++ b/arch/arm64/boot/dts/exynos/Makefile
@@ -1,5 +1,6 @@
dtb-$(CONFIG_ARCH_EXYNOS) += \
exynos5433-tm2.dtb \
+ exynos5433-tm2e.dtb \
exynos7-espresso.dtb
always := $(dtb-y)
diff --git a/arch/arm64/boot/dts/exynos/exynos5433-tm2e.dts b/arch/arm64/boot/dts/exynos/exynos5433-tm2e.dts
new file mode 100644
index 000000000000..1db4e7f363a9
--- /dev/null
+++ b/arch/arm64/boot/dts/exynos/exynos5433-tm2e.dts
@@ -0,0 +1,41 @@
+/*
+ * SAMSUNG Exynos5433 TM2E board device tree source
+ *
+ * Copyright (c) 2016 Samsung Electronics Co., Ltd.
+ *
+ * Device tree source file for Samsung's TM2E(TM2 EDGE) board which is based on
+ * Samsung Exynos5433 SoC.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include "exynos5433-tm2.dts"
+
+/ {
+ model = "Samsung TM2E board";
+ compatible = "samsung,tm2e", "samsung,exynos5433";
+};
+
+&ldo23_reg {
+ regulator-name = "CAM_SEN_CORE_1.025V_AP";
+ regulator-max-microvolt = <1050000>;
+};
+
+&ldo25_reg {
+ regulator-name = "UNUSED_LDO25";
+ regulator-always-off;
+};
+
+&ldo31_reg {
+ regulator-name = "TSP_VDD_1.8V_AP";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+};
+
+&ldo38_reg {
+ regulator-name = "VCC_3.3V_MOTOR_AP";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+};
--
1.9.1
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| From | Andi Shyti <andi.shyti@samsung.com> |
|---|---|
| Date | 2016-11-03 13:30 +0100 |
| Subject | Re: [PATCH v3 5/5] arm64: dts: exynos: Add dts file for Exynos5433-based TM2E board |
| Message-ID | <szpjA-3NI-59@gated-at.bofh.it> |
| In reply to | #1514327 |
Hi Chanwoo,
Tested-by: Andi Shyti <andi.shyti@samsung.com>
Andi
On Thu, Nov 03, 2016 at 03:39:09PM +0900, Chanwoo Choi wrote:
> This patch adds the Device Tree source for Exynos5433-based Samsung TM2E
> board. TM2E board is the most similar with TM2 board. The exynos5433-tm2e.dts
> include the difference between TM2 and TM2E.
>
> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
> Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
> Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
> Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
> Signed-off-by: Inki Dae <inki.dae@samsung.com>
> Signed-off-by: Jonghwa Lee <jonghwa3.lee@samsung.com>
> Signed-off-by: Beomho Seo <beomho.seo@samsung.com>
> Signed-off-by: Jaewon Kim <jaewon02.kim@samsung.com>
> Signed-off-by: Hyungwon Hwang <human.hwang@samsung.com>
> Signed-off-by: Inha Song <ideal.song@samsung.com>
> Signed-off-by: Ingi kim <ingi2.kim@samsung.com>
> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
> Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
> Acked-by: Rob Herring <robh@kernel.org>
> Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
> ---
> .../bindings/arm/samsung/samsung-boards.txt | 1 +
> arch/arm64/boot/dts/exynos/Makefile | 1 +
> arch/arm64/boot/dts/exynos/exynos5433-tm2e.dts | 41 ++++++++++++++++++++++
> 3 files changed, 43 insertions(+)
> create mode 100644 arch/arm64/boot/dts/exynos/exynos5433-tm2e.dts
>
> diff --git a/Documentation/devicetree/bindings/arm/samsung/samsung-boards.txt b/Documentation/devicetree/bindings/arm/samsung/samsung-boards.txt
> index 339af8b9cdc5..c64c7b515777 100644
> --- a/Documentation/devicetree/bindings/arm/samsung/samsung-boards.txt
> +++ b/Documentation/devicetree/bindings/arm/samsung/samsung-boards.txt
> @@ -16,6 +16,7 @@ Required root node properties:
> - "samsung,smdk5410" - for Exynos5410-based Samsung SMDK5410 eval board.
> - "samsung,smdk5420" - for Exynos5420-based Samsung SMDK5420 eval board.
> - "samsung,tm2" - for Exynos5433-based Samsung TM2 board.
> + - "samsung,tm2e" - for Exynos5433-based Samsung TM2E board.
> - "samsung,sd5v1" - for Exynos5440-based Samsung board.
> - "samsung,ssdk5440" - for Exynos5440-based Samsung board.
>
> diff --git a/arch/arm64/boot/dts/exynos/Makefile b/arch/arm64/boot/dts/exynos/Makefile
> index 947c750acba1..7ddea53769a7 100644
> --- a/arch/arm64/boot/dts/exynos/Makefile
> +++ b/arch/arm64/boot/dts/exynos/Makefile
> @@ -1,5 +1,6 @@
> dtb-$(CONFIG_ARCH_EXYNOS) += \
> exynos5433-tm2.dtb \
> + exynos5433-tm2e.dtb \
> exynos7-espresso.dtb
>
> always := $(dtb-y)
> diff --git a/arch/arm64/boot/dts/exynos/exynos5433-tm2e.dts b/arch/arm64/boot/dts/exynos/exynos5433-tm2e.dts
> new file mode 100644
> index 000000000000..1db4e7f363a9
> --- /dev/null
> +++ b/arch/arm64/boot/dts/exynos/exynos5433-tm2e.dts
> @@ -0,0 +1,41 @@
> +/*
> + * SAMSUNG Exynos5433 TM2E board device tree source
> + *
> + * Copyright (c) 2016 Samsung Electronics Co., Ltd.
> + *
> + * Device tree source file for Samsung's TM2E(TM2 EDGE) board which is based on
> + * Samsung Exynos5433 SoC.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
> +#include "exynos5433-tm2.dts"
> +
> +/ {
> + model = "Samsung TM2E board";
> + compatible = "samsung,tm2e", "samsung,exynos5433";
> +};
> +
> +&ldo23_reg {
> + regulator-name = "CAM_SEN_CORE_1.025V_AP";
> + regulator-max-microvolt = <1050000>;
> +};
> +
> +&ldo25_reg {
> + regulator-name = "UNUSED_LDO25";
> + regulator-always-off;
> +};
> +
> +&ldo31_reg {
> + regulator-name = "TSP_VDD_1.8V_AP";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> +};
> +
> +&ldo38_reg {
> + regulator-name = "VCC_3.3V_MOTOR_AP";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> +};
> --
> 1.9.1
>
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| From | Krzysztof Kozlowski <krzk@kernel.org> |
|---|---|
| Date | 2016-11-03 21:20 +0100 |
| Subject | Re: [PATCH v3 5/5] arm64: dts: exynos: Add dts file for Exynos5433-based TM2E board |
| Message-ID | <szwEq-f4-15@gated-at.bofh.it> |
| In reply to | #1514327 |
On Thu, Nov 03, 2016 at 03:39:09PM +0900, Chanwoo Choi wrote: > This patch adds the Device Tree source for Exynos5433-based Samsung TM2E > board. TM2E board is the most similar with TM2 board. The exynos5433-tm2e.dts > include the difference between TM2 and TM2E. > > Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> > Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> > Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com> > Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com> > Signed-off-by: Inki Dae <inki.dae@samsung.com> > Signed-off-by: Jonghwa Lee <jonghwa3.lee@samsung.com> > Signed-off-by: Beomho Seo <beomho.seo@samsung.com> > Signed-off-by: Jaewon Kim <jaewon02.kim@samsung.com> > Signed-off-by: Hyungwon Hwang <human.hwang@samsung.com> > Signed-off-by: Inha Song <ideal.song@samsung.com> > Signed-off-by: Ingi kim <ingi2.kim@samsung.com> > Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> > Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> > Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> > Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> > Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> > Acked-by: Rob Herring <robh@kernel.org> > Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com> > --- > .../bindings/arm/samsung/samsung-boards.txt | 1 + > arch/arm64/boot/dts/exynos/Makefile | 1 + > arch/arm64/boot/dts/exynos/exynos5433-tm2e.dts | 41 ++++++++++++++++++++++ > 3 files changed, 43 insertions(+) > create mode 100644 arch/arm64/boot/dts/exynos/exynos5433-tm2e.dts > Thanks, applied. Best regards, Krzysztof
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| From | Chanwoo Choi <cw00.choi@samsung.com> |
|---|---|
| Date | 2016-11-03 07:40 +0100 |
| Subject | [PATCH v3 4/5] arm64: dts: exynos: Add dts file for Exynos5433-based TM2 board |
| Message-ID | <szjQS-iS-17@gated-at.bofh.it> |
| In reply to | #1514324 |
This patch adds the Device Tree source for Exynos5433-based Samsung TM2 board.
This board fully support the all things for mobile target.
This patch supports the following devices:
1. basic SoC
- Initial booting for Samsung Exynos5433 SoC
- DRAM LPDDR3 (3GB)
- eMMC (32GB)
- ARM architecture timer
2. power management devices
- Sasmung S2MPS13 PMIC for the power supply
- CPUFREQ for big.LITTLE cores
- TMU for big.LITTLE cores and GPU
- ADC with thermistor to measure the temperature of AP/Battery/Charger
- Maxim MAX77843 Interface PMIC (MUIC/Haptic/Regulator)
3. sound devices
- I2S for sound bus
- LPASS for sound power control
- Wolfson WM5110 for sound codec
- Maxim MAX98504 for speaker amplifier
- TM2 ASoC Machine device driver node
3. display devices
- DECON, DSI and MIC for the panel output
4. usb devices
- USB 3.0 DRD (Dual Role Device)
- USB 3.0 Host controller
5. storage devices
- MSHC (Mobile Storage Host Controller) for eMMC device
6. misc devices
- gpio-keys (power, volume up/down, home key)
- PWM (Pulse Width Modulation Timer)
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Jonghwa Lee <jonghwa3.lee@samsung.com>
Signed-off-by: Beomho Seo <beomho.seo@samsung.com>
Signed-off-by: Jaewon Kim <jaewon02.kim@samsung.com>
Signed-off-by: Hyungwon Hwang <human.hwang@samsung.com>
Signed-off-by: Inha Song <ideal.song@samsung.com>
Signed-off-by: Ingi kim <ingi2.kim@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
---
.../bindings/arm/samsung/samsung-boards.txt | 1 +
arch/arm64/boot/dts/exynos/Makefile | 4 +-
arch/arm64/boot/dts/exynos/exynos5433-tm2.dts | 974 +++++++++++++++++++++
3 files changed, 978 insertions(+), 1 deletion(-)
create mode 100644 arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
diff --git a/Documentation/devicetree/bindings/arm/samsung/samsung-boards.txt b/Documentation/devicetree/bindings/arm/samsung/samsung-boards.txt
index 0ea7f14ef294..339af8b9cdc5 100644
--- a/Documentation/devicetree/bindings/arm/samsung/samsung-boards.txt
+++ b/Documentation/devicetree/bindings/arm/samsung/samsung-boards.txt
@@ -15,6 +15,7 @@ Required root node properties:
- "samsung,xyref5260" - for Exynos5260-based Samsung board.
- "samsung,smdk5410" - for Exynos5410-based Samsung SMDK5410 eval board.
- "samsung,smdk5420" - for Exynos5420-based Samsung SMDK5420 eval board.
+ - "samsung,tm2" - for Exynos5433-based Samsung TM2 board.
- "samsung,sd5v1" - for Exynos5440-based Samsung board.
- "samsung,ssdk5440" - for Exynos5440-based Samsung board.
diff --git a/arch/arm64/boot/dts/exynos/Makefile b/arch/arm64/boot/dts/exynos/Makefile
index 50c9b9383cfa..947c750acba1 100644
--- a/arch/arm64/boot/dts/exynos/Makefile
+++ b/arch/arm64/boot/dts/exynos/Makefile
@@ -1,4 +1,6 @@
-dtb-$(CONFIG_ARCH_EXYNOS) += exynos7-espresso.dtb
+dtb-$(CONFIG_ARCH_EXYNOS) += \
+ exynos5433-tm2.dtb \
+ exynos7-espresso.dtb
always := $(dtb-y)
subdir-y := $(dts-dirs)
diff --git a/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts b/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
new file mode 100644
index 000000000000..9ea3f32bae9e
--- /dev/null
+++ b/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
@@ -0,0 +1,974 @@
+/*
+ * SAMSUNG Exynos5433 TM2 board device tree source
+ *
+ * Copyright (c) 2016 Samsung Electronics Co., Ltd.
+ *
+ * Device tree source file for Samsung's TM2 board which is based on
+ * Samsung Exynos5433 SoC.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/dts-v1/;
+#include "exynos5433.dtsi"
+#include <dt-bindings/clock/samsung,s2mps11.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+
+/ {
+ model = "Samsung TM2 board";
+ compatible = "samsung,tm2", "samsung,exynos5433";
+
+ aliases {
+ pinctrl0 = &pinctrl_alive;
+ pinctrl1 = &pinctrl_aud;
+ pinctrl2 = &pinctrl_cpif;
+ pinctrl3 = &pinctrl_ese;
+ pinctrl4 = &pinctrl_finger;
+ pinctrl5 = &pinctrl_fsys;
+ pinctrl6 = &pinctrl_imem;
+ pinctrl7 = &pinctrl_nfc;
+ pinctrl8 = &pinctrl_peric;
+ pinctrl9 = &pinctrl_touch;
+ serial0 = &serial_0;
+ serial1 = &serial_1;
+ serial2 = &serial_2;
+ serial3 = &serial_3;
+ spi0 = &spi_0;
+ spi1 = &spi_1;
+ spi2 = &spi_2;
+ spi3 = &spi_3;
+ spi4 = &spi_4;
+ };
+
+ chosen {
+ stdout-path = &serial_1;
+ };
+
+ memory@20000000 {
+ device_type = "memory";
+ reg = <0x0 0x20000000 0x0 0xc0000000>;
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+
+ power-key {
+ gpios = <&gpa2 7 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_POWER>;
+ label = "power key";
+ debounce-interval = <10>;
+ };
+
+ volume-up-key {
+ gpios = <&gpa2 0 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_VOLUMEUP>;
+ label = "volume-up key";
+ debounce-interval = <10>;
+ };
+
+ volume-down-key {
+ gpios = <&gpa2 1 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_VOLUMEDOWN>;
+ label = "volume-down key";
+ debounce-interval = <10>;
+ };
+
+ homepage-key {
+ gpios = <&gpa0 3 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_MENU>;
+ label = "homepage key";
+ debounce-interval = <10>;
+ };
+ };
+
+ i2c_max98504: i2c-gpio-0 {
+ compatible = "i2c-gpio";
+ gpios = <&gpd0 1 GPIO_ACTIVE_HIGH /* SPK_AMP_SDA */
+ &gpd0 0 GPIO_ACTIVE_HIGH /* SPK_AMP_SCL */ >;
+ i2c-gpio,delay-us = <2>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+
+ max98504: max98504@31 {
+ compatible = "maxim,max98504";
+ reg = <0x31>;
+ maxim,rx-path = <1>;
+ maxim,tx-path = <1>;
+ maxim,tx-channel-mask = <3>;
+ maxim,tx-channel-source = <2>;
+ };
+ };
+
+ sound {
+ compatible = "samsung,tm2-audio";
+ audio-codec = <&wm5110>;
+ i2s-controller = <&i2s0>;
+ audio-amplifier = <&max98504>;
+ mic-bias-gpios = <&gpr3 2 GPIO_ACTIVE_HIGH>;
+ model = "wm5110";
+ samsung,audio-routing =
+ /* Headphone */
+ "HP", "HPOUT1L",
+ "HP", "HPOUT1R",
+
+ /* Speaker */
+ "SPK", "SPKOUT",
+ "SPKOUT", "HPOUT2L",
+ "SPKOUT", "HPOUT2R",
+
+ /* Receiver */
+ "RCV", "HPOUT3L",
+ "RCV", "HPOUT3R";
+ status = "okay";
+ };
+};
+
+&adc {
+ vdd-supply = <&ldo3_reg>;
+ status = "okay";
+
+ thermistor-ap {
+ compatible = "murata,ncp03wf104";
+ pullup-uv = <1800000>;
+ pullup-ohm = <100000>;
+ pulldown-ohm = <0>;
+ io-channels = <&adc 0>;
+ };
+
+ thermistor-battery {
+ compatible = "murata,ncp03wf104";
+ pullup-uv = <1800000>;
+ pullup-ohm = <100000>;
+ pulldown-ohm = <0>;
+ io-channels = <&adc 1>;
+ #thermal-sensor-cells = <0>;
+ };
+
+ thermistor-charger {
+ compatible = "murata,ncp03wf104";
+ pullup-uv = <1800000>;
+ pullup-ohm = <100000>;
+ pulldown-ohm = <0>;
+ io-channels = <&adc 2>;
+ };
+};
+
+&cpu0 {
+ cpu-supply = <&buck3_reg>;
+};
+
+&cpu4 {
+ cpu-supply = <&buck2_reg>;
+};
+
+&decon {
+ status = "okay";
+
+ i80-if-timings {
+ };
+};
+
+&dsi {
+ status = "okay";
+ vddcore-supply = <&ldo6_reg>;
+ vddio-supply = <&ldo7_reg>;
+ samsung,pll-clock-frequency = <24000000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&te_irq>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@1 {
+ reg = <1>;
+
+ dsi_out: endpoint {
+ samsung,burst-clock-frequency = <512000000>;
+ samsung,esc-clock-frequency = <16000000>;
+ };
+ };
+ };
+};
+
+&hsi2c_0 {
+ status = "okay";
+ clock-frequency = <2500000>;
+
+ s2mps13-pmic@66 {
+ compatible = "samsung,s2mps13-pmic";
+ interrupt-parent = <&gpa0>;
+ interrupts = <7 IRQ_TYPE_NONE>;
+ reg = <0x66>;
+ samsung,s2mps11-wrstbi-ground;
+
+ s2mps13_osc: clocks {
+ compatible = "samsung,s2mps13-clk";
+ #clock-cells = <1>;
+ clock-output-names = "s2mps13_ap", "s2mps13_cp",
+ "s2mps13_bt";
+ };
+
+ regulators {
+ ldo1_reg: LDO1 {
+ regulator-name = "VDD_ALIVE_0.9V_AP";
+ regulator-min-microvolt = <900000>;
+ regulator-max-microvolt = <900000>;
+ regulator-always-on;
+ };
+
+ ldo2_reg: LDO2 {
+ regulator-name = "VDDQ_MMC2_2.8V_AP";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ regulator-always-on;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ ldo3_reg: LDO3 {
+ regulator-name = "VDD1_E_1.8V_AP";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ };
+
+ ldo4_reg: LDO4 {
+ regulator-name = "VDD10_MIF_PLL_1.0V_AP";
+ regulator-min-microvolt = <1300000>;
+ regulator-max-microvolt = <1300000>;
+ regulator-always-on;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ ldo5_reg: LDO5 {
+ regulator-name = "VDD10_DPLL_1.0V_AP";
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1000000>;
+ regulator-always-on;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ ldo6_reg: LDO6 {
+ regulator-name = "VDD10_MIPI2L_1.0V_AP";
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1000000>;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ ldo7_reg: LDO7 {
+ regulator-name = "VDD18_MIPI2L_1.8V_AP";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+
+ ldo8_reg: LDO8 {
+ regulator-name = "VDD18_LLI_1.8V_AP";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ ldo9_reg: LDO9 {
+ regulator-name = "VDD18_ABB_ETC_1.8V_AP";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ ldo10_reg: LDO10 {
+ regulator-name = "VDD33_USB30_3.0V_AP";
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ ldo11_reg: LDO11 {
+ regulator-name = "VDD_INT_M_1.0V_AP";
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1000000>;
+ regulator-always-on;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ ldo12_reg: LDO12 {
+ regulator-name = "VDD_KFC_M_1.1V_AP";
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-always-on;
+ };
+
+ ldo13_reg: LDO13 {
+ regulator-name = "VDD_G3D_M_0.95V_AP";
+ regulator-min-microvolt = <950000>;
+ regulator-max-microvolt = <950000>;
+ regulator-always-on;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ ldo14_reg: LDO14 {
+ regulator-name = "VDDQ_M1_LDO_1.2V_AP";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-always-on;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ ldo15_reg: LDO15 {
+ regulator-name = "VDDQ_M2_LDO_1.2V_AP";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-always-on;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ ldo16_reg: LDO16 {
+ regulator-name = "VDDQ_EFUSE";
+ regulator-min-microvolt = <1400000>;
+ regulator-max-microvolt = <3400000>;
+ regulator-always-on;
+ };
+
+ ldo17_reg: LDO17 {
+ regulator-name = "V_TFLASH_2.8V_AP";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ };
+
+ ldo18_reg: LDO18 {
+ regulator-name = "V_CODEC_1.8V_AP";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+
+ ldo19_reg: LDO19 {
+ regulator-name = "VDDA_1.8V_COMP";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ };
+
+ ldo20_reg: LDO20 {
+ regulator-name = "VCC_2.8V_AP";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ regulator-always-on;
+ };
+
+ ldo21_reg: LDO21 {
+ regulator-name = "VT_CAM_1.8V";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+
+ ldo22_reg: LDO22 {
+ regulator-name = "CAM_IO_1.8V_AP";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+
+ ldo23_reg: LDO23 {
+ regulator-name = "CAM_SEN_CORE_1.2V_AP";
+ regulator-min-microvolt = <1050000>;
+ regulator-max-microvolt = <1200000>;
+ };
+
+ ldo24_reg: LDO24 {
+ regulator-name = "VT_CAM_1.2V";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ };
+
+ ldo25_reg: LDO25 {
+ regulator-name = "CAM_SEN_A2.8V_AP";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ };
+
+ ldo26_reg: LDO26 {
+ regulator-name = "CAM_AF_2.8V_AP";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ };
+
+ ldo27_reg: LDO27 {
+ regulator-name = "VCC_3.0V_LCD_AP";
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+ };
+
+ ldo28_reg: LDO28 {
+ regulator-name = "VCC_1.8V_LCD_AP";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+
+ ldo29_reg: LDO29 {
+ regulator-name = "VT_CAM_2.8V";
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+ };
+
+ ldo30_reg: LDO30 {
+ regulator-name = "TSP_AVDD_3.3V_AP";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ ldo31_reg: LDO31 {
+ regulator-name = "TSP_VDD_1.85V_AP";
+ regulator-min-microvolt = <1850000>;
+ regulator-max-microvolt = <1850000>;
+ };
+
+ ldo32_reg: LDO32 {
+ regulator-name = "VTOUCH_1.8V_AP";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+
+ ldo33_reg: LDO33 {
+ regulator-name = "VTOUCH_LED_3.3V";
+ regulator-min-microvolt = <2500000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-ramp-delay = <12500>;
+ };
+
+ ldo34_reg: LDO34 {
+ regulator-name = "VCC_1.8V_MHL_AP";
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <2100000>;
+ };
+
+ ldo35_reg: LDO35 {
+ regulator-name = "OIS_VM_2.8V";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <2800000>;
+ };
+
+ ldo36_reg: LDO36 {
+ regulator-name = "VSIL_1.0V";
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1000000>;
+ };
+
+ ldo37_reg: LDO37 {
+ regulator-name = "VF_1.8V";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+
+ ldo38_reg: LDO38 {
+ regulator-name = "VCC_3.0V_MOTOR_AP";
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+ };
+
+ ldo39_reg: LDO39 {
+ regulator-name = "V_HRM_1.8V";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+
+ ldo40_reg: LDO40 {
+ regulator-name = "V_HRM_3.3V";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ buck1_reg: BUCK1 {
+ regulator-name = "VDD_MIF_0.9V_AP";
+ regulator-min-microvolt = <600000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-always-on;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ buck2_reg: BUCK2 {
+ regulator-name = "VDD_EGL_1.0V_AP";
+ regulator-min-microvolt = <900000>;
+ regulator-max-microvolt = <1300000>;
+ regulator-always-on;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ buck3_reg: BUCK3 {
+ regulator-name = "VDD_KFC_1.0V_AP";
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-always-on;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ buck4_reg: BUCK4 {
+ regulator-name = "VDD_INT_0.95V_AP";
+ regulator-min-microvolt = <600000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-always-on;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ buck5_reg: BUCK5 {
+ regulator-name = "VDD_DISP_CAM0_0.9V_AP";
+ regulator-min-microvolt = <600000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-always-on;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ buck6_reg: BUCK6 {
+ regulator-name = "VDD_G3D_0.9V_AP";
+ regulator-min-microvolt = <600000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-always-on;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ buck7_reg: BUCK7 {
+ regulator-name = "VDD_MEM1_1.2V_AP";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-always-on;
+ };
+
+ buck8_reg: BUCK8 {
+ regulator-name = "VDD_LLDO_1.35V_AP";
+ regulator-min-microvolt = <1350000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ };
+
+ buck9_reg: BUCK9 {
+ regulator-name = "VDD_MLDO_2.0V_AP";
+ regulator-min-microvolt = <1350000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ };
+
+ buck10_reg: BUCK10 {
+ regulator-name = "vdd_mem2";
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-always-on;
+ };
+ };
+ };
+};
+
+&hsi2c_8 {
+ status = "okay";
+
+ max77843@66 {
+ compatible = "maxim,max77843";
+ interrupt-parent = <&gpa1>;
+ interrupts = <5 IRQ_TYPE_EDGE_FALLING>;
+ reg = <0x66>;
+
+ muic: max77843-muic {
+ compatible = "maxim,max77843-muic";
+ };
+
+ regulators {
+ compatible = "maxim,max77843-regulator";
+ safeout1_reg: SAFEOUT1 {
+ regulator-name = "SAFEOUT1";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <4950000>;
+ };
+
+ safeout2_reg: SAFEOUT2 {
+ regulator-name = "SAFEOUT2";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <4950000>;
+ };
+
+ charger_reg: CHARGER {
+ regulator-name = "CHARGER";
+ regulator-min-microamp = <100000>;
+ regulator-max-microamp = <3150000>;
+ };
+ };
+
+ haptic: max77843-haptic {
+ compatible = "maxim,max77843-haptic";
+ haptic-supply = <&ldo38_reg>;
+ pwms = <&pwm 0 33670 0>;
+ pwm-names = "haptic";
+ };
+ };
+};
+
+&i2s0 {
+ status = "okay";
+};
+
+&mshc_0 {
+ status = "okay";
+ num-slots = <1>;
+ non-removable;
+ card-detect-delay = <200>;
+ samsung,dw-mshc-ciu-div = <3>;
+ samsung,dw-mshc-sdr-timing = <0 4>;
+ samsung,dw-mshc-ddr-timing = <0 2>;
+ samsung,dw-mshc-hs400-timing = <0 3>;
+ samsung,read-strobe-delay = <90>;
+ fifo-depth = <0x80>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_qrdy &sd0_bus1 &sd0_bus4
+ &sd0_bus8 &sd0_rdqs>;
+ bus-width = <8>;
+ assigned-clocks = <&cmu_top CLK_SCLK_MMC0_FSYS>;
+ assigned-clock-rates = <800000000>;
+};
+
+&pinctrl_alive {
+ pinctrl-names = "default";
+ pinctrl-0 = <&initial_alive>;
+
+ initial_alive: initial-state {
+ PIN(IN, gpa0-0, DOWN, LV1);
+ PIN(IN, gpa0-1, NONE, LV1);
+ PIN(IN, gpa0-2, DOWN, LV1);
+ PIN(IN, gpa0-3, NONE, LV1);
+ PIN(IN, gpa0-4, NONE, LV1);
+ PIN(IN, gpa0-5, DOWN, LV1);
+ PIN(IN, gpa0-6, NONE, LV1);
+ PIN(IN, gpa0-7, NONE, LV1);
+
+ PIN(IN, gpa1-0, UP, LV1);
+ PIN(IN, gpa1-1, NONE, LV1);
+ PIN(IN, gpa1-2, NONE, LV1);
+ PIN(IN, gpa1-3, DOWN, LV1);
+ PIN(IN, gpa1-4, DOWN, LV1);
+ PIN(IN, gpa1-5, NONE, LV1);
+ PIN(IN, gpa1-6, NONE, LV1);
+ PIN(IN, gpa1-7, NONE, LV1);
+
+ PIN(IN, gpa2-0, NONE, LV1);
+ PIN(IN, gpa2-1, NONE, LV1);
+ PIN(IN, gpa2-2, NONE, LV1);
+ PIN(IN, gpa2-3, DOWN, LV1);
+ PIN(IN, gpa2-4, NONE, LV1);
+ PIN(IN, gpa2-5, DOWN, LV1);
+ PIN(IN, gpa2-6, DOWN, LV1);
+ PIN(IN, gpa2-7, NONE, LV1);
+
+ PIN(IN, gpa3-0, DOWN, LV1);
+ PIN(IN, gpa3-1, DOWN, LV1);
+ PIN(IN, gpa3-2, NONE, LV1);
+ PIN(IN, gpa3-3, DOWN, LV1);
+ PIN(IN, gpa3-4, NONE, LV1);
+ PIN(IN, gpa3-5, DOWN, LV1);
+ PIN(IN, gpa3-6, DOWN, LV1);
+ PIN(IN, gpa3-7, DOWN, LV1);
+
+ PIN(IN, gpf1-0, NONE, LV1);
+ PIN(IN, gpf1-1, NONE, LV1);
+ PIN(IN, gpf1-2, DOWN, LV1);
+ PIN(IN, gpf1-4, UP, LV1);
+ PIN(OUT, gpf1-5, NONE, LV1);
+ PIN(IN, gpf1-6, DOWN, LV1);
+ PIN(IN, gpf1-7, DOWN, LV1);
+
+ PIN(IN, gpf2-0, DOWN, LV1);
+ PIN(IN, gpf2-1, DOWN, LV1);
+ PIN(IN, gpf2-2, DOWN, LV1);
+ PIN(IN, gpf2-3, DOWN, LV1);
+
+ PIN(IN, gpf3-0, DOWN, LV1);
+ PIN(IN, gpf3-1, DOWN, LV1);
+ PIN(IN, gpf3-2, NONE, LV1);
+ PIN(IN, gpf3-3, DOWN, LV1);
+
+ PIN(IN, gpf4-0, DOWN, LV1);
+ PIN(IN, gpf4-1, DOWN, LV1);
+ PIN(IN, gpf4-2, DOWN, LV1);
+ PIN(IN, gpf4-3, DOWN, LV1);
+ PIN(IN, gpf4-4, DOWN, LV1);
+ PIN(IN, gpf4-5, DOWN, LV1);
+ PIN(IN, gpf4-6, DOWN, LV1);
+ PIN(IN, gpf4-7, DOWN, LV1);
+
+ PIN(IN, gpf5-0, DOWN, LV1);
+ PIN(IN, gpf5-1, DOWN, LV1);
+ PIN(IN, gpf5-2, DOWN, LV1);
+ PIN(IN, gpf5-3, DOWN, LV1);
+ PIN(OUT, gpf5-4, NONE, LV1);
+ PIN(IN, gpf5-5, DOWN, LV1);
+ PIN(IN, gpf5-6, DOWN, LV1);
+ PIN(IN, gpf5-7, DOWN, LV1);
+ };
+
+ te_irq: te_irq {
+ samsung,pins = "gpf1-3";
+ samsung,pin-function = <0xf>;
+ };
+};
+
+&pinctrl_cpif {
+ pinctrl-names = "default";
+ pinctrl-0 = <&initial_cpif>;
+
+ initial_cpif: initial-state {
+ PIN(IN, gpv6-0, DOWN, LV1);
+ PIN(IN, gpv6-1, DOWN, LV1);
+ };
+};
+
+&pinctrl_ese {
+ pinctrl-names = "default";
+ pinctrl-0 = <&initial_ese>;
+
+ initial_ese: initial-state {
+ PIN(IN, gpj2-0, DOWN, LV1);
+ PIN(IN, gpj2-1, DOWN, LV1);
+ PIN(IN, gpj2-2, DOWN, LV1);
+ };
+};
+
+&pinctrl_fsys {
+ pinctrl-names = "default";
+ pinctrl-0 = <&initial_fsys>;
+
+ initial_fsys: initial-state {
+ PIN(IN, gpr3-0, NONE, LV1);
+ PIN(IN, gpr3-1, DOWN, LV1);
+ PIN(IN, gpr3-2, DOWN, LV1);
+ PIN(IN, gpr3-3, DOWN, LV1);
+ PIN(IN, gpr3-7, NONE, LV1);
+ };
+};
+
+&pinctrl_imem {
+ pinctrl-names = "default";
+ pinctrl-0 = <&initial_imem>;
+
+ initial_imem: initial-state {
+ PIN(IN, gpf0-0, UP, LV1);
+ PIN(IN, gpf0-1, UP, LV1);
+ PIN(IN, gpf0-2, DOWN, LV1);
+ PIN(IN, gpf0-3, UP, LV1);
+ PIN(IN, gpf0-4, DOWN, LV1);
+ PIN(IN, gpf0-5, NONE, LV1);
+ PIN(IN, gpf0-6, DOWN, LV1);
+ PIN(IN, gpf0-7, UP, LV1);
+ };
+};
+
+&pinctrl_nfc {
+ pinctrl-names = "default";
+ pinctrl-0 = <&initial_nfc>;
+
+ initial_nfc: initial-state {
+ PIN(IN, gpj0-2, DOWN, LV1);
+ };
+};
+
+&pinctrl_peric {
+ pinctrl-names = "default";
+ pinctrl-0 = <&initial_peric>;
+
+ initial_peric: initial-state {
+ PIN(IN, gpv7-0, DOWN, LV1);
+ PIN(IN, gpv7-1, DOWN, LV1);
+ PIN(IN, gpv7-2, NONE, LV1);
+ PIN(IN, gpv7-3, DOWN, LV1);
+ PIN(IN, gpv7-4, DOWN, LV1);
+ PIN(IN, gpv7-5, DOWN, LV1);
+
+ PIN(IN, gpb0-4, DOWN, LV1);
+
+ PIN(IN, gpc0-2, DOWN, LV1);
+ PIN(IN, gpc0-5, DOWN, LV1);
+ PIN(IN, gpc0-7, DOWN, LV1);
+
+ PIN(IN, gpc1-1, DOWN, LV1);
+
+ PIN(IN, gpc3-4, NONE, LV1);
+ PIN(IN, gpc3-5, NONE, LV1);
+ PIN(IN, gpc3-6, NONE, LV1);
+ PIN(IN, gpc3-7, NONE, LV1);
+
+ PIN(OUT, gpg0-0, NONE, LV1);
+ PIN(FUNC1, gpg0-1, DOWN, LV1);
+
+ PIN(IN, gpd2-5, DOWN, LV1);
+
+ PIN(IN, gpd4-0, NONE, LV1);
+ PIN(IN, gpd4-1, DOWN, LV1);
+ PIN(IN, gpd4-2, DOWN, LV1);
+ PIN(IN, gpd4-3, DOWN, LV1);
+ PIN(IN, gpd4-4, DOWN, LV1);
+
+ PIN(IN, gpd6-3, DOWN, LV1);
+
+ PIN(IN, gpd8-1, UP, LV1);
+
+ PIN(IN, gpg1-0, DOWN, LV1);
+ PIN(IN, gpg1-1, DOWN, LV1);
+ PIN(IN, gpg1-2, DOWN, LV1);
+ PIN(IN, gpg1-3, DOWN, LV1);
+ PIN(IN, gpg1-4, DOWN, LV1);
+
+ PIN(IN, gpg2-0, DOWN, LV1);
+ PIN(IN, gpg2-1, DOWN, LV1);
+
+ PIN(IN, gpg3-0, DOWN, LV1);
+ PIN(IN, gpg3-1, DOWN, LV1);
+ PIN(IN, gpg3-5, DOWN, LV1);
+ PIN(IN, gpg3-7, DOWN, LV1);
+ };
+};
+
+&pinctrl_touch {
+ pinctrl-names = "default";
+ pinctrl-0 = <&initial_touch>;
+
+ initial_touch: initial-state {
+ PIN(IN, gpj1-2, DOWN, LV1);
+ };
+};
+
+&pwm {
+ pinctrl-0 = <&pwm0_out>;
+ pinctrl-names = "default";
+ status = "okay";
+};
+
+&mic {
+ status = "okay";
+
+ i80-if-timings {
+ };
+};
+
+&serial_1 {
+ status = "okay";
+};
+
+&serial_3 {
+ assigned-clocks = <&cmu_aud CLK_MOUT_AUD_PLL_USER>;
+ assigned-clock-parents = <&cmu_top CLK_FOUT_AUD_PLL>;
+ status = "okay";
+};
+
+&spi_1 {
+ cs-gpios = <&gpd6 3 GPIO_ACTIVE_HIGH>;
+ status = "okay";
+
+ wm5110: wm5110-codec@0 {
+ compatible = "wlf,wm5110";
+ reg = <0x0>;
+ spi-max-frequency = <20000000>;
+ interrupt-parent = <&gpa0>;
+ interrupts = <4 IRQ_TYPE_NONE>;
+ clocks = <&pmu_system_controller 0>,
+ <&s2mps13_osc S2MPS11_CLK_BT>;
+ clock-names = "mclk1", "mclk2";
+
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ wlf,micd-detect-debounce = <300>;
+ wlf,micd-bias-start-time = <0x1>;
+ wlf,micd-rate = <0x7>;
+ wlf,micd-dbtime = <0x1>;
+ wlf,micd-force-micbias;
+ wlf,micd-configs = <0x0 1 0>;
+ wlf,hpdet-channel = <1>;
+ wlf,gpsw = <0x1>;
+ wlf,inmode = <2 0 2 0>;
+
+ wlf,reset = <&gpc0 7 GPIO_ACTIVE_HIGH>;
+ wlf,ldoena = <&gpf0 0 GPIO_ACTIVE_HIGH>;
+
+ /* core supplies */
+ AVDD-supply = <&ldo18_reg>;
+ DBVDD1-supply = <&ldo18_reg>;
+ CPVDD-supply = <&ldo18_reg>;
+ DBVDD2-supply = <&ldo18_reg>;
+ DBVDD3-supply = <&ldo18_reg>;
+
+ controller-data {
+ samsung,spi-feedback-delay = <0>;
+ };
+ };
+};
+
+&timer {
+ clock-frequency = <24000000>;
+};
+
+&tmu_atlas0 {
+ vtmu-supply = <&ldo3_reg>;
+ status = "okay";
+};
+
+&tmu_apollo {
+ vtmu-supply = <&ldo3_reg>;
+ status = "okay";
+};
+
+&tmu_g3d {
+ vtmu-supply = <&ldo3_reg>;
+ status = "okay";
+};
+
+&usbdrd30 {
+ vdd33-supply = <&ldo10_reg>;
+ vdd10-supply = <&ldo6_reg>;
+ status = "okay";
+};
+
+&usbdrd_dwc3_0 {
+ dr_mode = "otg";
+};
+
+&usbdrd30_phy {
+ vbus-supply = <&safeout1_reg>;
+ status = "okay";
+};
+
+&xxti {
+ clock-frequency = <24000000>;
+};
--
1.9.1
[toc] | [prev] | [next] | [standalone]
| From | Andi Shyti <andi.shyti@samsung.com> |
|---|---|
| Date | 2016-11-03 13:30 +0100 |
| Subject | Re: [PATCH v3 4/5] arm64: dts: exynos: Add dts file for Exynos5433-based TM2 board |
| Message-ID | <szpjz-3NI-7@gated-at.bofh.it> |
| In reply to | #1514328 |
Hi Chanwoo,
Tested-by: Andi Shyti <andi.shyti@samsung.com>
Andi
On Thu, Nov 03, 2016 at 03:39:08PM +0900, Chanwoo Choi wrote:
> This patch adds the Device Tree source for Exynos5433-based Samsung TM2 board.
> This board fully support the all things for mobile target.
>
> This patch supports the following devices:
> 1. basic SoC
> - Initial booting for Samsung Exynos5433 SoC
> - DRAM LPDDR3 (3GB)
> - eMMC (32GB)
> - ARM architecture timer
>
> 2. power management devices
> - Sasmung S2MPS13 PMIC for the power supply
> - CPUFREQ for big.LITTLE cores
> - TMU for big.LITTLE cores and GPU
> - ADC with thermistor to measure the temperature of AP/Battery/Charger
> - Maxim MAX77843 Interface PMIC (MUIC/Haptic/Regulator)
>
> 3. sound devices
> - I2S for sound bus
> - LPASS for sound power control
> - Wolfson WM5110 for sound codec
> - Maxim MAX98504 for speaker amplifier
> - TM2 ASoC Machine device driver node
>
> 3. display devices
> - DECON, DSI and MIC for the panel output
>
> 4. usb devices
> - USB 3.0 DRD (Dual Role Device)
> - USB 3.0 Host controller
>
> 5. storage devices
> - MSHC (Mobile Storage Host Controller) for eMMC device
>
> 6. misc devices
> - gpio-keys (power, volume up/down, home key)
> - PWM (Pulse Width Modulation Timer)
>
> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
> Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
> Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
> Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
> Signed-off-by: Inki Dae <inki.dae@samsung.com>
> Signed-off-by: Jonghwa Lee <jonghwa3.lee@samsung.com>
> Signed-off-by: Beomho Seo <beomho.seo@samsung.com>
> Signed-off-by: Jaewon Kim <jaewon02.kim@samsung.com>
> Signed-off-by: Hyungwon Hwang <human.hwang@samsung.com>
> Signed-off-by: Inha Song <ideal.song@samsung.com>
> Signed-off-by: Ingi kim <ingi2.kim@samsung.com>
> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
> Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
> Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
> ---
> .../bindings/arm/samsung/samsung-boards.txt | 1 +
> arch/arm64/boot/dts/exynos/Makefile | 4 +-
> arch/arm64/boot/dts/exynos/exynos5433-tm2.dts | 974 +++++++++++++++++++++
> 3 files changed, 978 insertions(+), 1 deletion(-)
> create mode 100644 arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
>
> diff --git a/Documentation/devicetree/bindings/arm/samsung/samsung-boards.txt b/Documentation/devicetree/bindings/arm/samsung/samsung-boards.txt
> index 0ea7f14ef294..339af8b9cdc5 100644
> --- a/Documentation/devicetree/bindings/arm/samsung/samsung-boards.txt
> +++ b/Documentation/devicetree/bindings/arm/samsung/samsung-boards.txt
> @@ -15,6 +15,7 @@ Required root node properties:
> - "samsung,xyref5260" - for Exynos5260-based Samsung board.
> - "samsung,smdk5410" - for Exynos5410-based Samsung SMDK5410 eval board.
> - "samsung,smdk5420" - for Exynos5420-based Samsung SMDK5420 eval board.
> + - "samsung,tm2" - for Exynos5433-based Samsung TM2 board.
> - "samsung,sd5v1" - for Exynos5440-based Samsung board.
> - "samsung,ssdk5440" - for Exynos5440-based Samsung board.
>
> diff --git a/arch/arm64/boot/dts/exynos/Makefile b/arch/arm64/boot/dts/exynos/Makefile
> index 50c9b9383cfa..947c750acba1 100644
> --- a/arch/arm64/boot/dts/exynos/Makefile
> +++ b/arch/arm64/boot/dts/exynos/Makefile
> @@ -1,4 +1,6 @@
> -dtb-$(CONFIG_ARCH_EXYNOS) += exynos7-espresso.dtb
> +dtb-$(CONFIG_ARCH_EXYNOS) += \
> + exynos5433-tm2.dtb \
> + exynos7-espresso.dtb
>
> always := $(dtb-y)
> subdir-y := $(dts-dirs)
> diff --git a/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts b/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
> new file mode 100644
> index 000000000000..9ea3f32bae9e
> --- /dev/null
> +++ b/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
> @@ -0,0 +1,974 @@
> +/*
> + * SAMSUNG Exynos5433 TM2 board device tree source
> + *
> + * Copyright (c) 2016 Samsung Electronics Co., Ltd.
> + *
> + * Device tree source file for Samsung's TM2 board which is based on
> + * Samsung Exynos5433 SoC.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
> +/dts-v1/;
> +#include "exynos5433.dtsi"
> +#include <dt-bindings/clock/samsung,s2mps11.h>
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/input/input.h>
> +#include <dt-bindings/interrupt-controller/irq.h>
> +
> +/ {
> + model = "Samsung TM2 board";
> + compatible = "samsung,tm2", "samsung,exynos5433";
> +
> + aliases {
> + pinctrl0 = &pinctrl_alive;
> + pinctrl1 = &pinctrl_aud;
> + pinctrl2 = &pinctrl_cpif;
> + pinctrl3 = &pinctrl_ese;
> + pinctrl4 = &pinctrl_finger;
> + pinctrl5 = &pinctrl_fsys;
> + pinctrl6 = &pinctrl_imem;
> + pinctrl7 = &pinctrl_nfc;
> + pinctrl8 = &pinctrl_peric;
> + pinctrl9 = &pinctrl_touch;
> + serial0 = &serial_0;
> + serial1 = &serial_1;
> + serial2 = &serial_2;
> + serial3 = &serial_3;
> + spi0 = &spi_0;
> + spi1 = &spi_1;
> + spi2 = &spi_2;
> + spi3 = &spi_3;
> + spi4 = &spi_4;
> + };
> +
> + chosen {
> + stdout-path = &serial_1;
> + };
> +
> + memory@20000000 {
> + device_type = "memory";
> + reg = <0x0 0x20000000 0x0 0xc0000000>;
> + };
> +
> + gpio-keys {
> + compatible = "gpio-keys";
> +
> + power-key {
> + gpios = <&gpa2 7 GPIO_ACTIVE_LOW>;
> + linux,code = <KEY_POWER>;
> + label = "power key";
> + debounce-interval = <10>;
> + };
> +
> + volume-up-key {
> + gpios = <&gpa2 0 GPIO_ACTIVE_LOW>;
> + linux,code = <KEY_VOLUMEUP>;
> + label = "volume-up key";
> + debounce-interval = <10>;
> + };
> +
> + volume-down-key {
> + gpios = <&gpa2 1 GPIO_ACTIVE_LOW>;
> + linux,code = <KEY_VOLUMEDOWN>;
> + label = "volume-down key";
> + debounce-interval = <10>;
> + };
> +
> + homepage-key {
> + gpios = <&gpa0 3 GPIO_ACTIVE_LOW>;
> + linux,code = <KEY_MENU>;
> + label = "homepage key";
> + debounce-interval = <10>;
> + };
> + };
> +
> + i2c_max98504: i2c-gpio-0 {
> + compatible = "i2c-gpio";
> + gpios = <&gpd0 1 GPIO_ACTIVE_HIGH /* SPK_AMP_SDA */
> + &gpd0 0 GPIO_ACTIVE_HIGH /* SPK_AMP_SCL */ >;
> + i2c-gpio,delay-us = <2>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "okay";
> +
> + max98504: max98504@31 {
> + compatible = "maxim,max98504";
> + reg = <0x31>;
> + maxim,rx-path = <1>;
> + maxim,tx-path = <1>;
> + maxim,tx-channel-mask = <3>;
> + maxim,tx-channel-source = <2>;
> + };
> + };
> +
> + sound {
> + compatible = "samsung,tm2-audio";
> + audio-codec = <&wm5110>;
> + i2s-controller = <&i2s0>;
> + audio-amplifier = <&max98504>;
> + mic-bias-gpios = <&gpr3 2 GPIO_ACTIVE_HIGH>;
> + model = "wm5110";
> + samsung,audio-routing =
> + /* Headphone */
> + "HP", "HPOUT1L",
> + "HP", "HPOUT1R",
> +
> + /* Speaker */
> + "SPK", "SPKOUT",
> + "SPKOUT", "HPOUT2L",
> + "SPKOUT", "HPOUT2R",
> +
> + /* Receiver */
> + "RCV", "HPOUT3L",
> + "RCV", "HPOUT3R";
> + status = "okay";
> + };
> +};
> +
> +&adc {
> + vdd-supply = <&ldo3_reg>;
> + status = "okay";
> +
> + thermistor-ap {
> + compatible = "murata,ncp03wf104";
> + pullup-uv = <1800000>;
> + pullup-ohm = <100000>;
> + pulldown-ohm = <0>;
> + io-channels = <&adc 0>;
> + };
> +
> + thermistor-battery {
> + compatible = "murata,ncp03wf104";
> + pullup-uv = <1800000>;
> + pullup-ohm = <100000>;
> + pulldown-ohm = <0>;
> + io-channels = <&adc 1>;
> + #thermal-sensor-cells = <0>;
> + };
> +
> + thermistor-charger {
> + compatible = "murata,ncp03wf104";
> + pullup-uv = <1800000>;
> + pullup-ohm = <100000>;
> + pulldown-ohm = <0>;
> + io-channels = <&adc 2>;
> + };
> +};
> +
> +&cpu0 {
> + cpu-supply = <&buck3_reg>;
> +};
> +
> +&cpu4 {
> + cpu-supply = <&buck2_reg>;
> +};
> +
> +&decon {
> + status = "okay";
> +
> + i80-if-timings {
> + };
> +};
> +
> +&dsi {
> + status = "okay";
> + vddcore-supply = <&ldo6_reg>;
> + vddio-supply = <&ldo7_reg>;
> + samsung,pll-clock-frequency = <24000000>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&te_irq>;
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@1 {
> + reg = <1>;
> +
> + dsi_out: endpoint {
> + samsung,burst-clock-frequency = <512000000>;
> + samsung,esc-clock-frequency = <16000000>;
> + };
> + };
> + };
> +};
> +
> +&hsi2c_0 {
> + status = "okay";
> + clock-frequency = <2500000>;
> +
> + s2mps13-pmic@66 {
> + compatible = "samsung,s2mps13-pmic";
> + interrupt-parent = <&gpa0>;
> + interrupts = <7 IRQ_TYPE_NONE>;
> + reg = <0x66>;
> + samsung,s2mps11-wrstbi-ground;
> +
> + s2mps13_osc: clocks {
> + compatible = "samsung,s2mps13-clk";
> + #clock-cells = <1>;
> + clock-output-names = "s2mps13_ap", "s2mps13_cp",
> + "s2mps13_bt";
> + };
> +
> + regulators {
> + ldo1_reg: LDO1 {
> + regulator-name = "VDD_ALIVE_0.9V_AP";
> + regulator-min-microvolt = <900000>;
> + regulator-max-microvolt = <900000>;
> + regulator-always-on;
> + };
> +
> + ldo2_reg: LDO2 {
> + regulator-name = "VDDQ_MMC2_2.8V_AP";
> + regulator-min-microvolt = <2800000>;
> + regulator-max-microvolt = <2800000>;
> + regulator-always-on;
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + ldo3_reg: LDO3 {
> + regulator-name = "VDD1_E_1.8V_AP";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-always-on;
> + };
> +
> + ldo4_reg: LDO4 {
> + regulator-name = "VDD10_MIF_PLL_1.0V_AP";
> + regulator-min-microvolt = <1300000>;
> + regulator-max-microvolt = <1300000>;
> + regulator-always-on;
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + ldo5_reg: LDO5 {
> + regulator-name = "VDD10_DPLL_1.0V_AP";
> + regulator-min-microvolt = <1000000>;
> + regulator-max-microvolt = <1000000>;
> + regulator-always-on;
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + ldo6_reg: LDO6 {
> + regulator-name = "VDD10_MIPI2L_1.0V_AP";
> + regulator-min-microvolt = <1000000>;
> + regulator-max-microvolt = <1000000>;
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + ldo7_reg: LDO7 {
> + regulator-name = "VDD18_MIPI2L_1.8V_AP";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + };
> +
> + ldo8_reg: LDO8 {
> + regulator-name = "VDD18_LLI_1.8V_AP";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-always-on;
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + ldo9_reg: LDO9 {
> + regulator-name = "VDD18_ABB_ETC_1.8V_AP";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-always-on;
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + ldo10_reg: LDO10 {
> + regulator-name = "VDD33_USB30_3.0V_AP";
> + regulator-min-microvolt = <3000000>;
> + regulator-max-microvolt = <3000000>;
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + ldo11_reg: LDO11 {
> + regulator-name = "VDD_INT_M_1.0V_AP";
> + regulator-min-microvolt = <1000000>;
> + regulator-max-microvolt = <1000000>;
> + regulator-always-on;
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + ldo12_reg: LDO12 {
> + regulator-name = "VDD_KFC_M_1.1V_AP";
> + regulator-min-microvolt = <800000>;
> + regulator-max-microvolt = <1350000>;
> + regulator-always-on;
> + };
> +
> + ldo13_reg: LDO13 {
> + regulator-name = "VDD_G3D_M_0.95V_AP";
> + regulator-min-microvolt = <950000>;
> + regulator-max-microvolt = <950000>;
> + regulator-always-on;
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + ldo14_reg: LDO14 {
> + regulator-name = "VDDQ_M1_LDO_1.2V_AP";
> + regulator-min-microvolt = <1200000>;
> + regulator-max-microvolt = <1200000>;
> + regulator-always-on;
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + ldo15_reg: LDO15 {
> + regulator-name = "VDDQ_M2_LDO_1.2V_AP";
> + regulator-min-microvolt = <1200000>;
> + regulator-max-microvolt = <1200000>;
> + regulator-always-on;
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + ldo16_reg: LDO16 {
> + regulator-name = "VDDQ_EFUSE";
> + regulator-min-microvolt = <1400000>;
> + regulator-max-microvolt = <3400000>;
> + regulator-always-on;
> + };
> +
> + ldo17_reg: LDO17 {
> + regulator-name = "V_TFLASH_2.8V_AP";
> + regulator-min-microvolt = <2800000>;
> + regulator-max-microvolt = <2800000>;
> + };
> +
> + ldo18_reg: LDO18 {
> + regulator-name = "V_CODEC_1.8V_AP";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + };
> +
> + ldo19_reg: LDO19 {
> + regulator-name = "VDDA_1.8V_COMP";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-always-on;
> + };
> +
> + ldo20_reg: LDO20 {
> + regulator-name = "VCC_2.8V_AP";
> + regulator-min-microvolt = <2800000>;
> + regulator-max-microvolt = <2800000>;
> + regulator-always-on;
> + };
> +
> + ldo21_reg: LDO21 {
> + regulator-name = "VT_CAM_1.8V";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + };
> +
> + ldo22_reg: LDO22 {
> + regulator-name = "CAM_IO_1.8V_AP";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + };
> +
> + ldo23_reg: LDO23 {
> + regulator-name = "CAM_SEN_CORE_1.2V_AP";
> + regulator-min-microvolt = <1050000>;
> + regulator-max-microvolt = <1200000>;
> + };
> +
> + ldo24_reg: LDO24 {
> + regulator-name = "VT_CAM_1.2V";
> + regulator-min-microvolt = <1200000>;
> + regulator-max-microvolt = <1200000>;
> + };
> +
> + ldo25_reg: LDO25 {
> + regulator-name = "CAM_SEN_A2.8V_AP";
> + regulator-min-microvolt = <2800000>;
> + regulator-max-microvolt = <2800000>;
> + };
> +
> + ldo26_reg: LDO26 {
> + regulator-name = "CAM_AF_2.8V_AP";
> + regulator-min-microvolt = <2800000>;
> + regulator-max-microvolt = <2800000>;
> + };
> +
> + ldo27_reg: LDO27 {
> + regulator-name = "VCC_3.0V_LCD_AP";
> + regulator-min-microvolt = <3000000>;
> + regulator-max-microvolt = <3000000>;
> + };
> +
> + ldo28_reg: LDO28 {
> + regulator-name = "VCC_1.8V_LCD_AP";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + };
> +
> + ldo29_reg: LDO29 {
> + regulator-name = "VT_CAM_2.8V";
> + regulator-min-microvolt = <3000000>;
> + regulator-max-microvolt = <3000000>;
> + };
> +
> + ldo30_reg: LDO30 {
> + regulator-name = "TSP_AVDD_3.3V_AP";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + };
> +
> + ldo31_reg: LDO31 {
> + regulator-name = "TSP_VDD_1.85V_AP";
> + regulator-min-microvolt = <1850000>;
> + regulator-max-microvolt = <1850000>;
> + };
> +
> + ldo32_reg: LDO32 {
> + regulator-name = "VTOUCH_1.8V_AP";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + };
> +
> + ldo33_reg: LDO33 {
> + regulator-name = "VTOUCH_LED_3.3V";
> + regulator-min-microvolt = <2500000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-ramp-delay = <12500>;
> + };
> +
> + ldo34_reg: LDO34 {
> + regulator-name = "VCC_1.8V_MHL_AP";
> + regulator-min-microvolt = <1000000>;
> + regulator-max-microvolt = <2100000>;
> + };
> +
> + ldo35_reg: LDO35 {
> + regulator-name = "OIS_VM_2.8V";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <2800000>;
> + };
> +
> + ldo36_reg: LDO36 {
> + regulator-name = "VSIL_1.0V";
> + regulator-min-microvolt = <1000000>;
> + regulator-max-microvolt = <1000000>;
> + };
> +
> + ldo37_reg: LDO37 {
> + regulator-name = "VF_1.8V";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + };
> +
> + ldo38_reg: LDO38 {
> + regulator-name = "VCC_3.0V_MOTOR_AP";
> + regulator-min-microvolt = <3000000>;
> + regulator-max-microvolt = <3000000>;
> + };
> +
> + ldo39_reg: LDO39 {
> + regulator-name = "V_HRM_1.8V";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + };
> +
> + ldo40_reg: LDO40 {
> + regulator-name = "V_HRM_3.3V";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + };
> +
> + buck1_reg: BUCK1 {
> + regulator-name = "VDD_MIF_0.9V_AP";
> + regulator-min-microvolt = <600000>;
> + regulator-max-microvolt = <1500000>;
> + regulator-always-on;
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + buck2_reg: BUCK2 {
> + regulator-name = "VDD_EGL_1.0V_AP";
> + regulator-min-microvolt = <900000>;
> + regulator-max-microvolt = <1300000>;
> + regulator-always-on;
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + buck3_reg: BUCK3 {
> + regulator-name = "VDD_KFC_1.0V_AP";
> + regulator-min-microvolt = <800000>;
> + regulator-max-microvolt = <1200000>;
> + regulator-always-on;
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + buck4_reg: BUCK4 {
> + regulator-name = "VDD_INT_0.95V_AP";
> + regulator-min-microvolt = <600000>;
> + regulator-max-microvolt = <1500000>;
> + regulator-always-on;
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + buck5_reg: BUCK5 {
> + regulator-name = "VDD_DISP_CAM0_0.9V_AP";
> + regulator-min-microvolt = <600000>;
> + regulator-max-microvolt = <1500000>;
> + regulator-always-on;
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + buck6_reg: BUCK6 {
> + regulator-name = "VDD_G3D_0.9V_AP";
> + regulator-min-microvolt = <600000>;
> + regulator-max-microvolt = <1500000>;
> + regulator-always-on;
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + buck7_reg: BUCK7 {
> + regulator-name = "VDD_MEM1_1.2V_AP";
> + regulator-min-microvolt = <1200000>;
> + regulator-max-microvolt = <1200000>;
> + regulator-always-on;
> + };
> +
> + buck8_reg: BUCK8 {
> + regulator-name = "VDD_LLDO_1.35V_AP";
> + regulator-min-microvolt = <1350000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-always-on;
> + };
> +
> + buck9_reg: BUCK9 {
> + regulator-name = "VDD_MLDO_2.0V_AP";
> + regulator-min-microvolt = <1350000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-always-on;
> + };
> +
> + buck10_reg: BUCK10 {
> + regulator-name = "vdd_mem2";
> + regulator-min-microvolt = <550000>;
> + regulator-max-microvolt = <1500000>;
> + regulator-always-on;
> + };
> + };
> + };
> +};
> +
> +&hsi2c_8 {
> + status = "okay";
> +
> + max77843@66 {
> + compatible = "maxim,max77843";
> + interrupt-parent = <&gpa1>;
> + interrupts = <5 IRQ_TYPE_EDGE_FALLING>;
> + reg = <0x66>;
> +
> + muic: max77843-muic {
> + compatible = "maxim,max77843-muic";
> + };
> +
> + regulators {
> + compatible = "maxim,max77843-regulator";
> + safeout1_reg: SAFEOUT1 {
> + regulator-name = "SAFEOUT1";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <4950000>;
> + };
> +
> + safeout2_reg: SAFEOUT2 {
> + regulator-name = "SAFEOUT2";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <4950000>;
> + };
> +
> + charger_reg: CHARGER {
> + regulator-name = "CHARGER";
> + regulator-min-microamp = <100000>;
> + regulator-max-microamp = <3150000>;
> + };
> + };
> +
> + haptic: max77843-haptic {
> + compatible = "maxim,max77843-haptic";
> + haptic-supply = <&ldo38_reg>;
> + pwms = <&pwm 0 33670 0>;
> + pwm-names = "haptic";
> + };
> + };
> +};
> +
> +&i2s0 {
> + status = "okay";
> +};
> +
> +&mshc_0 {
> + status = "okay";
> + num-slots = <1>;
> + non-removable;
> + card-detect-delay = <200>;
> + samsung,dw-mshc-ciu-div = <3>;
> + samsung,dw-mshc-sdr-timing = <0 4>;
> + samsung,dw-mshc-ddr-timing = <0 2>;
> + samsung,dw-mshc-hs400-timing = <0 3>;
> + samsung,read-strobe-delay = <90>;
> + fifo-depth = <0x80>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_qrdy &sd0_bus1 &sd0_bus4
> + &sd0_bus8 &sd0_rdqs>;
> + bus-width = <8>;
> + assigned-clocks = <&cmu_top CLK_SCLK_MMC0_FSYS>;
> + assigned-clock-rates = <800000000>;
> +};
> +
> +&pinctrl_alive {
> + pinctrl-names = "default";
> + pinctrl-0 = <&initial_alive>;
> +
> + initial_alive: initial-state {
> + PIN(IN, gpa0-0, DOWN, LV1);
> + PIN(IN, gpa0-1, NONE, LV1);
> + PIN(IN, gpa0-2, DOWN, LV1);
> + PIN(IN, gpa0-3, NONE, LV1);
> + PIN(IN, gpa0-4, NONE, LV1);
> + PIN(IN, gpa0-5, DOWN, LV1);
> + PIN(IN, gpa0-6, NONE, LV1);
> + PIN(IN, gpa0-7, NONE, LV1);
> +
> + PIN(IN, gpa1-0, UP, LV1);
> + PIN(IN, gpa1-1, NONE, LV1);
> + PIN(IN, gpa1-2, NONE, LV1);
> + PIN(IN, gpa1-3, DOWN, LV1);
> + PIN(IN, gpa1-4, DOWN, LV1);
> + PIN(IN, gpa1-5, NONE, LV1);
> + PIN(IN, gpa1-6, NONE, LV1);
> + PIN(IN, gpa1-7, NONE, LV1);
> +
> + PIN(IN, gpa2-0, NONE, LV1);
> + PIN(IN, gpa2-1, NONE, LV1);
> + PIN(IN, gpa2-2, NONE, LV1);
> + PIN(IN, gpa2-3, DOWN, LV1);
> + PIN(IN, gpa2-4, NONE, LV1);
> + PIN(IN, gpa2-5, DOWN, LV1);
> + PIN(IN, gpa2-6, DOWN, LV1);
> + PIN(IN, gpa2-7, NONE, LV1);
> +
> + PIN(IN, gpa3-0, DOWN, LV1);
> + PIN(IN, gpa3-1, DOWN, LV1);
> + PIN(IN, gpa3-2, NONE, LV1);
> + PIN(IN, gpa3-3, DOWN, LV1);
> + PIN(IN, gpa3-4, NONE, LV1);
> + PIN(IN, gpa3-5, DOWN, LV1);
> + PIN(IN, gpa3-6, DOWN, LV1);
> + PIN(IN, gpa3-7, DOWN, LV1);
> +
> + PIN(IN, gpf1-0, NONE, LV1);
> + PIN(IN, gpf1-1, NONE, LV1);
> + PIN(IN, gpf1-2, DOWN, LV1);
> + PIN(IN, gpf1-4, UP, LV1);
> + PIN(OUT, gpf1-5, NONE, LV1);
> + PIN(IN, gpf1-6, DOWN, LV1);
> + PIN(IN, gpf1-7, DOWN, LV1);
> +
> + PIN(IN, gpf2-0, DOWN, LV1);
> + PIN(IN, gpf2-1, DOWN, LV1);
> + PIN(IN, gpf2-2, DOWN, LV1);
> + PIN(IN, gpf2-3, DOWN, LV1);
> +
> + PIN(IN, gpf3-0, DOWN, LV1);
> + PIN(IN, gpf3-1, DOWN, LV1);
> + PIN(IN, gpf3-2, NONE, LV1);
> + PIN(IN, gpf3-3, DOWN, LV1);
> +
> + PIN(IN, gpf4-0, DOWN, LV1);
> + PIN(IN, gpf4-1, DOWN, LV1);
> + PIN(IN, gpf4-2, DOWN, LV1);
> + PIN(IN, gpf4-3, DOWN, LV1);
> + PIN(IN, gpf4-4, DOWN, LV1);
> + PIN(IN, gpf4-5, DOWN, LV1);
> + PIN(IN, gpf4-6, DOWN, LV1);
> + PIN(IN, gpf4-7, DOWN, LV1);
> +
> + PIN(IN, gpf5-0, DOWN, LV1);
> + PIN(IN, gpf5-1, DOWN, LV1);
> + PIN(IN, gpf5-2, DOWN, LV1);
> + PIN(IN, gpf5-3, DOWN, LV1);
> + PIN(OUT, gpf5-4, NONE, LV1);
> + PIN(IN, gpf5-5, DOWN, LV1);
> + PIN(IN, gpf5-6, DOWN, LV1);
> + PIN(IN, gpf5-7, DOWN, LV1);
> + };
> +
> + te_irq: te_irq {
> + samsung,pins = "gpf1-3";
> + samsung,pin-function = <0xf>;
> + };
> +};
> +
> +&pinctrl_cpif {
> + pinctrl-names = "default";
> + pinctrl-0 = <&initial_cpif>;
> +
> + initial_cpif: initial-state {
> + PIN(IN, gpv6-0, DOWN, LV1);
> + PIN(IN, gpv6-1, DOWN, LV1);
> + };
> +};
> +
> +&pinctrl_ese {
> + pinctrl-names = "default";
> + pinctrl-0 = <&initial_ese>;
> +
> + initial_ese: initial-state {
> + PIN(IN, gpj2-0, DOWN, LV1);
> + PIN(IN, gpj2-1, DOWN, LV1);
> + PIN(IN, gpj2-2, DOWN, LV1);
> + };
> +};
> +
> +&pinctrl_fsys {
> + pinctrl-names = "default";
> + pinctrl-0 = <&initial_fsys>;
> +
> + initial_fsys: initial-state {
> + PIN(IN, gpr3-0, NONE, LV1);
> + PIN(IN, gpr3-1, DOWN, LV1);
> + PIN(IN, gpr3-2, DOWN, LV1);
> + PIN(IN, gpr3-3, DOWN, LV1);
> + PIN(IN, gpr3-7, NONE, LV1);
> + };
> +};
> +
> +&pinctrl_imem {
> + pinctrl-names = "default";
> + pinctrl-0 = <&initial_imem>;
> +
> + initial_imem: initial-state {
> + PIN(IN, gpf0-0, UP, LV1);
> + PIN(IN, gpf0-1, UP, LV1);
> + PIN(IN, gpf0-2, DOWN, LV1);
> + PIN(IN, gpf0-3, UP, LV1);
> + PIN(IN, gpf0-4, DOWN, LV1);
> + PIN(IN, gpf0-5, NONE, LV1);
> + PIN(IN, gpf0-6, DOWN, LV1);
> + PIN(IN, gpf0-7, UP, LV1);
> + };
> +};
> +
> +&pinctrl_nfc {
> + pinctrl-names = "default";
> + pinctrl-0 = <&initial_nfc>;
> +
> + initial_nfc: initial-state {
> + PIN(IN, gpj0-2, DOWN, LV1);
> + };
> +};
> +
> +&pinctrl_peric {
> + pinctrl-names = "default";
> + pinctrl-0 = <&initial_peric>;
> +
> + initial_peric: initial-state {
> + PIN(IN, gpv7-0, DOWN, LV1);
> + PIN(IN, gpv7-1, DOWN, LV1);
> + PIN(IN, gpv7-2, NONE, LV1);
> + PIN(IN, gpv7-3, DOWN, LV1);
> + PIN(IN, gpv7-4, DOWN, LV1);
> + PIN(IN, gpv7-5, DOWN, LV1);
> +
> + PIN(IN, gpb0-4, DOWN, LV1);
> +
> + PIN(IN, gpc0-2, DOWN, LV1);
> + PIN(IN, gpc0-5, DOWN, LV1);
> + PIN(IN, gpc0-7, DOWN, LV1);
> +
> + PIN(IN, gpc1-1, DOWN, LV1);
> +
> + PIN(IN, gpc3-4, NONE, LV1);
> + PIN(IN, gpc3-5, NONE, LV1);
> + PIN(IN, gpc3-6, NONE, LV1);
> + PIN(IN, gpc3-7, NONE, LV1);
> +
> + PIN(OUT, gpg0-0, NONE, LV1);
> + PIN(FUNC1, gpg0-1, DOWN, LV1);
> +
> + PIN(IN, gpd2-5, DOWN, LV1);
> +
> + PIN(IN, gpd4-0, NONE, LV1);
> + PIN(IN, gpd4-1, DOWN, LV1);
> + PIN(IN, gpd4-2, DOWN, LV1);
> + PIN(IN, gpd4-3, DOWN, LV1);
> + PIN(IN, gpd4-4, DOWN, LV1);
> +
> + PIN(IN, gpd6-3, DOWN, LV1);
> +
> + PIN(IN, gpd8-1, UP, LV1);
> +
> + PIN(IN, gpg1-0, DOWN, LV1);
> + PIN(IN, gpg1-1, DOWN, LV1);
> + PIN(IN, gpg1-2, DOWN, LV1);
> + PIN(IN, gpg1-3, DOWN, LV1);
> + PIN(IN, gpg1-4, DOWN, LV1);
> +
> + PIN(IN, gpg2-0, DOWN, LV1);
> + PIN(IN, gpg2-1, DOWN, LV1);
> +
> + PIN(IN, gpg3-0, DOWN, LV1);
> + PIN(IN, gpg3-1, DOWN, LV1);
> + PIN(IN, gpg3-5, DOWN, LV1);
> + PIN(IN, gpg3-7, DOWN, LV1);
> + };
> +};
> +
> +&pinctrl_touch {
> + pinctrl-names = "default";
> + pinctrl-0 = <&initial_touch>;
> +
> + initial_touch: initial-state {
> + PIN(IN, gpj1-2, DOWN, LV1);
> + };
> +};
> +
> +&pwm {
> + pinctrl-0 = <&pwm0_out>;
> + pinctrl-names = "default";
> + status = "okay";
> +};
> +
> +&mic {
> + status = "okay";
> +
> + i80-if-timings {
> + };
> +};
> +
> +&serial_1 {
> + status = "okay";
> +};
> +
> +&serial_3 {
> + assigned-clocks = <&cmu_aud CLK_MOUT_AUD_PLL_USER>;
> + assigned-clock-parents = <&cmu_top CLK_FOUT_AUD_PLL>;
> + status = "okay";
> +};
> +
> +&spi_1 {
> + cs-gpios = <&gpd6 3 GPIO_ACTIVE_HIGH>;
> + status = "okay";
> +
> + wm5110: wm5110-codec@0 {
> + compatible = "wlf,wm5110";
> + reg = <0x0>;
> + spi-max-frequency = <20000000>;
> + interrupt-parent = <&gpa0>;
> + interrupts = <4 IRQ_TYPE_NONE>;
> + clocks = <&pmu_system_controller 0>,
> + <&s2mps13_osc S2MPS11_CLK_BT>;
> + clock-names = "mclk1", "mclk2";
> +
> + gpio-controller;
> + #gpio-cells = <2>;
> +
> + wlf,micd-detect-debounce = <300>;
> + wlf,micd-bias-start-time = <0x1>;
> + wlf,micd-rate = <0x7>;
> + wlf,micd-dbtime = <0x1>;
> + wlf,micd-force-micbias;
> + wlf,micd-configs = <0x0 1 0>;
> + wlf,hpdet-channel = <1>;
> + wlf,gpsw = <0x1>;
> + wlf,inmode = <2 0 2 0>;
> +
> + wlf,reset = <&gpc0 7 GPIO_ACTIVE_HIGH>;
> + wlf,ldoena = <&gpf0 0 GPIO_ACTIVE_HIGH>;
> +
> + /* core supplies */
> + AVDD-supply = <&ldo18_reg>;
> + DBVDD1-supply = <&ldo18_reg>;
> + CPVDD-supply = <&ldo18_reg>;
> + DBVDD2-supply = <&ldo18_reg>;
> + DBVDD3-supply = <&ldo18_reg>;
> +
> + controller-data {
> + samsung,spi-feedback-delay = <0>;
> + };
> + };
> +};
> +
> +&timer {
> + clock-frequency = <24000000>;
> +};
> +
> +&tmu_atlas0 {
> + vtmu-supply = <&ldo3_reg>;
> + status = "okay";
> +};
> +
> +&tmu_apollo {
> + vtmu-supply = <&ldo3_reg>;
> + status = "okay";
> +};
> +
> +&tmu_g3d {
> + vtmu-supply = <&ldo3_reg>;
> + status = "okay";
> +};
> +
> +&usbdrd30 {
> + vdd33-supply = <&ldo10_reg>;
> + vdd10-supply = <&ldo6_reg>;
> + status = "okay";
> +};
> +
> +&usbdrd_dwc3_0 {
> + dr_mode = "otg";
> +};
> +
> +&usbdrd30_phy {
> + vbus-supply = <&safeout1_reg>;
> + status = "okay";
> +};
> +
> +&xxti {
> + clock-frequency = <24000000>;
> +};
> --
> 1.9.1
>
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| From | Krzysztof Kozlowski <krzk@kernel.org> |
|---|---|
| Date | 2016-11-03 21:20 +0100 |
| Subject | Re: [PATCH v3 4/5] arm64: dts: exynos: Add dts file for Exynos5433-based TM2 board |
| Message-ID | <szwEq-f4-21@gated-at.bofh.it> |
| In reply to | #1514328 |
On Thu, Nov 03, 2016 at 03:39:08PM +0900, Chanwoo Choi wrote: > This patch adds the Device Tree source for Exynos5433-based Samsung TM2 board. > This board fully support the all things for mobile target. > > This patch supports the following devices: > 1. basic SoC > - Initial booting for Samsung Exynos5433 SoC > - DRAM LPDDR3 (3GB) > - eMMC (32GB) > - ARM architecture timer > > 2. power management devices > - Sasmung S2MPS13 PMIC for the power supply > - CPUFREQ for big.LITTLE cores > - TMU for big.LITTLE cores and GPU > - ADC with thermistor to measure the temperature of AP/Battery/Charger > - Maxim MAX77843 Interface PMIC (MUIC/Haptic/Regulator) > > 3. sound devices > - I2S for sound bus > - LPASS for sound power control > - Wolfson WM5110 for sound codec > - Maxim MAX98504 for speaker amplifier > - TM2 ASoC Machine device driver node > > 3. display devices > - DECON, DSI and MIC for the panel output > > 4. usb devices > - USB 3.0 DRD (Dual Role Device) > - USB 3.0 Host controller > > 5. storage devices > - MSHC (Mobile Storage Host Controller) for eMMC device > > 6. misc devices > - gpio-keys (power, volume up/down, home key) > - PWM (Pulse Width Modulation Timer) > > Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> > Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> > Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com> > Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com> > Signed-off-by: Inki Dae <inki.dae@samsung.com> > Signed-off-by: Jonghwa Lee <jonghwa3.lee@samsung.com> > Signed-off-by: Beomho Seo <beomho.seo@samsung.com> > Signed-off-by: Jaewon Kim <jaewon02.kim@samsung.com> > Signed-off-by: Hyungwon Hwang <human.hwang@samsung.com> > Signed-off-by: Inha Song <ideal.song@samsung.com> > Signed-off-by: Ingi kim <ingi2.kim@samsung.com> > Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> > Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> > Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> > Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> > Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> > Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com> > --- > .../bindings/arm/samsung/samsung-boards.txt | 1 + > arch/arm64/boot/dts/exynos/Makefile | 4 +- > arch/arm64/boot/dts/exynos/exynos5433-tm2.dts | 974 +++++++++++++++++++++ > 3 files changed, 978 insertions(+), 1 deletion(-) > create mode 100644 arch/arm64/boot/dts/exynos/exynos5433-tm2.dts Thanks, applied. Best regards, Krzysztof
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| From | Chanwoo Choi <cw00.choi@samsung.com> |
|---|---|
| Date | 2016-11-03 07:50 +0100 |
| Subject | [PATCH v3 1/5] pinctrl: samsung: Add the support the multiple IORESOURCE_MEM for one pin-bank |
| Message-ID | <szk0x-mc-3@gated-at.bofh.it> |
| In reply to | #1514324 |
This patch supports the multiple IORESOURCE_MEM resources for one pin-bank.
In the pre-existing Exynos series, the registers of the gpio bank are included
in the one memory map. But, some gpio bank need to support the one more memory
map (IORESOURCE_MEM) because the registers of gpio bank are separated into
the different memory map.
For example,
The both ALIVE and IMEM domain have the different memory base address.
The GFP[1-5] of exynos5433 are composed as following:
- ALIVE domain : WEINT_* registers
- IMEM domain : CON/DAT/PUD/DRV/CONPDN/PUDPDN register
Cc: Tomasz Figa <tomasz.figa@gmail.com>
Cc: Krzysztof Kozlowski <krzk@kernel.org>
Cc: Sylwester Nawrocki <s.nawrocki@samsung.com>
Cc: Kukjin Kim <kgene@kernel.org>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: linux-gpio@vger.kernel.org
Suggested-by: Tomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
---
.../bindings/pinctrl/samsung-pinctrl.txt | 19 ++++++++++
drivers/pinctrl/samsung/pinctrl-exynos.c | 39 +++++++++------------
drivers/pinctrl/samsung/pinctrl-exynos.h | 11 ++++++
drivers/pinctrl/samsung/pinctrl-samsung.c | 40 ++++++++++++++--------
drivers/pinctrl/samsung/pinctrl-samsung.h | 10 ++++--
5 files changed, 80 insertions(+), 39 deletions(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt
index d49e22d2a8b5..1baf19eecabf 100644
--- a/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt
@@ -19,11 +19,30 @@ Required Properties:
- "samsung,exynos5260-pinctrl": for Exynos5260 compatible pin-controller.
- "samsung,exynos5410-pinctrl": for Exynos5410 compatible pin-controller.
- "samsung,exynos5420-pinctrl": for Exynos5420 compatible pin-controller.
+ - "samsung,exynos5433-pinctrl": for Exynos5433 compatible pin-controller.
- "samsung,exynos7-pinctrl": for Exynos7 compatible pin-controller.
- reg: Base address of the pin controller hardware module and length of
the address space it occupies.
+ - reg: Second base address of the pin controller if the specific registers
+ of the pin controller are separated into the different base address.
+
+ Eg: GPF[1-5] of Exynos5433 are separated into the two base address.
+ - First base address is for GPAx and GPF[1-5] external interrupt
+ registers.
+ - Second base address is for GPF[1-5] pinctrl registers.
+
+ pinctrl_0: pinctrl@10580000 {
+ compatible = "samsung,exynos5433-pinctrl";
+ reg = <0x10580000 0x1a20>, <0x11090000 0x100>;
+
+ wakeup-interrupt-controller {
+ compatible = "samsung,exynos7-wakeup-eint";
+ interrupts = <0 16 0>;
+ };
+ };
+
- Pin banks as child nodes: Pin banks of the controller are represented by child
nodes of the controller node. Bank name is taken from name of the node. Each
bank node must contain following properties:
diff --git a/drivers/pinctrl/samsung/pinctrl-exynos.c b/drivers/pinctrl/samsung/pinctrl-exynos.c
index d32fa2b5ff82..d657b52dfdb5 100644
--- a/drivers/pinctrl/samsung/pinctrl-exynos.c
+++ b/drivers/pinctrl/samsung/pinctrl-exynos.c
@@ -61,16 +61,15 @@ static void exynos_irq_mask(struct irq_data *irqd)
struct irq_chip *chip = irq_data_get_irq_chip(irqd);
struct exynos_irq_chip *our_chip = to_exynos_irq_chip(chip);
struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(irqd);
- struct samsung_pinctrl_drv_data *d = bank->drvdata;
unsigned long reg_mask = our_chip->eint_mask + bank->eint_offset;
unsigned long mask;
unsigned long flags;
spin_lock_irqsave(&bank->slock, flags);
- mask = readl(d->virt_base + reg_mask);
+ mask = readl(bank->eint_base + reg_mask);
mask |= 1 << irqd->hwirq;
- writel(mask, d->virt_base + reg_mask);
+ writel(mask, bank->eint_base + reg_mask);
spin_unlock_irqrestore(&bank->slock, flags);
}
@@ -80,10 +79,9 @@ static void exynos_irq_ack(struct irq_data *irqd)
struct irq_chip *chip = irq_data_get_irq_chip(irqd);
struct exynos_irq_chip *our_chip = to_exynos_irq_chip(chip);
struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(irqd);
- struct samsung_pinctrl_drv_data *d = bank->drvdata;
unsigned long reg_pend = our_chip->eint_pend + bank->eint_offset;
- writel(1 << irqd->hwirq, d->virt_base + reg_pend);
+ writel(1 << irqd->hwirq, bank->eint_base + reg_pend);
}
static void exynos_irq_unmask(struct irq_data *irqd)
@@ -91,7 +89,6 @@ static void exynos_irq_unmask(struct irq_data *irqd)
struct irq_chip *chip = irq_data_get_irq_chip(irqd);
struct exynos_irq_chip *our_chip = to_exynos_irq_chip(chip);
struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(irqd);
- struct samsung_pinctrl_drv_data *d = bank->drvdata;
unsigned long reg_mask = our_chip->eint_mask + bank->eint_offset;
unsigned long mask;
unsigned long flags;
@@ -109,9 +106,9 @@ static void exynos_irq_unmask(struct irq_data *irqd)
spin_lock_irqsave(&bank->slock, flags);
- mask = readl(d->virt_base + reg_mask);
+ mask = readl(bank->eint_base + reg_mask);
mask &= ~(1 << irqd->hwirq);
- writel(mask, d->virt_base + reg_mask);
+ writel(mask, bank->eint_base + reg_mask);
spin_unlock_irqrestore(&bank->slock, flags);
}
@@ -121,7 +118,6 @@ static int exynos_irq_set_type(struct irq_data *irqd, unsigned int type)
struct irq_chip *chip = irq_data_get_irq_chip(irqd);
struct exynos_irq_chip *our_chip = to_exynos_irq_chip(chip);
struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(irqd);
- struct samsung_pinctrl_drv_data *d = bank->drvdata;
unsigned int shift = EXYNOS_EINT_CON_LEN * irqd->hwirq;
unsigned int con, trig_type;
unsigned long reg_con = our_chip->eint_con + bank->eint_offset;
@@ -152,10 +148,10 @@ static int exynos_irq_set_type(struct irq_data *irqd, unsigned int type)
else
irq_set_handler_locked(irqd, handle_level_irq);
- con = readl(d->virt_base + reg_con);
+ con = readl(bank->eint_base + reg_con);
con &= ~(EXYNOS_EINT_CON_MASK << shift);
con |= trig_type << shift;
- writel(con, d->virt_base + reg_con);
+ writel(con, bank->eint_base + reg_con);
return 0;
}
@@ -166,7 +162,6 @@ static int exynos_irq_request_resources(struct irq_data *irqd)
struct exynos_irq_chip *our_chip = to_exynos_irq_chip(chip);
struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(irqd);
const struct samsung_pin_bank_type *bank_type = bank->type;
- struct samsung_pinctrl_drv_data *d = bank->drvdata;
unsigned int shift = EXYNOS_EINT_CON_LEN * irqd->hwirq;
unsigned long reg_con = our_chip->eint_con + bank->eint_offset;
unsigned long flags;
@@ -188,10 +183,10 @@ static int exynos_irq_request_resources(struct irq_data *irqd)
spin_lock_irqsave(&bank->slock, flags);
- con = readl(d->virt_base + reg_con);
+ con = readl(bank->eint_base + reg_con);
con &= ~(mask << shift);
con |= EXYNOS_EINT_FUNC << shift;
- writel(con, d->virt_base + reg_con);
+ writel(con, bank->eint_base + reg_con);
spin_unlock_irqrestore(&bank->slock, flags);
@@ -206,7 +201,6 @@ static void exynos_irq_release_resources(struct irq_data *irqd)
struct exynos_irq_chip *our_chip = to_exynos_irq_chip(chip);
struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(irqd);
const struct samsung_pin_bank_type *bank_type = bank->type;
- struct samsung_pinctrl_drv_data *d = bank->drvdata;
unsigned int shift = EXYNOS_EINT_CON_LEN * irqd->hwirq;
unsigned long reg_con = our_chip->eint_con + bank->eint_offset;
unsigned long flags;
@@ -221,10 +215,10 @@ static void exynos_irq_release_resources(struct irq_data *irqd)
spin_lock_irqsave(&bank->slock, flags);
- con = readl(d->virt_base + reg_con);
+ con = readl(bank->eint_base + reg_con);
con &= ~(mask << shift);
con |= FUNC_INPUT << shift;
- writel(con, d->virt_base + reg_con);
+ writel(con, bank->eint_base + reg_con);
spin_unlock_irqrestore(&bank->slock, flags);
@@ -274,7 +268,7 @@ static irqreturn_t exynos_eint_gpio_irq(int irq, void *data)
struct samsung_pin_bank *bank = d->pin_banks;
unsigned int svc, group, pin, virq;
- svc = readl(d->virt_base + EXYNOS_SVC_OFFSET);
+ svc = readl(bank->eint_base + EXYNOS_SVC_OFFSET);
group = EXYNOS_SVC_GROUP(svc);
pin = svc & EXYNOS_SVC_NUM_MASK;
@@ -452,7 +446,6 @@ static void exynos_irq_demux_eint16_31(struct irq_desc *desc)
{
struct irq_chip *chip = irq_desc_get_chip(desc);
struct exynos_muxed_weint_data *eintd = irq_desc_get_handler_data(desc);
- struct samsung_pinctrl_drv_data *d = eintd->banks[0]->drvdata;
unsigned long pend;
unsigned long mask;
int i;
@@ -461,9 +454,9 @@ static void exynos_irq_demux_eint16_31(struct irq_desc *desc)
for (i = 0; i < eintd->nr_banks; ++i) {
struct samsung_pin_bank *b = eintd->banks[i];
- pend = readl(d->virt_base + b->irq_chip->eint_pend
+ pend = readl(b->eint_base + b->irq_chip->eint_pend
+ b->eint_offset);
- mask = readl(d->virt_base + b->irq_chip->eint_mask
+ mask = readl(b->eint_base + b->irq_chip->eint_mask
+ b->eint_offset);
exynos_irq_demux_eint(pend & ~mask, b->irq_domain);
}
@@ -581,7 +574,7 @@ static void exynos_pinctrl_suspend_bank(
struct samsung_pin_bank *bank)
{
struct exynos_eint_gpio_save *save = bank->soc_priv;
- void __iomem *regs = drvdata->virt_base;
+ void __iomem *regs = bank->eint_base;
save->eint_con = readl(regs + EXYNOS_GPIO_ECON_OFFSET
+ bank->eint_offset);
@@ -610,7 +603,7 @@ static void exynos_pinctrl_resume_bank(
struct samsung_pin_bank *bank)
{
struct exynos_eint_gpio_save *save = bank->soc_priv;
- void __iomem *regs = drvdata->virt_base;
+ void __iomem *regs = bank->eint_base;
pr_debug("%s: con %#010x => %#010x\n", bank->name,
readl(regs + EXYNOS_GPIO_ECON_OFFSET
diff --git a/drivers/pinctrl/samsung/pinctrl-exynos.h b/drivers/pinctrl/samsung/pinctrl-exynos.h
index 0f0f7cedb2dc..5821525a2c84 100644
--- a/drivers/pinctrl/samsung/pinctrl-exynos.h
+++ b/drivers/pinctrl/samsung/pinctrl-exynos.h
@@ -79,6 +79,17 @@
.name = id \
}
+#define EXYNOS_PIN_BANK_EINTW_EXT(pins, reg, id, offs, pctl_idx) \
+ { \
+ .type = &bank_type_alive, \
+ .pctl_offset = reg, \
+ .nr_pins = pins, \
+ .eint_type = EINT_TYPE_WKUP, \
+ .eint_offset = offs, \
+ .name = id, \
+ .pctl_res_idx = pctl_idx, \
+ } \
+
/**
* struct exynos_weint_data: irq specific data for all the wakeup interrupts
* generated by the external wakeup interrupt controller.
diff --git a/drivers/pinctrl/samsung/pinctrl-samsung.c b/drivers/pinctrl/samsung/pinctrl-samsung.c
index 620727fabe64..41e62391c33c 100644
--- a/drivers/pinctrl/samsung/pinctrl-samsung.c
+++ b/drivers/pinctrl/samsung/pinctrl-samsung.c
@@ -33,6 +33,9 @@
#include "../core.h"
#include "pinctrl-samsung.h"
+/* maximum number of the memory resources */
+#define SAMSUNG_PINCTRL_NUM_RESOURCES 2
+
/* list of all possible config options supported */
static struct pin_config {
const char *property;
@@ -345,7 +348,7 @@ static void pin_to_reg_bank(struct samsung_pinctrl_drv_data *drvdata,
((b->pin_base + b->nr_pins - 1) < pin))
b++;
- *reg = drvdata->virt_base + b->pctl_offset;
+ *reg = b->pctl_base + b->pctl_offset;
*offset = pin - b->pin_base;
if (bank)
*bank = b;
@@ -526,7 +529,7 @@ static void samsung_gpio_set_value(struct gpio_chip *gc,
void __iomem *reg;
u32 data;
- reg = bank->drvdata->virt_base + bank->pctl_offset;
+ reg = bank->pctl_base + bank->pctl_offset;
data = readl(reg + type->reg_offset[PINCFG_TYPE_DAT]);
data &= ~(1 << offset);
@@ -554,7 +557,7 @@ static int samsung_gpio_get(struct gpio_chip *gc, unsigned offset)
struct samsung_pin_bank *bank = gpiochip_get_data(gc);
const struct samsung_pin_bank_type *type = bank->type;
- reg = bank->drvdata->virt_base + bank->pctl_offset;
+ reg = bank->pctl_base + bank->pctl_offset;
data = readl(reg + type->reg_offset[PINCFG_TYPE_DAT]);
data >>= offset;
@@ -581,8 +584,8 @@ static int samsung_gpio_set_direction(struct gpio_chip *gc,
type = bank->type;
drvdata = bank->drvdata;
- reg = drvdata->virt_base + bank->pctl_offset +
- type->reg_offset[PINCFG_TYPE_FUNC];
+ reg = bank->pctl_base + bank->pctl_offset
+ + type->reg_offset[PINCFG_TYPE_FUNC];
mask = (1 << type->fld_width[PINCFG_TYPE_FUNC]) - 1;
shift = offset * type->fld_width[PINCFG_TYPE_FUNC];
@@ -979,6 +982,8 @@ static int samsung_gpiolib_unregister(struct platform_device *pdev,
const struct samsung_pin_bank_data *bdata;
const struct samsung_pin_ctrl *ctrl;
struct samsung_pin_bank *bank;
+ struct resource *res;
+ void __iomem *virt_base[SAMSUNG_PINCTRL_NUM_RESOURCES];
int i;
id = of_alias_get_id(node, "pinctrl");
@@ -997,6 +1002,17 @@ static int samsung_gpiolib_unregister(struct platform_device *pdev,
if (!d->pin_banks)
return ERR_PTR(-ENOMEM);
+ if (ctrl->nr_ext_resources + 1 > SAMSUNG_PINCTRL_NUM_RESOURCES)
+ return ERR_PTR(-EINVAL);
+
+ for (i = 0; i < ctrl->nr_ext_resources + 1; i++) {
+ res = platform_get_resource(pdev, IORESOURCE_MEM, i);
+ virt_base[i] = devm_ioremap(&pdev->dev, res->start,
+ resource_size(res));
+ if (IS_ERR(virt_base[i]))
+ return ERR_PTR(-EIO);
+ }
+
bank = d->pin_banks;
bdata = ctrl->pin_banks;
for (i = 0; i < ctrl->nr_banks; ++i, ++bdata, ++bank) {
@@ -1013,6 +1029,9 @@ static int samsung_gpiolib_unregister(struct platform_device *pdev,
bank->drvdata = d;
bank->pin_base = d->nr_pins;
d->nr_pins += bank->nr_pins;
+
+ bank->eint_base = virt_base[0];
+ bank->pctl_base = virt_base[bdata->pctl_res_idx];
}
for_each_child_of_node(node, np) {
@@ -1052,11 +1071,6 @@ static int samsung_pinctrl_probe(struct platform_device *pdev)
}
drvdata->dev = dev;
- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- drvdata->virt_base = devm_ioremap_resource(&pdev->dev, res);
- if (IS_ERR(drvdata->virt_base))
- return PTR_ERR(drvdata->virt_base);
-
res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
if (res)
drvdata->irq = res->start;
@@ -1094,12 +1108,11 @@ static int samsung_pinctrl_probe(struct platform_device *pdev)
static void samsung_pinctrl_suspend_dev(
struct samsung_pinctrl_drv_data *drvdata)
{
- void __iomem *virt_base = drvdata->virt_base;
int i;
for (i = 0; i < drvdata->nr_banks; i++) {
struct samsung_pin_bank *bank = &drvdata->pin_banks[i];
- void __iomem *reg = virt_base + bank->pctl_offset;
+ void __iomem *reg = bank->pctl_base + bank->pctl_offset;
const u8 *offs = bank->type->reg_offset;
const u8 *widths = bank->type->fld_width;
enum pincfg_type type;
@@ -1140,7 +1153,6 @@ static void samsung_pinctrl_suspend_dev(
*/
static void samsung_pinctrl_resume_dev(struct samsung_pinctrl_drv_data *drvdata)
{
- void __iomem *virt_base = drvdata->virt_base;
int i;
if (drvdata->resume)
@@ -1148,7 +1160,7 @@ static void samsung_pinctrl_resume_dev(struct samsung_pinctrl_drv_data *drvdata)
for (i = 0; i < drvdata->nr_banks; i++) {
struct samsung_pin_bank *bank = &drvdata->pin_banks[i];
- void __iomem *reg = virt_base + bank->pctl_offset;
+ void __iomem *reg = bank->pctl_base + bank->pctl_offset;
const u8 *offs = bank->type->reg_offset;
const u8 *widths = bank->type->fld_width;
enum pincfg_type type;
diff --git a/drivers/pinctrl/samsung/pinctrl-samsung.h b/drivers/pinctrl/samsung/pinctrl-samsung.h
index cd31bfaf62cb..043cb6c11180 100644
--- a/drivers/pinctrl/samsung/pinctrl-samsung.h
+++ b/drivers/pinctrl/samsung/pinctrl-samsung.h
@@ -116,6 +116,7 @@ struct samsung_pin_bank_type {
* struct samsung_pin_bank_data: represent a controller pin-bank (init data).
* @type: type of the bank (register offsets and bitfield widths)
* @pctl_offset: starting offset of the pin-bank registers.
+ * @pctl_res_idx: index of base address for pin-bank registers.
* @nr_pins: number of pins included in this bank.
* @eint_func: function to set in CON register to configure pin as EINT.
* @eint_type: type of the external interrupt supported by the bank.
@@ -126,6 +127,7 @@ struct samsung_pin_bank_type {
struct samsung_pin_bank_data {
const struct samsung_pin_bank_type *type;
u32 pctl_offset;
+ u8 pctl_res_idx;
u8 nr_pins;
u8 eint_func;
enum eint_type eint_type;
@@ -137,8 +139,10 @@ struct samsung_pin_bank_data {
/**
* struct samsung_pin_bank: represent a controller pin-bank.
* @type: type of the bank (register offsets and bitfield widths)
+ * @pctl_base: base address of the pin-bank registers
* @pctl_offset: starting offset of the pin-bank registers.
* @nr_pins: number of pins included in this bank.
+ * @eint_base: base address of the pin-bank EINT registers.
* @eint_func: function to set in CON register to configure pin as EINT.
* @eint_type: type of the external interrupt supported by the bank.
* @eint_mask: bit mask of pins which support EINT function.
@@ -157,8 +161,10 @@ struct samsung_pin_bank_data {
*/
struct samsung_pin_bank {
const struct samsung_pin_bank_type *type;
+ void __iomem *pctl_base;
u32 pctl_offset;
u8 nr_pins;
+ void __iomem *eint_base;
u8 eint_func;
enum eint_type eint_type;
u32 eint_mask;
@@ -182,6 +188,7 @@ struct samsung_pin_bank {
* struct samsung_pin_ctrl: represent a pin controller.
* @pin_banks: list of pin banks included in this controller.
* @nr_banks: number of pin banks.
+ * @nr_ext_resources: number of the extra base address for pin banks.
* @eint_gpio_init: platform specific callback to setup the external gpio
* interrupts for the controller.
* @eint_wkup_init: platform specific callback to setup the external wakeup
@@ -190,6 +197,7 @@ struct samsung_pin_bank {
struct samsung_pin_ctrl {
const struct samsung_pin_bank_data *pin_banks;
u32 nr_banks;
+ int nr_ext_resources;
int (*eint_gpio_init)(struct samsung_pinctrl_drv_data *);
int (*eint_wkup_init)(struct samsung_pinctrl_drv_data *);
@@ -200,7 +208,6 @@ struct samsung_pin_ctrl {
/**
* struct samsung_pinctrl_drv_data: wrapper for holding driver data together.
* @node: global list node
- * @virt_base: register base address of the controller.
* @dev: device instance representing the controller.
* @irq: interrpt number used by the controller to notify gpio interrupts.
* @ctrl: pin controller instance managed by the driver.
@@ -215,7 +222,6 @@ struct samsung_pin_ctrl {
*/
struct samsung_pinctrl_drv_data {
struct list_head node;
- void __iomem *virt_base;
struct device *dev;
int irq;
--
1.9.1
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| From | Krzysztof Kozlowski <krzk@kernel.org> |
|---|---|
| Date | 2016-11-03 20:20 +0100 |
| Subject | Re: [PATCH v3 1/5] pinctrl: samsung: Add the support the multiple IORESOURCE_MEM for one pin-bank |
| Message-ID | <szvIl-83J-13@gated-at.bofh.it> |
| In reply to | #1514331 |
On Thu, Nov 03, 2016 at 03:39:05PM +0900, Chanwoo Choi wrote: > This patch supports the multiple IORESOURCE_MEM resources for one pin-bank. > In the pre-existing Exynos series, the registers of the gpio bank are included > in the one memory map. But, some gpio bank need to support the one more memory > map (IORESOURCE_MEM) because the registers of gpio bank are separated into > the different memory map. > > For example, > The both ALIVE and IMEM domain have the different memory base address. > The GFP[1-5] of exynos5433 are composed as following: > - ALIVE domain : WEINT_* registers > - IMEM domain : CON/DAT/PUD/DRV/CONPDN/PUDPDN register > > Cc: Tomasz Figa <tomasz.figa@gmail.com> > Cc: Krzysztof Kozlowski <krzk@kernel.org> > Cc: Sylwester Nawrocki <s.nawrocki@samsung.com> > Cc: Kukjin Kim <kgene@kernel.org> > Cc: Linus Walleij <linus.walleij@linaro.org> > Cc: Rob Herring <robh+dt@kernel.org> > Cc: Mark Rutland <mark.rutland@arm.com> > Cc: linux-gpio@vger.kernel.org > Suggested-by: Tomasz Figa <tomasz.figa@gmail.com> > Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> > --- > .../bindings/pinctrl/samsung-pinctrl.txt | 19 ++++++++++ > drivers/pinctrl/samsung/pinctrl-exynos.c | 39 +++++++++------------ > drivers/pinctrl/samsung/pinctrl-exynos.h | 11 ++++++ > drivers/pinctrl/samsung/pinctrl-samsung.c | 40 ++++++++++++++-------- > drivers/pinctrl/samsung/pinctrl-samsung.h | 10 ++++-- > 5 files changed, 80 insertions(+), 39 deletions(-) > Hi, Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Best regards, Krzysztof
[toc] | [prev] | [next] | [standalone]
| From | Linus Walleij <linus.walleij@linaro.org> |
|---|---|
| Date | 2016-11-08 10:40 +0100 |
| Subject | Re: [PATCH v3 1/5] pinctrl: samsung: Add the support the multiple IORESOURCE_MEM for one pin-bank |
| Message-ID | <sBb2O-7xW-25@gated-at.bofh.it> |
| In reply to | #1514331 |
On Thu, Nov 3, 2016 at 7:39 AM, Chanwoo Choi <cw00.choi@samsung.com> wrote: > This patch supports the multiple IORESOURCE_MEM resources for one pin-bank. > In the pre-existing Exynos series, the registers of the gpio bank are included > in the one memory map. But, some gpio bank need to support the one more memory > map (IORESOURCE_MEM) because the registers of gpio bank are separated into > the different memory map. > > For example, > The both ALIVE and IMEM domain have the different memory base address. > The GFP[1-5] of exynos5433 are composed as following: > - ALIVE domain : WEINT_* registers > - IMEM domain : CON/DAT/PUD/DRV/CONPDN/PUDPDN register > > Cc: Tomasz Figa <tomasz.figa@gmail.com> > Cc: Krzysztof Kozlowski <krzk@kernel.org> > Cc: Sylwester Nawrocki <s.nawrocki@samsung.com> > Cc: Kukjin Kim <kgene@kernel.org> > Cc: Linus Walleij <linus.walleij@linaro.org> > Cc: Rob Herring <robh+dt@kernel.org> > Cc: Mark Rutland <mark.rutland@arm.com> > Cc: linux-gpio@vger.kernel.org > Suggested-by: Tomasz Figa <tomasz.figa@gmail.com> > Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> Patch applied with Krzysztof's review tag. Yours, Linus Walleij
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| From | Chanwoo Choi <cw00.choi@samsung.com> |
|---|---|
| Date | 2016-11-03 07:50 +0100 |
| Subject | [PATCH v3 2/5] pinctrl: samsung: Add GPF support for Exynos5433 |
| Message-ID | <szk0y-mc-7@gated-at.bofh.it> |
| In reply to | #1514324 |
This patch add the support of GPF[1-5] pin of Exynos5433 SoC. The GPFx need
to support the multiple memory map because the registers of GPFx are located
in the different domain.
Cc: Tomasz Figa <tomasz.figa@gmail.com>
Cc: Krzysztof Kozlowski <krzk@kernel.org>
Cc: Sylwester Nawrocki <s.nawrocki@samsung.com>
Cc: Kukjin Kim <kgene@kernel.org>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: linux-gpio@vger.kernel.org
Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
---
drivers/pinctrl/samsung/pinctrl-exynos.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/pinctrl/samsung/pinctrl-exynos.c b/drivers/pinctrl/samsung/pinctrl-exynos.c
index d657b52dfdb5..12f7d1eb65bc 100644
--- a/drivers/pinctrl/samsung/pinctrl-exynos.c
+++ b/drivers/pinctrl/samsung/pinctrl-exynos.c
@@ -1339,6 +1339,11 @@ static void exynos_pinctrl_resume(struct samsung_pinctrl_drv_data *drvdata)
EXYNOS_PIN_BANK_EINTW(8, 0x020, "gpa1", 0x04),
EXYNOS_PIN_BANK_EINTW(8, 0x040, "gpa2", 0x08),
EXYNOS_PIN_BANK_EINTW(8, 0x060, "gpa3", 0x0c),
+ EXYNOS_PIN_BANK_EINTW_EXT(8, 0x020, "gpf1", 0x1004, 1),
+ EXYNOS_PIN_BANK_EINTW_EXT(4, 0x040, "gpf2", 0x1008, 1),
+ EXYNOS_PIN_BANK_EINTW_EXT(4, 0x060, "gpf3", 0x100c, 1),
+ EXYNOS_PIN_BANK_EINTW_EXT(8, 0x080, "gpf4", 0x1010, 1),
+ EXYNOS_PIN_BANK_EINTW_EXT(8, 0x0a0, "gpf5", 0x1014, 1),
};
/* pin banks of exynos5433 pin-controller - AUD */
@@ -1420,6 +1425,7 @@ static void exynos_pinctrl_resume(struct samsung_pinctrl_drv_data *drvdata)
.eint_wkup_init = exynos_eint_wkup_init,
.suspend = exynos_pinctrl_suspend,
.resume = exynos_pinctrl_resume,
+ .nr_ext_resources = 1,
}, {
/* pin-controller instance 1 data */
.pin_banks = exynos5433_pin_banks1,
--
1.9.1
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| From | Krzysztof Kozlowski <krzk@kernel.org> |
|---|---|
| Date | 2016-11-03 20:30 +0100 |
| Subject | Re: [PATCH v3 2/5] pinctrl: samsung: Add GPF support for Exynos5433 |
| Message-ID | <szvS2-87f-23@gated-at.bofh.it> |
| In reply to | #1514332 |
On Thu, Nov 03, 2016 at 03:39:06PM +0900, Chanwoo Choi wrote:
> This patch add the support of GPF[1-5] pin of Exynos5433 SoC. The GPFx need
> to support the multiple memory map because the registers of GPFx are located
> in the different domain.
>
> Cc: Tomasz Figa <tomasz.figa@gmail.com>
> Cc: Krzysztof Kozlowski <krzk@kernel.org>
> Cc: Sylwester Nawrocki <s.nawrocki@samsung.com>
> Cc: Kukjin Kim <kgene@kernel.org>
> Cc: Linus Walleij <linus.walleij@linaro.org>
> Cc: Rob Herring <robh+dt@kernel.org>
> Cc: Mark Rutland <mark.rutland@arm.com>
> Cc: linux-gpio@vger.kernel.org
> Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
> ---
> drivers/pinctrl/samsung/pinctrl-exynos.c | 6 ++++++
> 1 file changed, 6 insertions(+)
>
I think that, instead of in previous patch, the
"samsung,exynos5433-pinctrl" compatible should be documented here along
with information that it requires two addresses for mappings.
Best regards,
Krzysztof
> diff --git a/drivers/pinctrl/samsung/pinctrl-exynos.c b/drivers/pinctrl/samsung/pinctrl-exynos.c
> index d657b52dfdb5..12f7d1eb65bc 100644
> --- a/drivers/pinctrl/samsung/pinctrl-exynos.c
> +++ b/drivers/pinctrl/samsung/pinctrl-exynos.c
> @@ -1339,6 +1339,11 @@ static void exynos_pinctrl_resume(struct samsung_pinctrl_drv_data *drvdata)
> EXYNOS_PIN_BANK_EINTW(8, 0x020, "gpa1", 0x04),
> EXYNOS_PIN_BANK_EINTW(8, 0x040, "gpa2", 0x08),
> EXYNOS_PIN_BANK_EINTW(8, 0x060, "gpa3", 0x0c),
> + EXYNOS_PIN_BANK_EINTW_EXT(8, 0x020, "gpf1", 0x1004, 1),
> + EXYNOS_PIN_BANK_EINTW_EXT(4, 0x040, "gpf2", 0x1008, 1),
> + EXYNOS_PIN_BANK_EINTW_EXT(4, 0x060, "gpf3", 0x100c, 1),
> + EXYNOS_PIN_BANK_EINTW_EXT(8, 0x080, "gpf4", 0x1010, 1),
> + EXYNOS_PIN_BANK_EINTW_EXT(8, 0x0a0, "gpf5", 0x1014, 1),
> };
>
> /* pin banks of exynos5433 pin-controller - AUD */
> @@ -1420,6 +1425,7 @@ static void exynos_pinctrl_resume(struct samsung_pinctrl_drv_data *drvdata)
> .eint_wkup_init = exynos_eint_wkup_init,
> .suspend = exynos_pinctrl_suspend,
> .resume = exynos_pinctrl_resume,
> + .nr_ext_resources = 1,
> }, {
> /* pin-controller instance 1 data */
> .pin_banks = exynos5433_pin_banks1,
> --
> 1.9.1
>
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| From | Linus Walleij <linus.walleij@linaro.org> |
|---|---|
| Date | 2016-11-08 10:40 +0100 |
| Subject | Re: [PATCH v3 2/5] pinctrl: samsung: Add GPF support for Exynos5433 |
| Message-ID | <sBb2O-7xW-19@gated-at.bofh.it> |
| In reply to | #1514793 |
On Thu, Nov 3, 2016 at 8:20 PM, Krzysztof Kozlowski <krzk@kernel.org> wrote: > On Thu, Nov 03, 2016 at 03:39:06PM +0900, Chanwoo Choi wrote: >> This patch add the support of GPF[1-5] pin of Exynos5433 SoC. The GPFx need >> to support the multiple memory map because the registers of GPFx are located >> in the different domain. >> >> Cc: Tomasz Figa <tomasz.figa@gmail.com> >> Cc: Krzysztof Kozlowski <krzk@kernel.org> >> Cc: Sylwester Nawrocki <s.nawrocki@samsung.com> >> Cc: Kukjin Kim <kgene@kernel.org> >> Cc: Linus Walleij <linus.walleij@linaro.org> >> Cc: Rob Herring <robh+dt@kernel.org> >> Cc: Mark Rutland <mark.rutland@arm.com> >> Cc: linux-gpio@vger.kernel.org >> Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com> >> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> >> --- >> drivers/pinctrl/samsung/pinctrl-exynos.c | 6 ++++++ >> 1 file changed, 6 insertions(+) >> > > I think that, instead of in previous patch, the > "samsung,exynos5433-pinctrl" compatible should be documented here along > with information that it requires two addresses for mappings. True but too small detail to respin the patches about, and I'm not perfectionist, so patch applied anyways. Yours, Linus Walleij
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| From | Linus Walleij <linus.walleij@linaro.org> |
|---|---|
| Date | 2016-11-08 10:40 +0100 |
| Subject | Re: [PATCH v3 2/5] pinctrl: samsung: Add GPF support for Exynos5433 |
| Message-ID | <sBb2O-7xW-11@gated-at.bofh.it> |
| In reply to | #1514332 |
On Thu, Nov 3, 2016 at 7:39 AM, Chanwoo Choi <cw00.choi@samsung.com> wrote: > This patch add the support of GPF[1-5] pin of Exynos5433 SoC. The GPFx need > to support the multiple memory map because the registers of GPFx are located > in the different domain. > > Cc: Tomasz Figa <tomasz.figa@gmail.com> > Cc: Krzysztof Kozlowski <krzk@kernel.org> > Cc: Sylwester Nawrocki <s.nawrocki@samsung.com> > Cc: Kukjin Kim <kgene@kernel.org> > Cc: Linus Walleij <linus.walleij@linaro.org> > Cc: Rob Herring <robh+dt@kernel.org> > Cc: Mark Rutland <mark.rutland@arm.com> > Cc: linux-gpio@vger.kernel.org > Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com> > Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> Patch applied. Yours, Linus Walleij
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| From | Krzysztof Kozlowski <krzk@kernel.org> |
|---|---|
| Date | 2016-11-03 20:50 +0100 |
| Subject | Re: [PATCH v3 3/5] arm64: dts: exynos: Add dts files for Samsung Exynos5433 64bit SoC |
| Message-ID | <szwbn-8dS-7@gated-at.bofh.it> |
| In reply to | #1514324 |
On Thu, Nov 03, 2016 at 03:39:07PM +0900, Chanwoo Choi wrote: > This patch adds new Exynos5433 dtsi to support 64-bit Exynos5433 SoC based on > Octa-core CPUs (quad Cortex-A57 and quad Cortex-A53). And Exynos5433 supports > PSCI (Power State Coordination Interface) v0.1. > > This patch includes following Device Tree node to support Exynos5433 SoC: > 1. Octa cores for big.LITTLE architecture > - Cortex-A53 LITTLE Quad-core > - Cortex-A57 big Quad-core > - Support PSCI v0.1 > Patch looks good to me. The GIC interrupt flags will have to be fixed someday (e.f. https://patchwork.kernel.org/patch/9336553/) but this may wait... It is violating the GIC since ancient times so I guess we can violate it some more till someone will be annoyed enough to fix it. :) BR, Krzysztof
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| From | Krzysztof Kozlowski <krzk@kernel.org> |
|---|---|
| Date | 2016-11-03 21:20 +0100 |
| Subject | Re: [PATCH v3 3/5] arm64: dts: exynos: Add dts files for Samsung Exynos5433 64bit SoC |
| Message-ID | <szwEq-f4-7@gated-at.bofh.it> |
| In reply to | #1514797 |
On Thu, Nov 03, 2016 at 09:47:16PM +0200, Krzysztof Kozlowski wrote: > On Thu, Nov 03, 2016 at 03:39:07PM +0900, Chanwoo Choi wrote: > > This patch adds new Exynos5433 dtsi to support 64-bit Exynos5433 SoC based on > > Octa-core CPUs (quad Cortex-A57 and quad Cortex-A53). And Exynos5433 supports > > PSCI (Power State Coordination Interface) v0.1. > > > > This patch includes following Device Tree node to support Exynos5433 SoC: > > 1. Octa cores for big.LITTLE architecture > > - Cortex-A53 LITTLE Quad-core > > - Cortex-A57 big Quad-core > > - Support PSCI v0.1 > > > > Patch looks good to me. The GIC interrupt flags will have to be fixed > someday (e.f. https://patchwork.kernel.org/patch/9336553/) but this may > wait... It is violating the GIC since ancient times so I guess we can > violate it some more till someone will be annoyed enough to fix it. :) Thanks, applied. Best regards, Krzysztof
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