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[PATCH v6 0/9] Support Intel® Turbo Boost Max Technology 3.0

Started byTim Chen <tim.c.chen@linux.intel.com>
First post2016-10-21 00:10 +0200
Last post2016-10-21 00:10 +0200
Articles 3 on this page of 23 — 3 participants

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  [PATCH v6 0/9] Support Intel® Turbo Boost Max Technology 3.0 Tim Chen <tim.c.chen@linux.intel.com> - 2016-10-21 00:10 +0200
    [PATCH v6 8/9] acpi: bus: Set _OSC for diverse core support Tim Chen <tim.c.chen@linux.intel.com> - 2016-10-21 00:10 +0200
    [PATCH v6 2/9] x86/topology: Provide topology_num_packages() Tim Chen <tim.c.chen@linux.intel.com> - 2016-10-21 00:10 +0200
    [PATCH v6 4/9] x86: Enable Intel Turbo Boost Max Technology 3.0 Tim Chen <tim.c.chen@linux.intel.com> - 2016-10-21 00:10 +0200
    [PATCH v6 3/9] x86/topology: Define x86's arch_update_cpu_topology Tim Chen <tim.c.chen@linux.intel.com> - 2016-10-21 00:10 +0200
    [PATCH v6 5/9] x86/sysctl: Add sysctl for ITMT scheduling feature Tim Chen <tim.c.chen@linux.intel.com> - 2016-10-21 00:10 +0200
      Re: [PATCH v6 5/9] x86/sysctl: Add sysctl for ITMT scheduling  feature Thomas Gleixner <tglx@linutronix.de> - 2016-10-26 13:00 +0200
        Re: [PATCH v6 5/9] x86/sysctl: Add sysctl for ITMT scheduling  feature Tim Chen <tim.c.chen@linux.intel.com> - 2016-10-26 20:10 +0200
          Re: [PATCH v6 5/9] x86/sysctl: Add sysctl for ITMT scheduling  feature Thomas Gleixner <tglx@linutronix.de> - 2016-10-26 20:20 +0200
            Re: [PATCH v6 5/9] x86/sysctl: Add sysctl for ITMT scheduling  feature Tim Chen <tim.c.chen@linux.intel.com> - 2016-10-26 21:40 +0200
      Re: [PATCH v6 5/9] x86/sysctl: Add sysctl for ITMT scheduling  feature Thomas Gleixner <tglx@linutronix.de> - 2016-10-26 13:00 +0200
        Re: [PATCH v6 5/9] x86/sysctl: Add sysctl for ITMT scheduling  feature Thomas Gleixner <tglx@linutronix.de> - 2016-10-26 13:30 +0200
          Re: [PATCH v6 5/9] x86/sysctl: Add sysctl for ITMT scheduling  feature Tim Chen <tim.c.chen@linux.intel.com> - 2016-10-26 19:30 +0200
            Re: [PATCH v6 5/9] x86/sysctl: Add sysctl for ITMT scheduling  feature Thomas Gleixner <tglx@linutronix.de> - 2016-10-26 20:20 +0200
        Re: [PATCH v6 5/9] x86/sysctl: Add sysctl for ITMT scheduling feature Peter Zijlstra <peterz@infradead.org> - 2016-10-26 13:30 +0200
        Re: [PATCH v6 5/9] x86/sysctl: Add sysctl for ITMT scheduling  feature Tim Chen <tim.c.chen@linux.intel.com> - 2016-10-26 20:10 +0200
    [PATCH v6 1/9] sched: Extend scheduler's asym packing Tim Chen <tim.c.chen@linux.intel.com> - 2016-10-21 00:10 +0200
      Re: [PATCH v6 1/9] sched: Extend scheduler's asym packing Thomas Gleixner <tglx@linutronix.de> - 2016-10-26 12:40 +0200
        Re: [PATCH v6 1/9] sched: Extend scheduler's asym packing Tim Chen <tim.c.chen@linux.intel.com> - 2016-10-26 20:20 +0200
          Re: [PATCH v6 1/9] sched: Extend scheduler's asym packing Thomas Gleixner <tglx@linutronix.de> - 2016-10-26 20:30 +0200
    [PATCH v6 7/9] acpi: bus: Enable HWP CPPC objects Tim Chen <tim.c.chen@linux.intel.com> - 2016-10-21 00:10 +0200
    [PATCH v6 9/9] cpufreq: intel_pstate: Use CPPC to get max performance Tim Chen <tim.c.chen@linux.intel.com> - 2016-10-21 00:10 +0200
    [PATCH v6 6/9] x86/sched: Add SD_ASYM_PACKING flags to x86 ITMT CPU Tim Chen <tim.c.chen@linux.intel.com> - 2016-10-21 00:10 +0200

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#1505296 — [PATCH v6 7/9] acpi: bus: Enable HWP CPPC objects

FromTim Chen <tim.c.chen@linux.intel.com>
Date2016-10-21 00:10 +0200
Subject[PATCH v6 7/9] acpi: bus: Enable HWP CPPC objects
Message-ID<sutHc-52m-37@gated-at.bofh.it>
In reply to#1505287
From: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>

From: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>

Need to set platform wide _OSC bits to enable CPPC and CPPC version 2.
If platform supports CPPC, then BIOS exposes CPPC tables.

The primary reason to enable CPPC support is to get the maximum
performance of each CPU to check and enable Intel Turbo Boost Max
Technology 3.0 (ITMT).

Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Signed-off-by: Tim Chen <tim.c.chen@linux.intel.com>
---
 drivers/acpi/bus.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/drivers/acpi/bus.c b/drivers/acpi/bus.c
index 56190d0..2f381ba 100644
--- a/drivers/acpi/bus.c
+++ b/drivers/acpi/bus.c
@@ -331,6 +331,13 @@ static void acpi_bus_osc_support(void)
 	capbuf[OSC_SUPPORT_DWORD] |= OSC_SB_HOTPLUG_OST_SUPPORT;
 	capbuf[OSC_SUPPORT_DWORD] |= OSC_SB_PCLPI_SUPPORT;
 
+#ifdef CONFIG_X86
+	if (boot_cpu_has(X86_FEATURE_HWP)) {
+		capbuf[OSC_SUPPORT_DWORD] |= OSC_SB_CPC_SUPPORT;
+		capbuf[OSC_SUPPORT_DWORD] |= OSC_SB_CPCV2_SUPPORT;
+	}
+#endif
+
 	if (!ghes_disable)
 		capbuf[OSC_SUPPORT_DWORD] |= OSC_SB_APEI_SUPPORT;
 	if (ACPI_FAILURE(acpi_get_handle(NULL, "\\_SB", &handle)))
-- 
2.5.5

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#1505300 — [PATCH v6 9/9] cpufreq: intel_pstate: Use CPPC to get max performance

FromTim Chen <tim.c.chen@linux.intel.com>
Date2016-10-21 00:10 +0200
Subject[PATCH v6 9/9] cpufreq: intel_pstate: Use CPPC to get max performance
Message-ID<sutHc-52m-29@gated-at.bofh.it>
In reply to#1505287
From: "Rafael J. Wysocki" <rafael.j.wysocki@intel.com>

From: Rafael J. Wysocki <rafael.j.wysocki@intel.com>

This change uses acpi cppc_lib interface to get CPPC performance limits
and calls scheduler interface to update per cpu highest priority. If
there is a difference in highest performance of each CPUs, call scheduler
interface to enable ITMT feature for only one time.

Here sched_set_itmt_core_prio() is called to set priorities and
sched_set_itmt_support() is called to enable ITMT feature.

Original-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Signed-off-by: Tim Chen <tim.c.chen@linux.intel.com>
---
 drivers/cpufreq/Kconfig.x86    |  1 +
 drivers/cpufreq/intel_pstate.c | 56 +++++++++++++++++++++++++++++++++++++++++-
 2 files changed, 56 insertions(+), 1 deletion(-)

diff --git a/drivers/cpufreq/Kconfig.x86 b/drivers/cpufreq/Kconfig.x86
index adbd1de..c6d273b 100644
--- a/drivers/cpufreq/Kconfig.x86
+++ b/drivers/cpufreq/Kconfig.x86
@@ -6,6 +6,7 @@ config X86_INTEL_PSTATE
        bool "Intel P state control"
        depends on X86
        select ACPI_PROCESSOR if ACPI
+       select ACPI_CPPC_LIB if X86_64 && ACPI && SCHED_ITMT
        help
           This driver provides a P state for Intel core processors.
 	  The driver implements an internal governor and will become
diff --git a/drivers/cpufreq/intel_pstate.c b/drivers/cpufreq/intel_pstate.c
index f535f81..5a83a6c 100644
--- a/drivers/cpufreq/intel_pstate.c
+++ b/drivers/cpufreq/intel_pstate.c
@@ -44,6 +44,7 @@
 
 #ifdef CONFIG_ACPI
 #include <acpi/processor.h>
+#include <acpi/cppc_acpi.h>
 #endif
 
 #define FRAC_BITS 8
@@ -377,14 +378,67 @@ static bool intel_pstate_get_ppc_enable_status(void)
 	return acpi_ppc;
 }
 
+#ifdef CONFIG_SCHED_ITMT
+
+/* The work item is needed to avoid CPU hotplug locking issues */
+static void intel_pstste_sched_itmt_work_fn(struct work_struct *work)
+{
+	sched_set_itmt_support();
+}
+
+static DECLARE_WORK(sched_itmt_work, intel_pstste_sched_itmt_work_fn);
+
+static void intel_pstate_set_itmt_prio(int cpu)
+{
+	struct cppc_perf_caps cppc_perf;
+	static u32 max_highest_perf = 0, min_highest_perf = U32_MAX;
+	int ret;
+
+	ret = cppc_get_perf_caps(cpu, &cppc_perf);
+	if (ret)
+		return;
+
+	/*
+	 * The priorities can be set regardless of whether or not
+	 * sched_set_itmt_support(true) has been called and it is valid to
+	 * update them at any time after it has been called.
+	 */
+	sched_set_itmt_core_prio(cppc_perf.highest_perf, cpu);
+
+	if (max_highest_perf <= min_highest_perf) {
+		if (cppc_perf.highest_perf > max_highest_perf)
+			max_highest_perf = cppc_perf.highest_perf;
+
+		if (cppc_perf.highest_perf < min_highest_perf)
+			min_highest_perf = cppc_perf.highest_perf;
+
+		if (max_highest_perf > min_highest_perf) {
+			/*
+			 * This code can be run during CPU online under the
+			 * CPU hotplug locks, so sched_set_itmt_support()
+			 * cannot be called from here.  Queue up a work item
+			 * to invoke it.
+			 */
+			schedule_work(&sched_itmt_work);
+		}
+	}
+}
+#else
+static void intel_pstate_set_itmt_prio(int cpu)
+{
+}
+#endif
+
 static void intel_pstate_init_acpi_perf_limits(struct cpufreq_policy *policy)
 {
 	struct cpudata *cpu;
 	int ret;
 	int i;
 
-	if (hwp_active)
+	if (hwp_active) {
+		intel_pstate_set_itmt_prio(policy->cpu);
 		return;
+	}
 
 	if (!intel_pstate_get_ppc_enable_status())
 		return;
-- 
2.5.5

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#1505301 — [PATCH v6 6/9] x86/sched: Add SD_ASYM_PACKING flags to x86 ITMT CPU

FromTim Chen <tim.c.chen@linux.intel.com>
Date2016-10-21 00:10 +0200
Subject[PATCH v6 6/9] x86/sched: Add SD_ASYM_PACKING flags to x86 ITMT CPU
Message-ID<sutHc-52m-35@gated-at.bofh.it>
In reply to#1505287
Some Intel cores in a package can be boosted to a higher turbo frequency
with ITMT 3.0 technology. The scheduler can use the asymmetric packing
feature to move tasks to the more capable cores.

If ITMT is enabled, add SD_ASYM_PACKING flag to the thread and core
sched domains to enable asymmetric packing.

Signed-off-by: Tim Chen <tim.c.chen@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
---
 arch/x86/kernel/smpboot.c | 28 ++++++++++++++++++++++++----
 1 file changed, 24 insertions(+), 4 deletions(-)

diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c
index ebd2655..ed14225 100644
--- a/arch/x86/kernel/smpboot.c
+++ b/arch/x86/kernel/smpboot.c
@@ -487,22 +487,42 @@ static bool match_die(struct cpuinfo_x86 *c, struct cpuinfo_x86 *o)
 	return false;
 }
 
+#if defined(CONFIG_SCHED_SMT) || defined(CONFIG_SCHED_MC)
+static inline int x86_sched_itmt_flags(void)
+{
+	return sysctl_sched_itmt_enabled ? SD_ASYM_PACKING : 0;
+}
+
+#ifdef CONFIG_SCHED_MC
+static int x86_core_flags(void)
+{
+	return cpu_core_flags() | x86_sched_itmt_flags();
+}
+#endif
+#ifdef CONFIG_SCHED_SMT
+static int x86_smt_flags(void)
+{
+	return cpu_smt_flags() | x86_sched_itmt_flags();
+}
+#endif
+#endif
+
 static struct sched_domain_topology_level x86_numa_in_package_topology[] = {
 #ifdef CONFIG_SCHED_SMT
-	{ cpu_smt_mask, cpu_smt_flags, SD_INIT_NAME(SMT) },
+	{ cpu_smt_mask, x86_smt_flags, SD_INIT_NAME(SMT) },
 #endif
 #ifdef CONFIG_SCHED_MC
-	{ cpu_coregroup_mask, cpu_core_flags, SD_INIT_NAME(MC) },
+	{ cpu_coregroup_mask, x86_core_flags, SD_INIT_NAME(MC) },
 #endif
 	{ NULL, },
 };
 
 static struct sched_domain_topology_level x86_topology[] = {
 #ifdef CONFIG_SCHED_SMT
-	{ cpu_smt_mask, cpu_smt_flags, SD_INIT_NAME(SMT) },
+	{ cpu_smt_mask, x86_smt_flags, SD_INIT_NAME(SMT) },
 #endif
 #ifdef CONFIG_SCHED_MC
-	{ cpu_coregroup_mask, cpu_core_flags, SD_INIT_NAME(MC) },
+	{ cpu_coregroup_mask, x86_core_flags, SD_INIT_NAME(MC) },
 #endif
 	{ cpu_cpu_mask, SD_INIT_NAME(DIE) },
 	{ NULL, },
-- 
2.5.5

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