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[PATCH v2 3/4] ARM: dts: dra72-evm-revc: fix correct phy delay and impedance settings

Started byMugunthan V N <mugunthanvnm@ti.com>
First post2016-10-04 15:00 +0200
Last post2016-10-05 05:40 +0200
Articles 4 — 3 participants

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  [PATCH v2 3/4] ARM: dts: dra72-evm-revc: fix correct phy delay and impedance settings Mugunthan V N <mugunthanvnm@ti.com> - 2016-10-04 15:00 +0200
    Re: [PATCH v2 3/4] ARM: dts: dra72-evm-revc: fix correct phy delay  and impedance settings Andrew Lunn <andrew@lunn.ch> - 2016-10-04 15:20 +0200
    Re: [PATCH v2 3/4] ARM: dts: dra72-evm-revc: fix correct phy delay  and impedance settings Lokesh Vutla <lokeshvutla@ti.com> - 2016-10-04 15:20 +0200
      Re: [PATCH v2 3/4] ARM: dts: dra72-evm-revc: fix correct phy delay  and impedance settings Mugunthan V N <mugunthanvnm@ti.com> - 2016-10-05 05:40 +0200

#1495414 — [PATCH v2 3/4] ARM: dts: dra72-evm-revc: fix correct phy delay and impedance settings

FromMugunthan V N <mugunthanvnm@ti.com>
Date2016-10-04 15:00 +0200
Subject[PATCH v2 3/4] ARM: dts: dra72-evm-revc: fix correct phy delay and impedance settings
Message-ID<soxua-2PF-21@gated-at.bofh.it>
The default impedance settings of the phy is not the optimal
value, due to this the second ethernet is not working. Fix it
with correct values which makes the second ethernet port to work.

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
---
 arch/arm/boot/dts/dra72-evm-revc.dts | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/boot/dts/dra72-evm-revc.dts b/arch/arm/boot/dts/dra72-evm-revc.dts
index f9cfd3b..d626cd7 100644
--- a/arch/arm/boot/dts/dra72-evm-revc.dts
+++ b/arch/arm/boot/dts/dra72-evm-revc.dts
@@ -62,6 +62,7 @@
 		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
 		ti,tx-internal-delay = <DP83867_RGMIIDCTL_1_NS>;
 		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
+		ti,min-output-imepdance;
 	};
 
 	dp83867_1: ethernet-phy@3 {
@@ -69,5 +70,6 @@
 		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
 		ti,tx-internal-delay = <DP83867_RGMIIDCTL_1_NS>;
 		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
+		ti,min-output-imepdance;
 	};
 };
-- 
2.10.0.372.g6fe1b14

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#1495425 — Re: [PATCH v2 3/4] ARM: dts: dra72-evm-revc: fix correct phy delay and impedance settings

FromAndrew Lunn <andrew@lunn.ch>
Date2016-10-04 15:20 +0200
SubjectRe: [PATCH v2 3/4] ARM: dts: dra72-evm-revc: fix correct phy delay and impedance settings
Message-ID<soxNv-3co-11@gated-at.bofh.it>
In reply to#1495414
On Tue, Oct 04, 2016 at 06:26:06PM +0530, Mugunthan V N wrote:
> The default impedance settings of the phy is not the optimal
> value, due to this the second ethernet is not working. Fix it
> with correct values which makes the second ethernet port to work.
> 
> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
> ---
>  arch/arm/boot/dts/dra72-evm-revc.dts | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/dra72-evm-revc.dts b/arch/arm/boot/dts/dra72-evm-revc.dts
> index f9cfd3b..d626cd7 100644
> --- a/arch/arm/boot/dts/dra72-evm-revc.dts
> +++ b/arch/arm/boot/dts/dra72-evm-revc.dts
> @@ -62,6 +62,7 @@
>  		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
>  		ti,tx-internal-delay = <DP83867_RGMIIDCTL_1_NS>;
>  		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
> +		ti,min-output-imepdance;

And there is my answer :-(

    Andrew

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#1495428 — Re: [PATCH v2 3/4] ARM: dts: dra72-evm-revc: fix correct phy delay and impedance settings

FromLokesh Vutla <lokeshvutla@ti.com>
Date2016-10-04 15:20 +0200
SubjectRe: [PATCH v2 3/4] ARM: dts: dra72-evm-revc: fix correct phy delay and impedance settings
Message-ID<soxNv-3co-25@gated-at.bofh.it>
In reply to#1495414

On Tuesday 04 October 2016 06:26 PM, Mugunthan V N wrote:
> The default impedance settings of the phy is not the optimal
> value, due to this the second ethernet is not working. Fix it
> with correct values which makes the second ethernet port to work.
> 
> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
> ---
>  arch/arm/boot/dts/dra72-evm-revc.dts | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/dra72-evm-revc.dts b/arch/arm/boot/dts/dra72-evm-revc.dts
> index f9cfd3b..d626cd7 100644
> --- a/arch/arm/boot/dts/dra72-evm-revc.dts
> +++ b/arch/arm/boot/dts/dra72-evm-revc.dts
> @@ -62,6 +62,7 @@
>  		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
>  		ti,tx-internal-delay = <DP83867_RGMIIDCTL_1_NS>;
>  		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
> +		ti,min-output-imepdance;

s/imepdance/impedance

>  	};
>  
>  	dp83867_1: ethernet-phy@3 {
> @@ -69,5 +70,6 @@
>  		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
>  		ti,tx-internal-delay = <DP83867_RGMIIDCTL_1_NS>;
>  		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
> +		ti,min-output-imepdance;

same here.

Thanks and regards,
Lokesh

>  	};
>  };
>

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#1495685 — Re: [PATCH v2 3/4] ARM: dts: dra72-evm-revc: fix correct phy delay and impedance settings

FromMugunthan V N <mugunthanvnm@ti.com>
Date2016-10-05 05:40 +0200
SubjectRe: [PATCH v2 3/4] ARM: dts: dra72-evm-revc: fix correct phy delay and impedance settings
Message-ID<soLdM-3wp-7@gated-at.bofh.it>
In reply to#1495428
On Tuesday 04 October 2016 06:41 PM, Lokesh Vutla wrote:
> 
> On Tuesday 04 October 2016 06:26 PM, Mugunthan V N wrote:
>> > The default impedance settings of the phy is not the optimal
>> > value, due to this the second ethernet is not working. Fix it
>> > with correct values which makes the second ethernet port to work.
>> > 
>> > Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
>> > ---
>> >  arch/arm/boot/dts/dra72-evm-revc.dts | 2 ++
>> >  1 file changed, 2 insertions(+)
>> > 
>> > diff --git a/arch/arm/boot/dts/dra72-evm-revc.dts b/arch/arm/boot/dts/dra72-evm-revc.dts
>> > index f9cfd3b..d626cd7 100644
>> > --- a/arch/arm/boot/dts/dra72-evm-revc.dts
>> > +++ b/arch/arm/boot/dts/dra72-evm-revc.dts
>> > @@ -62,6 +62,7 @@
>> >  		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
>> >  		ti,tx-internal-delay = <DP83867_RGMIIDCTL_1_NS>;
>> >  		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
>> > +		ti,min-output-imepdance;
> s/imepdance/impedance
> 

Thanks for quick catch. Will fix this in v3.

Regards
Mugunthan V N

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