Re: [PATCH v2 3/4] ARM: dts: dra72-evm-revc: fix correct phy delay and impedance settings

From	Mugunthan V N <mugunthanvnm@ti.com>
Newsgroups	linux.kernel
Subject	Re: [PATCH v2 3/4] ARM: dts: dra72-evm-revc: fix correct phy delay and impedance settings
Date	2016-10-05 05:40 +0200
Message-ID	<soLdM-3wp-7@gated-at.bofh.it> (permalink)
References	<soxua-2PF-3@gated-at.bofh.it> <soxua-2PF-21@gated-at.bofh.it> <soxNv-3co-25@gated-at.bofh.it>
Organization	linux.* mail to news gateway

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On Tuesday 04 October 2016 06:41 PM, Lokesh Vutla wrote:
> 
> On Tuesday 04 October 2016 06:26 PM, Mugunthan V N wrote:
>> > The default impedance settings of the phy is not the optimal
>> > value, due to this the second ethernet is not working. Fix it
>> > with correct values which makes the second ethernet port to work.
>> > 
>> > Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
>> > ---
>> >  arch/arm/boot/dts/dra72-evm-revc.dts | 2 ++
>> >  1 file changed, 2 insertions(+)
>> > 
>> > diff --git a/arch/arm/boot/dts/dra72-evm-revc.dts b/arch/arm/boot/dts/dra72-evm-revc.dts
>> > index f9cfd3b..d626cd7 100644
>> > --- a/arch/arm/boot/dts/dra72-evm-revc.dts
>> > +++ b/arch/arm/boot/dts/dra72-evm-revc.dts
>> > @@ -62,6 +62,7 @@
>> >  		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
>> >  		ti,tx-internal-delay = <DP83867_RGMIIDCTL_1_NS>;
>> >  		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
>> > +		ti,min-output-imepdance;
> s/imepdance/impedance
> 

Thanks for quick catch. Will fix this in v3.

Regards
Mugunthan V N

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[PATCH v2 3/4] ARM: dts: dra72-evm-revc: fix correct phy delay and impedance settings Mugunthan V N <mugunthanvnm@ti.com> - 2016-10-04 15:00 +0200
  Re: [PATCH v2 3/4] ARM: dts: dra72-evm-revc: fix correct phy delay  and impedance settings Andrew Lunn <andrew@lunn.ch> - 2016-10-04 15:20 +0200
  Re: [PATCH v2 3/4] ARM: dts: dra72-evm-revc: fix correct phy delay  and impedance settings Lokesh Vutla <lokeshvutla@ti.com> - 2016-10-04 15:20 +0200
    Re: [PATCH v2 3/4] ARM: dts: dra72-evm-revc: fix correct phy delay  and impedance settings Mugunthan V N <mugunthanvnm@ti.com> - 2016-10-05 05:40 +0200

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