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[PATCH v2 00/14] Partial MIPS Malta DT conversion

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  [PATCH v2 00/14] Partial MIPS Malta DT conversion Paul Burton <paul.burton@imgtec.com> - 2016-09-19 23:30 +0200
    [PATCH v2 12/14] MIPS: Malta: Remove custom halt implementation Paul Burton <paul.burton@imgtec.com> - 2016-09-19 23:30 +0200
    [PATCH v2 02/14] irqchip: i8259: Allow platforms to override poll function Paul Burton <paul.burton@imgtec.com> - 2016-09-19 23:30 +0200
    [PATCH v2 13/14] power: reset: Add Intel PIIX4 poweroff driver Paul Burton <paul.burton@imgtec.com> - 2016-09-19 23:30 +0200
      Re: [PATCH v2 13/14] power: reset: Add Intel PIIX4 poweroff driver Sebastian Reichel <sre@kernel.org> - 2016-09-20 01:50 +0200
    [PATCH v2 04/14] MIPS: Malta: Allow PCI devices DMA to lower 2GB physical Paul Burton <paul.burton@imgtec.com> - 2016-09-19 23:30 +0200
    [PATCH v2 08/14] MIPS: Malta: Remove custom DT match table Paul Burton <paul.burton@imgtec.com> - 2016-09-19 23:30 +0200
    [PATCH v2 01/14] irqchip: i8259: Add domain before mapping parent irq Paul Burton <paul.burton@imgtec.com> - 2016-09-19 23:30 +0200
    [PATCH v2 07/14] of/platform: Probe "isa" busses by default Paul Burton <paul.burton@imgtec.com> - 2016-09-19 23:30 +0200
    [PATCH v2 11/14] MIPS: Malta: Use syscon-reboot driver to reboot Paul Burton <paul.burton@imgtec.com> - 2016-09-19 23:30 +0200
    [PATCH v2 05/14] MIPS: Malta: Use all available DDR by default Paul Burton <paul.burton@imgtec.com> - 2016-09-19 23:30 +0200
    [PATCH v2 10/14] MIPS: Malta: Probe pflash via DT Paul Burton <paul.burton@imgtec.com> - 2016-09-19 23:30 +0200

#1486871 — [PATCH v2 00/14] Partial MIPS Malta DT conversion

This series begins converting the MIPS Malta board to use device tree to
probe its various devices & peripherals, with the eventual goal of
including Malta support in generic kernels.

In terms of use the only change should be that kernels will
automatically make use of more than 256MB DDR when built for 64 bit, or
32 bit with highmem enabled.

The series leaves Malta with a significant amount less platform code and
thus closer to being ready for inclusion in a generic MIPS kernel.

Applies atop v4.8-rc7.

Paul Burton (14):
  irqchip: i8259: Add domain before mapping parent irq
  irqchip: i8259: Allow platforms to override poll function
  irqchip: i8259: Remove unused i8259A_irq_pending
  MIPS: Malta: Allow PCI devices DMA to lower 2GB physical
  MIPS: Malta: Use all available DDR by default
  MIPS: Malta: Probe interrupt controllers via DT
  of/platform: Probe "isa" busses by default
  MIPS: Malta: Remove custom DT match table
  MIPS: Malta: Probe RTC via DT
  MIPS: Malta: Probe pflash via DT
  MIPS: Malta: Use syscon-reboot driver to reboot
  MIPS: Malta: Remove custom halt implementation
  power: reset: Add Intel PIIX4 poweroff driver
  MIPS: Malta: Use PIIX4 poweroff driver to power down

 arch/mips/Kconfig                           |   7 +-
 arch/mips/boot/dts/mti/malta.dts            |  99 +++++++++++++++
 arch/mips/configs/malta_defconfig           |   5 +-
 arch/mips/configs/malta_kvm_defconfig       |   5 +-
 arch/mips/configs/malta_kvm_guest_defconfig |   5 +-
 arch/mips/configs/malta_qemu_32r6_defconfig |   3 +
 arch/mips/configs/maltaaprp_defconfig       |   3 +
 arch/mips/configs/maltasmvp_defconfig       |   3 +
 arch/mips/configs/maltasmvp_eva_defconfig   |   3 +
 arch/mips/configs/maltaup_defconfig         |   3 +
 arch/mips/configs/maltaup_xpa_defconfig     |   5 +-
 arch/mips/include/asm/i8259.h               |  12 +-
 arch/mips/mti-malta/Makefile                |   2 -
 arch/mips/mti-malta/malta-dt.c              |  15 ---
 arch/mips/mti-malta/malta-dtshim.c          | 187 +++++++++++++++++++++++++++-
 arch/mips/mti-malta/malta-init.c            |  17 ++-
 arch/mips/mti-malta/malta-int.c             |  96 +-------------
 arch/mips/mti-malta/malta-platform.c        |  65 ----------
 arch/mips/mti-malta/malta-pm.c              |  96 --------------
 arch/mips/mti-malta/malta-reset.c           |  47 -------
 drivers/irqchip/irq-i8259.c                 |  30 ++---
 drivers/of/platform.c                       |   1 +
 drivers/power/reset/Kconfig                 |  10 ++
 drivers/power/reset/Makefile                |   1 +
 drivers/power/reset/piix4-poweroff.c        | 104 ++++++++++++++++
 25 files changed, 461 insertions(+), 363 deletions(-)
 delete mode 100644 arch/mips/mti-malta/malta-pm.c
 delete mode 100644 arch/mips/mti-malta/malta-reset.c
 create mode 100644 drivers/power/reset/piix4-poweroff.c

-- 
2.9.3

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#1486873 — [PATCH v2 12/14] MIPS: Malta: Remove custom halt implementation

The arch code will hang the machine with an infinite loop if the board
doesn't provide an impelementation of halt - let it, rather than
duplicating it.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
---

Changes in v2: None

 arch/mips/mti-malta/malta-reset.c | 6 ------
 1 file changed, 6 deletions(-)

diff --git a/arch/mips/mti-malta/malta-reset.c b/arch/mips/mti-malta/malta-reset.c
index 04d6b9c..dd6f62a 100644
--- a/arch/mips/mti-malta/malta-reset.c
+++ b/arch/mips/mti-malta/malta-reset.c
@@ -13,11 +13,6 @@
 #include <asm/reboot.h>
 #include <asm/mach-malta/malta-pm.h>
 
-static void mips_machine_halt(void)
-{
-	while (true);
-}
-
 static void mips_machine_power_off(void)
 {
 	mips_pm_suspend(PIIX4_FUNC3IO_PMCNTRL_SUS_TYP_SOFF);
@@ -28,7 +23,6 @@ static void mips_machine_power_off(void)
 
 static int __init mips_reboot_setup(void)
 {
-	_machine_halt = mips_machine_halt;
 	pm_power_off = mips_machine_power_off;
 
 	return 0;
-- 
2.9.3

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#1486875 — [PATCH v2 02/14] irqchip: i8259: Allow platforms to override poll function

The default i8259 polling function (i8259_irq) is nicely generic but is
fairly costly. Platforms often provide an alternative means of polling
for an i8259 interrupt, and when using the i8259 without device tree
have typically just chained its parent interrupt to their own handler
function. In order to allow for platform-specific polling functions to
be used in cases where the driver is probed via device tree, provide an
i8259_set_poll function that accepts a pointer to an alternative poll
function that will override the default.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
---

Changes in v2: None

 arch/mips/include/asm/i8259.h | 11 +++++++++++
 drivers/irqchip/irq-i8259.c   |  8 +++++++-
 2 files changed, 18 insertions(+), 1 deletion(-)

diff --git a/arch/mips/include/asm/i8259.h b/arch/mips/include/asm/i8259.h
index a7fbcd6..b27fcc4 100644
--- a/arch/mips/include/asm/i8259.h
+++ b/arch/mips/include/asm/i8259.h
@@ -43,6 +43,17 @@ extern void make_8259A_irq(unsigned int irq);
 extern void init_i8259_irqs(void);
 extern int i8259_of_init(struct device_node *node, struct device_node *parent);
 
+/**
+ * i8159_set_poll() - Override the i8259 polling function
+ * @poll: pointer to platform-specific polling function
+ *
+ * Call this to override the generic i8259 polling function, which directly
+ * accesses i8259 registers, with a platform specific one which may be faster
+ * in cases where hardware provides a more optimal means of polling for an
+ * interrupt.
+ */
+extern void i8259_set_poll(int (*poll)(void));
+
 /*
  * Do the traditional i8259 interrupt polling thing.  This is for the few
  * cases where no better interrupt acknowledge method is available and we
diff --git a/drivers/irqchip/irq-i8259.c b/drivers/irqchip/irq-i8259.c
index 85897fd..1f4a344 100644
--- a/drivers/irqchip/irq-i8259.c
+++ b/drivers/irqchip/irq-i8259.c
@@ -38,6 +38,7 @@ static void disable_8259A_irq(struct irq_data *d);
 static void enable_8259A_irq(struct irq_data *d);
 static void mask_and_ack_8259A(struct irq_data *d);
 static void init_8259A(int auto_eoi);
+static int (*i8259_poll)(void) = i8259_irq;
 
 static struct irq_chip i8259A_chip = {
 	.name			= "XT-PIC",
@@ -51,6 +52,11 @@ static struct irq_chip i8259A_chip = {
  * 8259A PIC functions to handle ISA devices:
  */
 
+void i8259_set_poll(int (*poll)(void))
+{
+	i8259_poll = poll;
+}
+
 /*
  * This contains the irq mask for both 8259A irq controllers,
  */
@@ -355,7 +361,7 @@ void __init init_i8259_irqs(void)
 static void i8259_irq_dispatch(struct irq_desc *desc)
 {
 	struct irq_domain *domain = irq_desc_get_handler_data(desc);
-	int hwirq = i8259_irq();
+	int hwirq = i8259_poll();
 	unsigned int irq;
 
 	if (hwirq < 0)
-- 
2.9.3

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#1486876 — [PATCH v2 13/14] power: reset: Add Intel PIIX4 poweroff driver

Add a driver which allows powering off the system via an Intel PIIX4
southbridge, by entering the PIIX4 SOff state. This is useful on the
MIPS Malta development board, where it will power down the FPGA based
board until its ON/NMI button is pressed, or the QEMU implementation of
the MIPS Malta board where it will cause QEMU to exit.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>

---

Changes in v2:
- Add MODULE_LICENSE
- Allow non-MIPS builds with COMPILE_TEST

 drivers/power/reset/Kconfig          |  10 ++++
 drivers/power/reset/Makefile         |   1 +
 drivers/power/reset/piix4-poweroff.c | 104 +++++++++++++++++++++++++++++++++++
 3 files changed, 115 insertions(+)
 create mode 100644 drivers/power/reset/piix4-poweroff.c

diff --git a/drivers/power/reset/Kconfig b/drivers/power/reset/Kconfig
index c74c3f6..abeb772 100644
--- a/drivers/power/reset/Kconfig
+++ b/drivers/power/reset/Kconfig
@@ -104,6 +104,16 @@ config POWER_RESET_MSM
 	help
 	  Power off and restart support for Qualcomm boards.
 
+config POWER_RESET_PIIX4_POWEROFF
+	tristate "Intel PIIX4 power-off driver"
+	depends on PCI
+	depends on MIPS || COMPILE_TEST
+	help
+	  This driver supports powering off a system using the Intel PIIX4
+	  southbridge, for example the MIPS Malta development board. The
+	  southbridge SOff state is entered in response to a request to
+	  power off the system.
+
 config POWER_RESET_LTC2952
 	bool "LTC2952 PowerPath power-off driver"
 	depends on OF_GPIO
diff --git a/drivers/power/reset/Makefile b/drivers/power/reset/Makefile
index 1be307c..11dae3b 100644
--- a/drivers/power/reset/Makefile
+++ b/drivers/power/reset/Makefile
@@ -10,6 +10,7 @@ obj-$(CONFIG_POWER_RESET_GPIO_RESTART) += gpio-restart.o
 obj-$(CONFIG_POWER_RESET_HISI) += hisi-reboot.o
 obj-$(CONFIG_POWER_RESET_IMX) += imx-snvs-poweroff.o
 obj-$(CONFIG_POWER_RESET_MSM) += msm-poweroff.o
+obj-$(CONFIG_POWER_RESET_PIIX4_POWEROFF) += piix4-poweroff.o
 obj-$(CONFIG_POWER_RESET_LTC2952) += ltc2952-poweroff.o
 obj-$(CONFIG_POWER_RESET_QNAP) += qnap-poweroff.o
 obj-$(CONFIG_POWER_RESET_RESTART) += restart-poweroff.o
diff --git a/drivers/power/reset/piix4-poweroff.c b/drivers/power/reset/piix4-poweroff.c
new file mode 100644
index 0000000..11f0999
--- /dev/null
+++ b/drivers/power/reset/piix4-poweroff.c
@@ -0,0 +1,104 @@
+/*
+ * Copyright (C) 2016 Imagination Technologies
+ * Author: Paul Burton <paul.burton@imgtec.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/delay.h>
+#include <linux/io.h>
+#include <linux/module.h>
+#include <linux/pci.h>
+#include <linux/pm.h>
+
+static struct pci_dev *pm_dev;
+static resource_size_t io_offset;
+
+enum piix4_pm_io_reg {
+	PIIX4_FUNC3IO_PMSTS			= 0x00,
+#define PIIX4_FUNC3IO_PMSTS_PWRBTN_STS		BIT(8)
+	PIIX4_FUNC3IO_PMCNTRL			= 0x04,
+#define PIIX4_FUNC3IO_PMCNTRL_SUS_EN		BIT(13)
+#define PIIX4_FUNC3IO_PMCNTRL_SUS_TYP_SOFF	(0x0 << 10)
+};
+
+#define PIIX4_SUSPEND_MAGIC			0x00120002
+
+static void piix4_poweroff(void)
+{
+	int spec_devid;
+	u16 sts;
+
+	/* Ensure the power button status is clear */
+	while (1) {
+		sts = inw(io_offset + PIIX4_FUNC3IO_PMSTS);
+		if (!(sts & PIIX4_FUNC3IO_PMSTS_PWRBTN_STS))
+			break;
+		outw(sts, io_offset + PIIX4_FUNC3IO_PMSTS);
+	}
+
+	/* Enable entry to suspend */
+	outw(PIIX4_FUNC3IO_PMCNTRL_SUS_TYP_SOFF | PIIX4_FUNC3IO_PMCNTRL_SUS_EN,
+	     io_offset + PIIX4_FUNC3IO_PMCNTRL);
+
+	/* If the special cycle occurs too soon this doesn't work... */
+	mdelay(10);
+
+	/*
+	 * The PIIX4 will enter the suspend state only after seeing a special
+	 * cycle with the correct magic data on the PCI bus. Generate that
+	 * cycle now.
+	 */
+	spec_devid = PCI_DEVID(0, PCI_DEVFN(0x1f, 0x7));
+	pci_bus_write_config_dword(pm_dev->bus, spec_devid, 0,
+				   PIIX4_SUSPEND_MAGIC);
+
+	/* Give the system some time to power down, then error */
+	mdelay(1000);
+	pr_emerg("Unable to poweroff system\n");
+}
+
+static int piix4_poweroff_probe(struct pci_dev *dev,
+				const struct pci_device_id *id)
+{
+	int res, io_region = PCI_BRIDGE_RESOURCES;
+
+	/* Request access to the PIIX4 PM IO registers */
+	res = pci_request_region(dev, io_region, "PIIX4 PM IO registers");
+	if (res) {
+		dev_err(&dev->dev, "failed to request PM IO registers: %d\n",
+			res);
+		return res;
+	}
+
+	pm_dev = dev;
+	io_offset = pci_resource_start(dev, io_region);
+	pm_power_off = piix4_poweroff;
+
+	return 0;
+}
+
+static void piix4_poweroff_remove(struct pci_dev *dev)
+{
+	if (pm_power_off == piix4_poweroff)
+		pm_power_off = NULL;
+}
+
+static const struct pci_device_id piix4_poweroff_ids[] = {
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB_3) },
+	{ 0 },
+};
+
+static struct pci_driver piix4_poweroff_driver = {
+	.name		= "piix4-poweroff",
+	.id_table	= piix4_poweroff_ids,
+	.probe		= piix4_poweroff_probe,
+	.remove		= piix4_poweroff_remove,
+};
+
+module_pci_driver(piix4_poweroff_driver);
+MODULE_AUTHOR("Paul Burton <paul.burton@imgtec.com>");
+MODULE_LICENSE("GPL");
-- 
2.9.3

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#1486961 — Re: [PATCH v2 13/14] power: reset: Add Intel PIIX4 poweroff driver

[Multipart message — attachments visible in raw view] — view raw

Hi,

On Mon, Sep 19, 2016 at 10:21:30PM +0100, Paul Burton wrote:
> Add a driver which allows powering off the system via an Intel PIIX4
> southbridge, by entering the PIIX4 SOff state. This is useful on the
> MIPS Malta development board, where it will power down the FPGA based
> board until its ON/NMI button is pressed, or the QEMU implementation of
> the MIPS Malta board where it will cause QEMU to exit.
> 
> Signed-off-by: Paul Burton <paul.burton@imgtec.com>
> 
> ---
> 
> Changes in v2:
> - Add MODULE_LICENSE
> - Allow non-MIPS builds with COMPILE_TEST
> 
>  drivers/power/reset/Kconfig          |  10 ++++
>  drivers/power/reset/Makefile         |   1 +
>  drivers/power/reset/piix4-poweroff.c | 104 +++++++++++++++++++++++++++++++++++
>  3 files changed, 115 insertions(+)
>  create mode 100644 drivers/power/reset/piix4-poweroff.c
> 
> diff --git a/drivers/power/reset/Kconfig b/drivers/power/reset/Kconfig
> index c74c3f6..abeb772 100644
> --- a/drivers/power/reset/Kconfig
> +++ b/drivers/power/reset/Kconfig
> @@ -104,6 +104,16 @@ config POWER_RESET_MSM
>  	help
>  	  Power off and restart support for Qualcomm boards.
>  
> +config POWER_RESET_PIIX4_POWEROFF
> +	tristate "Intel PIIX4 power-off driver"
> +	depends on PCI
> +	depends on MIPS || COMPILE_TEST
> +	help
> +	  This driver supports powering off a system using the Intel PIIX4
> +	  southbridge, for example the MIPS Malta development board. The
> +	  southbridge SOff state is entered in response to a request to
> +	  power off the system.
> +
>  config POWER_RESET_LTC2952
>  	bool "LTC2952 PowerPath power-off driver"
>  	depends on OF_GPIO
> diff --git a/drivers/power/reset/Makefile b/drivers/power/reset/Makefile
> index 1be307c..11dae3b 100644
> --- a/drivers/power/reset/Makefile
> +++ b/drivers/power/reset/Makefile
> @@ -10,6 +10,7 @@ obj-$(CONFIG_POWER_RESET_GPIO_RESTART) += gpio-restart.o
>  obj-$(CONFIG_POWER_RESET_HISI) += hisi-reboot.o
>  obj-$(CONFIG_POWER_RESET_IMX) += imx-snvs-poweroff.o
>  obj-$(CONFIG_POWER_RESET_MSM) += msm-poweroff.o
> +obj-$(CONFIG_POWER_RESET_PIIX4_POWEROFF) += piix4-poweroff.o
>  obj-$(CONFIG_POWER_RESET_LTC2952) += ltc2952-poweroff.o
>  obj-$(CONFIG_POWER_RESET_QNAP) += qnap-poweroff.o
>  obj-$(CONFIG_POWER_RESET_RESTART) += restart-poweroff.o
> diff --git a/drivers/power/reset/piix4-poweroff.c b/drivers/power/reset/piix4-poweroff.c
> new file mode 100644
> index 0000000..11f0999
> --- /dev/null
> +++ b/drivers/power/reset/piix4-poweroff.c
> @@ -0,0 +1,104 @@
> +/*
> + * Copyright (C) 2016 Imagination Technologies
> + * Author: Paul Burton <paul.burton@imgtec.com>
> + *
> + * This program is free software; you can redistribute it and/or modify it
> + * under the terms of the GNU General Public License as published by the
> + * Free Software Foundation; either version 2 of the License, or (at your
> + * option) any later version.
> + */
> +
> +#include <linux/delay.h>
> +#include <linux/io.h>
> +#include <linux/module.h>
> +#include <linux/pci.h>
> +#include <linux/pm.h>
> +
> +static struct pci_dev *pm_dev;
> +static resource_size_t io_offset;
> +
> +enum piix4_pm_io_reg {
> +	PIIX4_FUNC3IO_PMSTS			= 0x00,
> +#define PIIX4_FUNC3IO_PMSTS_PWRBTN_STS		BIT(8)
> +	PIIX4_FUNC3IO_PMCNTRL			= 0x04,
> +#define PIIX4_FUNC3IO_PMCNTRL_SUS_EN		BIT(13)
> +#define PIIX4_FUNC3IO_PMCNTRL_SUS_TYP_SOFF	(0x0 << 10)
> +};
> +
> +#define PIIX4_SUSPEND_MAGIC			0x00120002
> +
> +static void piix4_poweroff(void)
> +{
> +	int spec_devid;
> +	u16 sts;
> +
> +	/* Ensure the power button status is clear */
> +	while (1) {
> +		sts = inw(io_offset + PIIX4_FUNC3IO_PMSTS);
> +		if (!(sts & PIIX4_FUNC3IO_PMSTS_PWRBTN_STS))
> +			break;
> +		outw(sts, io_offset + PIIX4_FUNC3IO_PMSTS);
> +	}
> +
> +	/* Enable entry to suspend */
> +	outw(PIIX4_FUNC3IO_PMCNTRL_SUS_TYP_SOFF | PIIX4_FUNC3IO_PMCNTRL_SUS_EN,
> +	     io_offset + PIIX4_FUNC3IO_PMCNTRL);
> +
> +	/* If the special cycle occurs too soon this doesn't work... */
> +	mdelay(10);
> +
> +	/*
> +	 * The PIIX4 will enter the suspend state only after seeing a special
> +	 * cycle with the correct magic data on the PCI bus. Generate that
> +	 * cycle now.
> +	 */
> +	spec_devid = PCI_DEVID(0, PCI_DEVFN(0x1f, 0x7));
> +	pci_bus_write_config_dword(pm_dev->bus, spec_devid, 0,
> +				   PIIX4_SUSPEND_MAGIC);
> +
> +	/* Give the system some time to power down, then error */
> +	mdelay(1000);
> +	pr_emerg("Unable to poweroff system\n");
> +}
> +
> +static int piix4_poweroff_probe(struct pci_dev *dev,
> +				const struct pci_device_id *id)
> +{
> +	int res, io_region = PCI_BRIDGE_RESOURCES;

if (pm_dev)
    return -EINVAL;

> +	/* Request access to the PIIX4 PM IO registers */
> +	res = pci_request_region(dev, io_region, "PIIX4 PM IO registers");
> +	if (res) {
> +		dev_err(&dev->dev, "failed to request PM IO registers: %d\n",
> +			res);
> +		return res;
> +	}
> +
> +	pm_dev = dev;
> +	io_offset = pci_resource_start(dev, io_region);
> +	pm_power_off = piix4_poweroff;
> +
> +	return 0;
> +}
> +
> +static void piix4_poweroff_remove(struct pci_dev *dev)
> +{
> +	if (pm_power_off == piix4_poweroff)
> +		pm_power_off = NULL;

pci_release_region()

> +}
> +
> +static const struct pci_device_id piix4_poweroff_ids[] = {
> +	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB_3) },
> +	{ 0 },
> +};
> +
> +static struct pci_driver piix4_poweroff_driver = {
> +	.name		= "piix4-poweroff",
> +	.id_table	= piix4_poweroff_ids,
> +	.probe		= piix4_poweroff_probe,
> +	.remove		= piix4_poweroff_remove,
> +};
> +
> +module_pci_driver(piix4_poweroff_driver);
> +MODULE_AUTHOR("Paul Burton <paul.burton@imgtec.com>");
> +MODULE_LICENSE("GPL");

-- Sebastian

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#1486877 — [PATCH v2 04/14] MIPS: Malta: Allow PCI devices DMA to lower 2GB physical

Set the PCI_BAR0 register in all configurations such that PCI devices
can perform DMA to all of the bottom 2GB of the physical address space.
This is imperfect if we make use of the legacy Malta memory map, but it
is an improvement on the inconsistent values setup before.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
---

Changes in v2: None

 arch/mips/mti-malta/malta-init.c | 17 +++++++----------
 1 file changed, 7 insertions(+), 10 deletions(-)

diff --git a/arch/mips/mti-malta/malta-init.c b/arch/mips/mti-malta/malta-init.c
index dc2c521..0f3b881 100644
--- a/arch/mips/mti-malta/malta-init.c
+++ b/arch/mips/mti-malta/malta-init.c
@@ -14,6 +14,7 @@
 #include <linux/init.h>
 #include <linux/string.h>
 #include <linux/kernel.h>
+#include <linux/pci_regs.h>
 #include <linux/serial_core.h>
 
 #include <asm/cacheflush.h>
@@ -242,23 +243,19 @@ mips_pci_controller:
 			  MSC01_PCI_SWAP_BYTESWAP << MSC01_PCI_SWAP_MEM_SHF |
 			  MSC01_PCI_SWAP_BYTESWAP << MSC01_PCI_SWAP_BAR0_SHF);
 #endif
-#ifndef CONFIG_EVA
-		/* Fix up target memory mapping.  */
-		MSC_READ(MSC01_PCI_BAR0, mask);
-		MSC_WRITE(MSC01_PCI_P2SCMSKL, mask & MSC01_PCI_BAR0_SIZE_MSK);
-#else
+
 		/*
 		 * Setup the Malta max (2GB) memory for PCI DMA in host bridge
-		 * in transparent addressing mode, starting from 0x80000000.
+		 * in transparent addressing mode.
 		 */
-		mask = PHYS_OFFSET | (1<<3);
+		mask = PHYS_OFFSET | PCI_BASE_ADDRESS_MEM_PREFETCH;
 		MSC_WRITE(MSC01_PCI_BAR0, mask);
-
-		mask = PHYS_OFFSET;
 		MSC_WRITE(MSC01_PCI_HEAD4, mask);
+
+		mask &= MSC01_PCI_BAR0_SIZE_MSK;
 		MSC_WRITE(MSC01_PCI_P2SCMSKL, mask);
 		MSC_WRITE(MSC01_PCI_P2SCMAPL, mask);
-#endif
+
 		/* Don't handle target retries indefinitely.  */
 		if ((data & MSC01_PCI_CFG_MAXRTRY_MSK) ==
 		    MSC01_PCI_CFG_MAXRTRY_MSK)
-- 
2.9.3

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#1486878 — [PATCH v2 08/14] MIPS: Malta: Remove custom DT match table

Since commit 44a7185c2ae6 ("of/platform: Add common method to populate
default bus") the Malta publish_devices initcall has essentially been a
no-op. Remove it.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>

---

Changes in v2:
- New patch to deal with 44a7185c2ae6

 arch/mips/mti-malta/malta-dt.c | 15 ---------------
 1 file changed, 15 deletions(-)

diff --git a/arch/mips/mti-malta/malta-dt.c b/arch/mips/mti-malta/malta-dt.c
index 47a2288..4822943 100644
--- a/arch/mips/mti-malta/malta-dt.c
+++ b/arch/mips/mti-malta/malta-dt.c
@@ -17,18 +17,3 @@ void __init device_tree_init(void)
 {
 	unflatten_and_copy_device_tree();
 }
-
-static const struct of_device_id bus_ids[] __initconst = {
-	{ .compatible = "simple-bus", },
-	{ .compatible = "isa", },
-	{},
-};
-
-static int __init publish_devices(void)
-{
-	if (!of_have_populated_dt())
-		return 0;
-
-	return of_platform_bus_probe(NULL, bus_ids, NULL);
-}
-device_initcall(publish_devices);
-- 
2.9.3

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#1486879 — [PATCH v2 01/14] irqchip: i8259: Add domain before mapping parent irq

Mapping the parent IRQ will use a virq number which may conflict with
the hardcoded I8259A_IRQ_BASE..I8259A_IRQ_BASE+15 range that the i8259
driver expects to be free. If this occurs then we'll hit errors when
adding the i8259 IRQ domain, since one of its virq numbers will already
be in use.

Avoid this by adding the i8259 domain before mapping the parent IRQ,
such that the i8259 virq numbers become used before the parent interrupt
controller gets a chance to use any of them.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
---

Changes in v2: None

 drivers/irqchip/irq-i8259.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/irqchip/irq-i8259.c b/drivers/irqchip/irq-i8259.c
index 6b304eb..85897fd 100644
--- a/drivers/irqchip/irq-i8259.c
+++ b/drivers/irqchip/irq-i8259.c
@@ -370,13 +370,15 @@ int __init i8259_of_init(struct device_node *node, struct device_node *parent)
 	struct irq_domain *domain;
 	unsigned int parent_irq;
 
+	domain = __init_i8259_irqs(node);
+
 	parent_irq = irq_of_parse_and_map(node, 0);
 	if (!parent_irq) {
 		pr_err("Failed to map i8259 parent IRQ\n");
+		irq_domain_remove(domain);
 		return -ENODEV;
 	}
 
-	domain = __init_i8259_irqs(node);
 	irq_set_chained_handler_and_data(parent_irq, i8259_irq_dispatch,
 					 domain);
 	return 0;
-- 
2.9.3

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#1486880 — [PATCH v2 07/14] of/platform: Probe "isa" busses by default

Since commit 44a7185c2ae6 ("of/platform: Add common method to populate
default bus") platforms calling of_platform_bus_probe from an initcall
is either a rather unsafe race with of_platform_default_populate_init or
a no-op. The MIPS Malta board needs to probe devices under an ISA bus,
which we do support in the of_busses array but until now haven't
included in of_default_bus_match_table.

Add an "isa" entry to of_default_bus_match_table such that we can just
accept use of of_platform_default_populate_init & remove the
Malta-specific match table in a later patch.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>

---

Changes in v2:
- New patch to deal with 44a7185c2ae6

 drivers/of/platform.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/of/platform.c b/drivers/of/platform.c
index f39ccd5..d85e431 100644
--- a/drivers/of/platform.c
+++ b/drivers/of/platform.c
@@ -29,6 +29,7 @@
 const struct of_device_id of_default_bus_match_table[] = {
 	{ .compatible = "simple-bus", },
 	{ .compatible = "simple-mfd", },
+	{ .compatible = "isa", },
 #ifdef CONFIG_ARM_AMBA
 	{ .compatible = "arm,amba-bus", },
 #endif /* CONFIG_ARM_AMBA */
-- 
2.9.3

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#1486881 — [PATCH v2 11/14] MIPS: Malta: Use syscon-reboot driver to reboot

Make use of the generic syscon-reboot driver to reboot the Malta board,
reducing the amount of platform code it requires.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
---

Changes in v2: None

 arch/mips/boot/dts/mti/malta.dts            | 12 ++++++++++++
 arch/mips/configs/malta_defconfig           |  2 ++
 arch/mips/configs/malta_kvm_defconfig       |  2 ++
 arch/mips/configs/malta_kvm_guest_defconfig |  2 ++
 arch/mips/configs/malta_qemu_32r6_defconfig |  2 ++
 arch/mips/configs/maltaaprp_defconfig       |  2 ++
 arch/mips/configs/maltasmvp_defconfig       |  2 ++
 arch/mips/configs/maltasmvp_eva_defconfig   |  2 ++
 arch/mips/configs/maltaup_defconfig         |  2 ++
 arch/mips/configs/maltaup_xpa_defconfig     |  2 ++
 arch/mips/mti-malta/malta-reset.c           | 15 ++-------------
 11 files changed, 32 insertions(+), 13 deletions(-)

diff --git a/arch/mips/boot/dts/mti/malta.dts b/arch/mips/boot/dts/mti/malta.dts
index 48783b1..f604a27 100644
--- a/arch/mips/boot/dts/mti/malta.dts
+++ b/arch/mips/boot/dts/mti/malta.dts
@@ -81,6 +81,18 @@
 		};
 	};
 
+	fpga_regs: system-controller@1f000000 {
+		compatible = "mti,malta-fpga", "syscon", "simple-mfd";
+		reg = <0x1f000000 0x1000>;
+
+		reboot {
+			compatible = "syscon-reboot";
+			regmap = <&fpga_regs>;
+			offset = <0x500>;
+			mask = <0x4d>;
+		};
+	};
+
 	isa {
 		compatible = "isa";
 		#address-cells = <2>;
diff --git a/arch/mips/configs/malta_defconfig b/arch/mips/configs/malta_defconfig
index d5d4816..58d43f3 100644
--- a/arch/mips/configs/malta_defconfig
+++ b/arch/mips/configs/malta_defconfig
@@ -318,6 +318,8 @@ CONFIG_LIBERTAS=m
 # CONFIG_SERIO_I8042 is not set
 CONFIG_SERIAL_8250=y
 CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_POWER_RESET=y
+CONFIG_POWER_RESET_SYSCON=y
 # CONFIG_HWMON is not set
 CONFIG_FB=y
 CONFIG_FB_CIRRUS=y
diff --git a/arch/mips/configs/malta_kvm_defconfig b/arch/mips/configs/malta_kvm_defconfig
index ef6ef24..c8f7e28 100644
--- a/arch/mips/configs/malta_kvm_defconfig
+++ b/arch/mips/configs/malta_kvm_defconfig
@@ -331,6 +331,8 @@ CONFIG_LIBERTAS=m
 # CONFIG_SERIO_I8042 is not set
 CONFIG_SERIAL_8250=y
 CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_POWER_RESET=y
+CONFIG_POWER_RESET_SYSCON=y
 # CONFIG_HWMON is not set
 CONFIG_FB=y
 CONFIG_FB_CIRRUS=y
diff --git a/arch/mips/configs/malta_kvm_guest_defconfig b/arch/mips/configs/malta_kvm_guest_defconfig
index 3a49a77..d2f54e5 100644
--- a/arch/mips/configs/malta_kvm_guest_defconfig
+++ b/arch/mips/configs/malta_kvm_guest_defconfig
@@ -331,6 +331,8 @@ CONFIG_LIBERTAS=m
 # CONFIG_SERIO_I8042 is not set
 CONFIG_SERIAL_8250=y
 CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_POWER_RESET=y
+CONFIG_POWER_RESET_SYSCON=y
 # CONFIG_HWMON is not set
 CONFIG_FB=y
 CONFIG_FB_CIRRUS=y
diff --git a/arch/mips/configs/malta_qemu_32r6_defconfig b/arch/mips/configs/malta_qemu_32r6_defconfig
index 65f140e..cbf37dd 100644
--- a/arch/mips/configs/malta_qemu_32r6_defconfig
+++ b/arch/mips/configs/malta_qemu_32r6_defconfig
@@ -132,6 +132,8 @@ CONFIG_LEGACY_PTY_COUNT=4
 CONFIG_SERIAL_8250=y
 CONFIG_SERIAL_8250_CONSOLE=y
 CONFIG_HW_RANDOM=y
+CONFIG_POWER_RESET=y
+CONFIG_POWER_RESET_SYSCON=y
 # CONFIG_HWMON is not set
 CONFIG_FB=y
 CONFIG_FIRMWARE_EDID=y
diff --git a/arch/mips/configs/maltaaprp_defconfig b/arch/mips/configs/maltaaprp_defconfig
index 799c433..35f6ba2 100644
--- a/arch/mips/configs/maltaaprp_defconfig
+++ b/arch/mips/configs/maltaaprp_defconfig
@@ -132,6 +132,8 @@ CONFIG_LEGACY_PTY_COUNT=16
 CONFIG_SERIAL_8250=y
 CONFIG_SERIAL_8250_CONSOLE=y
 CONFIG_HW_RANDOM=y
+CONFIG_POWER_RESET=y
+CONFIG_POWER_RESET_SYSCON=y
 # CONFIG_HWMON is not set
 CONFIG_VIDEO_OUTPUT_CONTROL=m
 CONFIG_FB=y
diff --git a/arch/mips/configs/maltasmvp_defconfig b/arch/mips/configs/maltasmvp_defconfig
index ac0eb4d..900f145 100644
--- a/arch/mips/configs/maltasmvp_defconfig
+++ b/arch/mips/configs/maltasmvp_defconfig
@@ -134,6 +134,8 @@ CONFIG_LEGACY_PTY_COUNT=4
 CONFIG_SERIAL_8250=y
 CONFIG_SERIAL_8250_CONSOLE=y
 CONFIG_HW_RANDOM=y
+CONFIG_POWER_RESET=y
+CONFIG_POWER_RESET_SYSCON=y
 # CONFIG_HWMON is not set
 CONFIG_FB=y
 CONFIG_FIRMWARE_EDID=y
diff --git a/arch/mips/configs/maltasmvp_eva_defconfig b/arch/mips/configs/maltasmvp_eva_defconfig
index 3184600..8e2738b 100644
--- a/arch/mips/configs/maltasmvp_eva_defconfig
+++ b/arch/mips/configs/maltasmvp_eva_defconfig
@@ -137,6 +137,8 @@ CONFIG_LEGACY_PTY_COUNT=4
 CONFIG_SERIAL_8250=y
 CONFIG_SERIAL_8250_CONSOLE=y
 CONFIG_HW_RANDOM=y
+CONFIG_POWER_RESET=y
+CONFIG_POWER_RESET_SYSCON=y
 # CONFIG_HWMON is not set
 CONFIG_VIDEO_OUTPUT_CONTROL=m
 CONFIG_FB=y
diff --git a/arch/mips/configs/maltaup_defconfig b/arch/mips/configs/maltaup_defconfig
index a79107d..6dc4e30 100644
--- a/arch/mips/configs/maltaup_defconfig
+++ b/arch/mips/configs/maltaup_defconfig
@@ -131,6 +131,8 @@ CONFIG_LEGACY_PTY_COUNT=16
 CONFIG_SERIAL_8250=y
 CONFIG_SERIAL_8250_CONSOLE=y
 CONFIG_HW_RANDOM=y
+CONFIG_POWER_RESET=y
+CONFIG_POWER_RESET_SYSCON=y
 # CONFIG_HWMON is not set
 CONFIG_VIDEO_OUTPUT_CONTROL=m
 CONFIG_FB=y
diff --git a/arch/mips/configs/maltaup_xpa_defconfig b/arch/mips/configs/maltaup_xpa_defconfig
index 62e05eb..3d0d9cb 100644
--- a/arch/mips/configs/maltaup_xpa_defconfig
+++ b/arch/mips/configs/maltaup_xpa_defconfig
@@ -326,6 +326,8 @@ CONFIG_LIBERTAS=m
 # CONFIG_SERIO_I8042 is not set
 CONFIG_SERIAL_8250=y
 CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_POWER_RESET=y
+CONFIG_POWER_RESET_SYSCON=y
 # CONFIG_HWMON is not set
 CONFIG_FB=y
 CONFIG_FB_CIRRUS=y
diff --git a/arch/mips/mti-malta/malta-reset.c b/arch/mips/mti-malta/malta-reset.c
index 2fd2cc2..04d6b9c 100644
--- a/arch/mips/mti-malta/malta-reset.c
+++ b/arch/mips/mti-malta/malta-reset.c
@@ -8,21 +8,11 @@
  */
 #include <linux/io.h>
 #include <linux/pm.h>
+#include <linux/reboot.h>
 
 #include <asm/reboot.h>
 #include <asm/mach-malta/malta-pm.h>
 
-#define SOFTRES_REG	0x1f000500
-#define GORESET		0x42
-
-static void mips_machine_restart(char *command)
-{
-	unsigned int __iomem *softres_reg =
-		ioremap(SOFTRES_REG, sizeof(unsigned int));
-
-	__raw_writel(GORESET, softres_reg);
-}
-
 static void mips_machine_halt(void)
 {
 	while (true);
@@ -33,12 +23,11 @@ static void mips_machine_power_off(void)
 	mips_pm_suspend(PIIX4_FUNC3IO_PMCNTRL_SUS_TYP_SOFF);
 
 	pr_info("Failed to power down, resetting\n");
-	mips_machine_restart(NULL);
+	machine_restart(NULL);
 }
 
 static int __init mips_reboot_setup(void)
 {
-	_machine_restart = mips_machine_restart;
 	_machine_halt = mips_machine_halt;
 	pm_power_off = mips_machine_power_off;
 
-- 
2.9.3

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#1486882 — [PATCH v2 05/14] MIPS: Malta: Use all available DDR by default

Malta boards can have more than 256MB DDR available, but we have
previously only made use of up to 256MB (ie. the DDR accessible via
kseg0) by default, without the user manually specifying mem= kernel
parameters. This patch causes all available DDR, as reported by the
bootloader via the ememsize or memsize environment variables or
optionally on the command line, to be used when possible without the
user needing to manually provide the memory ranges.

Malta now has 2 subtly different memory maps which have to be taken into
account when setting this up. The original memory map (referred to by
the code as v1) has up to 2GB of DDR aliased in both the upper & lower
halves of the 32 bit physical address space, with a 256MB I/O region
obscuring 0x10000000-0x1fffffff only in the lower alias. The revised v2
memory map is flat with up to 4GB DDR starting from 0x0, and the I/O
region obscures 256MB of DDR which becomes inacessible. The memory map
in use is indicated by a register provided by the rocit2 system
controller, which is checked in order to set up the kernels memory
ranges accordingly.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>

---

Changes in v2:
- Include <asm/mips-boards/generic.h> for MIPS_REVISION_*.

 arch/mips/mti-malta/malta-dtshim.c | 110 +++++++++++++++++++++++++++++++++++--
 1 file changed, 104 insertions(+), 6 deletions(-)

diff --git a/arch/mips/mti-malta/malta-dtshim.c b/arch/mips/mti-malta/malta-dtshim.c
index 151f488..bdda3cb 100644
--- a/arch/mips/mti-malta/malta-dtshim.c
+++ b/arch/mips/mti-malta/malta-dtshim.c
@@ -13,18 +13,64 @@
 #include <linux/libfdt.h>
 #include <linux/of_fdt.h>
 #include <linux/sizes.h>
+#include <asm/addrspace.h>
 #include <asm/bootinfo.h>
 #include <asm/fw/fw.h>
+#include <asm/mips-boards/generic.h>
 #include <asm/page.h>
 
+#define ROCIT_REG_BASE			0x1f403000
+#define ROCIT_CONFIG_GEN1		(ROCIT_REG_BASE + 0x04)
+#define  ROCIT_CONFIG_GEN1_MEMMAP_SHIFT	8
+#define  ROCIT_CONFIG_GEN1_MEMMAP_MASK	(0xf << 8)
+
 static unsigned char fdt_buf[16 << 10] __initdata;
 
 /* determined physical memory size, not overridden by command line args	 */
 extern unsigned long physical_memsize;
 
-#define MAX_MEM_ARRAY_ENTRIES 1
+enum mem_map {
+	MEM_MAP_V1 = 0,
+	MEM_MAP_V2,
+};
+
+#define MAX_MEM_ARRAY_ENTRIES 2
+
+static __init int malta_scon(void)
+{
+	int scon = MIPS_REVISION_SCONID;
+
+	if (scon != MIPS_REVISION_SCON_OTHER)
+		return scon;
+
+	switch (MIPS_REVISION_CORID) {
+	case MIPS_REVISION_CORID_QED_RM5261:
+	case MIPS_REVISION_CORID_CORE_LV:
+	case MIPS_REVISION_CORID_CORE_FPGA:
+	case MIPS_REVISION_CORID_CORE_FPGAR2:
+		return MIPS_REVISION_SCON_GT64120;
+
+	case MIPS_REVISION_CORID_CORE_EMUL_BON:
+	case MIPS_REVISION_CORID_BONITO64:
+	case MIPS_REVISION_CORID_CORE_20K:
+		return MIPS_REVISION_SCON_BONITO;
+
+	case MIPS_REVISION_CORID_CORE_MSC:
+	case MIPS_REVISION_CORID_CORE_FPGA2:
+	case MIPS_REVISION_CORID_CORE_24K:
+		return MIPS_REVISION_SCON_SOCIT;
+
+	case MIPS_REVISION_CORID_CORE_FPGA3:
+	case MIPS_REVISION_CORID_CORE_FPGA4:
+	case MIPS_REVISION_CORID_CORE_FPGA5:
+	case MIPS_REVISION_CORID_CORE_EMUL_MSC:
+	default:
+		return MIPS_REVISION_SCON_ROCIT;
+	}
+}
 
-static unsigned __init gen_fdt_mem_array(__be32 *mem_array, unsigned long size)
+static unsigned __init gen_fdt_mem_array(__be32 *mem_array, unsigned long size,
+					 enum mem_map map)
 {
 	unsigned long size_preio;
 	unsigned entries;
@@ -39,11 +85,47 @@ static unsigned __init gen_fdt_mem_array(__be32 *mem_array, unsigned long size)
 		 * DDR but limits it to 2GB.
 		 */
 		mem_array[1] = cpu_to_be32(size);
+		goto done;
+	}
+
+	size_preio = min_t(unsigned long, size, SZ_256M);
+	mem_array[1] = cpu_to_be32(size_preio);
+	size -= size_preio;
+	if (!size)
+		goto done;
+
+	if (map == MEM_MAP_V2) {
+		/*
+		 * We have a flat 32 bit physical memory map with DDR filling
+		 * all 4GB of the memory map, apart from the I/O region which
+		 * obscures 256MB from 0x10000000-0x1fffffff.
+		 *
+		 * Therefore we discard the 256MB behind the I/O region.
+		 */
+		if (size <= SZ_256M)
+			goto done;
+		size -= SZ_256M;
+
+		/* Make use of the memory following the I/O region */
+		entries++;
+		mem_array[2] = cpu_to_be32(PHYS_OFFSET + SZ_512M);
+		mem_array[3] = cpu_to_be32(size);
 	} else {
-		size_preio = min_t(unsigned long, size, SZ_256M);
-		mem_array[1] = cpu_to_be32(size_preio);
+		/*
+		 * We have a 32 bit physical memory map with a 2GB DDR region
+		 * aliased in the upper & lower halves of it. The I/O region
+		 * obscures 256MB from 0x10000000-0x1fffffff in the low alias
+		 * but the DDR it obscures is accessible via the high alias.
+		 *
+		 * Simply access everything beyond the lowest 256MB of DDR using
+		 * the high alias.
+		 */
+		entries++;
+		mem_array[2] = cpu_to_be32(PHYS_OFFSET + SZ_2G + SZ_256M);
+		mem_array[3] = cpu_to_be32(size);
 	}
 
+done:
 	BUG_ON(entries > MAX_MEM_ARRAY_ENTRIES);
 	return entries;
 }
@@ -54,6 +136,8 @@ static void __init append_memory(void *fdt, int root_off)
 	unsigned long memsize;
 	unsigned mem_entries;
 	int i, err, mem_off;
+	enum mem_map mem_map;
+	u32 config;
 	char *var, param_name[10], *var_names[] = {
 		"ememsize", "memsize",
 	};
@@ -106,6 +190,20 @@ static void __init append_memory(void *fdt, int root_off)
 	/* if the user says there's more RAM than we thought, believe them */
 	physical_memsize = max_t(unsigned long, physical_memsize, memsize);
 
+	/* detect the memory map in use */
+	if (malta_scon() == MIPS_REVISION_SCON_ROCIT) {
+		/* ROCit has a register indicating the memory map in use */
+		config = readl((void __iomem *)CKSEG1ADDR(ROCIT_CONFIG_GEN1));
+		mem_map = config & ROCIT_CONFIG_GEN1_MEMMAP_MASK;
+		mem_map >>= ROCIT_CONFIG_GEN1_MEMMAP_SHIFT;
+	} else {
+		/* if not using ROCit, presume the v1 memory map */
+		mem_map = MEM_MAP_V1;
+	}
+	if (mem_map > MEM_MAP_V2)
+		panic("Unsupported physical memory map v%u detected",
+		      (unsigned int)mem_map);
+
 	/* append memory to the DT */
 	mem_off = fdt_add_subnode(fdt, root_off, "memory");
 	if (mem_off < 0)
@@ -115,13 +213,13 @@ static void __init append_memory(void *fdt, int root_off)
 	if (err)
 		panic("Unable to set memory node device_type: %d", err);
 
-	mem_entries = gen_fdt_mem_array(mem_array, physical_memsize);
+	mem_entries = gen_fdt_mem_array(mem_array, physical_memsize, mem_map);
 	err = fdt_setprop(fdt, mem_off, "reg", mem_array,
 			  mem_entries * 2 * sizeof(mem_array[0]));
 	if (err)
 		panic("Unable to set memory regs property: %d", err);
 
-	mem_entries = gen_fdt_mem_array(mem_array, memsize);
+	mem_entries = gen_fdt_mem_array(mem_array, memsize, mem_map);
 	err = fdt_setprop(fdt, mem_off, "linux,usable-memory", mem_array,
 			  mem_entries * 2 * sizeof(mem_array[0]));
 	if (err)
-- 
2.9.3

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#1486883 — [PATCH v2 10/14] MIPS: Malta: Probe pflash via DT

Add the DT nodes required to probe the CFI compatible parallel monitor
flash found on the Malta development board, and remove the platform
code that was previously doing it. Delete the now-empty malta-platform.c
file. Adjust the Malta defconfigs that enable MTD & the pflash/CFI
driver to enable CONFIG_MTD_PHYSMAP_OF rather than CONFIG_MTD_PHYSMAP in
order to preserve their behaviour.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>

---

Changes in v2:
- Leave malta-platform.o in Makefile
- Move partitions under a partitions node

 arch/mips/boot/dts/mti/malta.dts            | 31 ++++++++++++++++++++
 arch/mips/configs/malta_defconfig           |  2 +-
 arch/mips/configs/malta_kvm_defconfig       |  2 +-
 arch/mips/configs/malta_kvm_guest_defconfig |  2 +-
 arch/mips/configs/maltaup_xpa_defconfig     |  2 +-
 arch/mips/mti-malta/malta-platform.c        | 44 -----------------------------
 6 files changed, 35 insertions(+), 48 deletions(-)

diff --git a/arch/mips/boot/dts/mti/malta.dts b/arch/mips/boot/dts/mti/malta.dts
index fecbca8..48783b1 100644
--- a/arch/mips/boot/dts/mti/malta.dts
+++ b/arch/mips/boot/dts/mti/malta.dts
@@ -50,6 +50,37 @@
 		interrupts = <GIC_SHARED 3 IRQ_TYPE_LEVEL_HIGH>;
 	};
 
+	flash@1e000000 {
+		compatible = "intel,dt28f160", "cfi-flash";
+		reg = <0x1e000000 0x400000>;
+		bank-width = <4>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			yamon@0 {
+				label = "YAMON";
+				reg = <0x0 0x100000>;
+				read-only;
+			};
+
+			user-fs@100000 {
+				label = "User FS";
+				reg = <0x100000 0x2e0000>;
+			};
+
+			board-config@3e0000 {
+				label = "Board Config";
+				reg = <0x3e0000 0x20000>;
+				read-only;
+			};
+		};
+	};
+
 	isa {
 		compatible = "isa";
 		#address-cells = <2>;
diff --git a/arch/mips/configs/malta_defconfig b/arch/mips/configs/malta_defconfig
index 5afb484..d5d4816 100644
--- a/arch/mips/configs/malta_defconfig
+++ b/arch/mips/configs/malta_defconfig
@@ -230,7 +230,7 @@ CONFIG_MTD_CFI=y
 CONFIG_MTD_CFI_INTELEXT=y
 CONFIG_MTD_CFI_AMDSTD=y
 CONFIG_MTD_CFI_STAA=y
-CONFIG_MTD_PHYSMAP=y
+CONFIG_MTD_PHYSMAP_OF=y
 CONFIG_MTD_UBI=m
 CONFIG_MTD_UBI_GLUEBI=m
 CONFIG_BLK_DEV_FD=m
diff --git a/arch/mips/configs/malta_kvm_defconfig b/arch/mips/configs/malta_kvm_defconfig
index 98f1387..ef6ef24 100644
--- a/arch/mips/configs/malta_kvm_defconfig
+++ b/arch/mips/configs/malta_kvm_defconfig
@@ -235,7 +235,7 @@ CONFIG_MTD_CFI=y
 CONFIG_MTD_CFI_INTELEXT=y
 CONFIG_MTD_CFI_AMDSTD=y
 CONFIG_MTD_CFI_STAA=y
-CONFIG_MTD_PHYSMAP=y
+CONFIG_MTD_PHYSMAP_OF=y
 CONFIG_MTD_UBI=m
 CONFIG_MTD_UBI_GLUEBI=m
 CONFIG_BLK_DEV_FD=m
diff --git a/arch/mips/configs/malta_kvm_guest_defconfig b/arch/mips/configs/malta_kvm_guest_defconfig
index 3b5d591..3a49a77 100644
--- a/arch/mips/configs/malta_kvm_guest_defconfig
+++ b/arch/mips/configs/malta_kvm_guest_defconfig
@@ -234,7 +234,7 @@ CONFIG_MTD_CFI=y
 CONFIG_MTD_CFI_INTELEXT=y
 CONFIG_MTD_CFI_AMDSTD=y
 CONFIG_MTD_CFI_STAA=y
-CONFIG_MTD_PHYSMAP=y
+CONFIG_MTD_PHYSMAP_OF=y
 CONFIG_MTD_UBI=m
 CONFIG_MTD_UBI_GLUEBI=m
 CONFIG_BLK_DEV_FD=m
diff --git a/arch/mips/configs/maltaup_xpa_defconfig b/arch/mips/configs/maltaup_xpa_defconfig
index 7322157..62e05eb 100644
--- a/arch/mips/configs/maltaup_xpa_defconfig
+++ b/arch/mips/configs/maltaup_xpa_defconfig
@@ -231,7 +231,7 @@ CONFIG_MTD_CFI=y
 CONFIG_MTD_CFI_INTELEXT=y
 CONFIG_MTD_CFI_AMDSTD=y
 CONFIG_MTD_CFI_STAA=y
-CONFIG_MTD_PHYSMAP=y
+CONFIG_MTD_PHYSMAP_OF=y
 CONFIG_MTD_UBI=m
 CONFIG_MTD_UBI_GLUEBI=m
 CONFIG_BLK_DEV_FD=m
diff --git a/arch/mips/mti-malta/malta-platform.c b/arch/mips/mti-malta/malta-platform.c
index 6433a39..cc67dbf 100644
--- a/arch/mips/mti-malta/malta-platform.c
+++ b/arch/mips/mti-malta/malta-platform.c
@@ -25,11 +25,8 @@
 #include <linux/serial_8250.h>
 #include <linux/module.h>
 #include <linux/irq.h>
-#include <linux/mtd/partitions.h>
-#include <linux/mtd/physmap.h>
 #include <linux/platform_device.h>
 #include <asm/mips-boards/maltaint.h>
-#include <mtd/mtd-abi.h>
 
 #define SMC_PORT(base, int)						\
 {									\
@@ -67,49 +64,8 @@ static struct platform_device malta_uart8250_device = {
 	},
 };
 
-static struct mtd_partition malta_mtd_partitions[] = {
-	{
-		.name =		"YAMON",
-		.offset =	0x0,
-		.size =		0x100000,
-		.mask_flags =	MTD_WRITEABLE
-	}, {
-		.name =		"User FS",
-		.offset =	0x100000,
-		.size =		0x2e0000
-	}, {
-		.name =		"Board Config",
-		.offset =	0x3e0000,
-		.size =		0x020000,
-		.mask_flags =	MTD_WRITEABLE
-	}
-};
-
-static struct physmap_flash_data malta_flash_data = {
-	.width		= 4,
-	.nr_parts	= ARRAY_SIZE(malta_mtd_partitions),
-	.parts		= malta_mtd_partitions
-};
-
-static struct resource malta_flash_resource = {
-	.start		= 0x1e000000,
-	.end		= 0x1e3fffff,
-	.flags		= IORESOURCE_MEM
-};
-
-static struct platform_device malta_flash_device = {
-	.name		= "physmap-flash",
-	.id		= 0,
-	.dev		= {
-		.platform_data	= &malta_flash_data,
-	},
-	.num_resources	= 1,
-	.resource	= &malta_flash_resource,
-};
-
 static struct platform_device *malta_devices[] __initdata = {
 	&malta_uart8250_device,
-	&malta_flash_device,
 };
 
 static int __init malta_add_devices(void)
-- 
2.9.3

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