Groups | Search | Server Info | Keyboard shortcuts | Login | Register [http] [https] [nntp] [nntps]

Groups > linux.kernel > #1486877

[PATCH v2 04/14] MIPS: Malta: Allow PCI devices DMA to lower 2GB physical

Show all headers | View raw

Set the PCI_BAR0 register in all configurations such that PCI devices
can perform DMA to all of the bottom 2GB of the physical address space.
This is imperfect if we make use of the legacy Malta memory map, but it
is an improvement on the inconsistent values setup before.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
---

Changes in v2: None

 arch/mips/mti-malta/malta-init.c | 17 +++++++----------
 1 file changed, 7 insertions(+), 10 deletions(-)

diff --git a/arch/mips/mti-malta/malta-init.c b/arch/mips/mti-malta/malta-init.c
index dc2c521..0f3b881 100644
--- a/arch/mips/mti-malta/malta-init.c
+++ b/arch/mips/mti-malta/malta-init.c
@@ -14,6 +14,7 @@
 #include <linux/init.h>
 #include <linux/string.h>
 #include <linux/kernel.h>
+#include <linux/pci_regs.h>
 #include <linux/serial_core.h>
 
 #include <asm/cacheflush.h>
@@ -242,23 +243,19 @@ mips_pci_controller:
 			  MSC01_PCI_SWAP_BYTESWAP << MSC01_PCI_SWAP_MEM_SHF |
 			  MSC01_PCI_SWAP_BYTESWAP << MSC01_PCI_SWAP_BAR0_SHF);
 #endif
-#ifndef CONFIG_EVA
-		/* Fix up target memory mapping.  */
-		MSC_READ(MSC01_PCI_BAR0, mask);
-		MSC_WRITE(MSC01_PCI_P2SCMSKL, mask & MSC01_PCI_BAR0_SIZE_MSK);
-#else
+
 		/*
 		 * Setup the Malta max (2GB) memory for PCI DMA in host bridge
-		 * in transparent addressing mode, starting from 0x80000000.
+		 * in transparent addressing mode.
 		 */
-		mask = PHYS_OFFSET | (1<<3);
+		mask = PHYS_OFFSET | PCI_BASE_ADDRESS_MEM_PREFETCH;
 		MSC_WRITE(MSC01_PCI_BAR0, mask);
-
-		mask = PHYS_OFFSET;
 		MSC_WRITE(MSC01_PCI_HEAD4, mask);
+
+		mask &= MSC01_PCI_BAR0_SIZE_MSK;
 		MSC_WRITE(MSC01_PCI_P2SCMSKL, mask);
 		MSC_WRITE(MSC01_PCI_P2SCMAPL, mask);
-#endif
+
 		/* Don't handle target retries indefinitely.  */
 		if ((data & MSC01_PCI_CFG_MAXRTRY_MSK) ==
 		    MSC01_PCI_CFG_MAXRTRY_MSK)
-- 
2.9.3

Back to linux.kernel | Previous | Next — Previous in thread | Next in thread | Find similar | Unroll thread

Thread

[PATCH v2 00/14] Partial MIPS Malta DT conversion Paul Burton <paul.burton@imgtec.com> - 2016-09-19 23:30 +0200
  [PATCH v2 12/14] MIPS: Malta: Remove custom halt implementation Paul Burton <paul.burton@imgtec.com> - 2016-09-19 23:30 +0200
  [PATCH v2 02/14] irqchip: i8259: Allow platforms to override poll function Paul Burton <paul.burton@imgtec.com> - 2016-09-19 23:30 +0200
  [PATCH v2 13/14] power: reset: Add Intel PIIX4 poweroff driver Paul Burton <paul.burton@imgtec.com> - 2016-09-19 23:30 +0200
    Re: [PATCH v2 13/14] power: reset: Add Intel PIIX4 poweroff driver Sebastian Reichel <sre@kernel.org> - 2016-09-20 01:50 +0200
  [PATCH v2 04/14] MIPS: Malta: Allow PCI devices DMA to lower 2GB physical Paul Burton <paul.burton@imgtec.com> - 2016-09-19 23:30 +0200
  [PATCH v2 08/14] MIPS: Malta: Remove custom DT match table Paul Burton <paul.burton@imgtec.com> - 2016-09-19 23:30 +0200
  [PATCH v2 01/14] irqchip: i8259: Add domain before mapping parent irq Paul Burton <paul.burton@imgtec.com> - 2016-09-19 23:30 +0200
  [PATCH v2 07/14] of/platform: Probe "isa" busses by default Paul Burton <paul.burton@imgtec.com> - 2016-09-19 23:30 +0200
  [PATCH v2 11/14] MIPS: Malta: Use syscon-reboot driver to reboot Paul Burton <paul.burton@imgtec.com> - 2016-09-19 23:30 +0200
  [PATCH v2 05/14] MIPS: Malta: Use all available DDR by default Paul Burton <paul.burton@imgtec.com> - 2016-09-19 23:30 +0200
  [PATCH v2 10/14] MIPS: Malta: Probe pflash via DT Paul Burton <paul.burton@imgtec.com> - 2016-09-19 23:30 +0200

csiph-web