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[PATCH 0/7] ARM: amlogic: Add spifc support to Amlogic's GXBB family

Started byJerome Brunet <jbrunet@baylibre.com>
First post2016-09-07 17:30 +0200
Last post2016-09-08 20:10 +0200
Articles 3 — 2 participants

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  [PATCH 0/7] ARM: amlogic: Add spifc support to Amlogic's GXBB family Jerome Brunet <jbrunet@baylibre.com> - 2016-09-07 17:30 +0200
    [PATCH 1/7] pinctrl: amlogic: gxbb: add spifc pins Jerome Brunet <jbrunet@baylibre.com> - 2016-09-07 17:30 +0200
      Re: [PATCH 1/7] pinctrl: amlogic: gxbb: add spifc pins Kevin Hilman <khilman@baylibre.com> - 2016-09-08 20:10 +0200

#1478403 — [PATCH 0/7] ARM: amlogic: Add spifc support to Amlogic's GXBB family

FromJerome Brunet <jbrunet@baylibre.com>
Date2016-09-07 17:30 +0200
Subject[PATCH 0/7] ARM: amlogic: Add spifc support to Amlogic's GXBB family
Message-ID<seMNP-1pB-3@gated-at.bofh.it>
This patch series adds the necessary pins, clocks and device tree nodes to
enable the spifc controller on the GXBB family. I had to add the nand pins
in pintctrl as the pinmux setting left by u-boot was conflicting with the
spifc pinmux during my test on the P200.

Jerome Brunet (4):
  pinctrl: amlogic: gxbb: add spifc pins
  pinctrl: amlogic: gxbb: add nand pins
  clk: gxbb: expose spifc clock
  ARM64: dts: amlogic: add pins for spifc

Neil Armstrong (3):
  spi: meson: Add GXBB compatible
  dt-bindings: spi-meson: Add GXBB Compatible string
  ARM64: dts: meson-gxbb: Add SPIFC node

 .../devicetree/bindings/spi/spi-meson.txt          |  2 +-
 arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi        | 19 +++++++++++
 drivers/clk/meson/gxbb.h                           |  2 +-
 drivers/pinctrl/meson/pinctrl-meson-gxbb.c         | 37 ++++++++++++++++++++++
 drivers/spi/spi-meson-spifc.c                      |  1 +
 include/dt-bindings/clock/gxbb-clkc.h              |  1 +
 6 files changed, 60 insertions(+), 2 deletions(-)

-- 
2.7.4

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#1478418 — [PATCH 1/7] pinctrl: amlogic: gxbb: add spifc pins

FromJerome Brunet <jbrunet@baylibre.com>
Date2016-09-07 17:30 +0200
Subject[PATCH 1/7] pinctrl: amlogic: gxbb: add spifc pins
Message-ID<seMXw-1t1-51@gated-at.bofh.it>
In reply to#1478403
Add EE domains pins for the SPI flash controller

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
---
 drivers/pinctrl/meson/pinctrl-meson-gxbb.c | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/drivers/pinctrl/meson/pinctrl-meson-gxbb.c b/drivers/pinctrl/meson/pinctrl-meson-gxbb.c
index cb4d6ad..802ad83 100644
--- a/drivers/pinctrl/meson/pinctrl-meson-gxbb.c
+++ b/drivers/pinctrl/meson/pinctrl-meson-gxbb.c
@@ -156,6 +156,11 @@ static const unsigned int emmc_clk_pins[] = { PIN(BOOT_8, EE_OFF) };
 static const unsigned int emmc_cmd_pins[] = { PIN(BOOT_10, EE_OFF) };
 static const unsigned int emmc_ds_pins[] = { PIN(BOOT_15, EE_OFF) };
 
+static const unsigned int spifc_d_pins[]	= { PIN(BOOT_11, EE_OFF) };
+static const unsigned int spifc_q_pins[]	= { PIN(BOOT_12, EE_OFF) };
+static const unsigned int spifc_c_pins[]	= { PIN(BOOT_13, EE_OFF) };
+static const unsigned int spifc_cs_pins[]	= { PIN(BOOT_15, EE_OFF) };
+
 static const unsigned int sdcard_d0_pins[] = { PIN(CARD_1, EE_OFF) };
 static const unsigned int sdcard_d1_pins[] = { PIN(CARD_0, EE_OFF) };
 static const unsigned int sdcard_d2_pins[] = { PIN(CARD_5, EE_OFF) };
@@ -393,6 +398,10 @@ static struct meson_pmx_group meson_gxbb_periphs_groups[] = {
 	GROUP(emmc_clk,		4,	18),
 	GROUP(emmc_cmd,		4,	19),
 	GROUP(emmc_ds,		4,	31),
+	GROUP(spifc_d,		5,	1),
+	GROUP(spifc_q,		5,	3),
+	GROUP(spifc_c,		5,	2),
+	GROUP(spifc_cs,		5,	0),
 
 	/* Bank CARD */
 	GROUP(sdcard_d1,	2,	14),
@@ -475,6 +484,10 @@ static const char * const emmc_groups[] = {
 	"emmc_nand_d07", "emmc_clk", "emmc_cmd", "emmc_ds",
 };
 
+static const char * const spifc_groups[] = {
+	"spifc_d", "spifc_q", "spifc_c", "spifc_cs",
+};
+
 static const char * const sdcard_groups[] = {
 	"sdcard_d0", "sdcard_d1", "sdcard_d2", "sdcard_d3",
 	"sdcard_cmd", "sdcard_clk",
@@ -524,6 +537,7 @@ static const char * const i2c_slave_ao_groups[] = {
 static struct meson_pmx_func meson_gxbb_periphs_functions[] = {
 	FUNCTION(gpio_periphs),
 	FUNCTION(emmc),
+	FUNCTION(spifc),
 	FUNCTION(sdcard),
 	FUNCTION(uart_a),
 	FUNCTION(uart_b),
-- 
2.7.4

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#1479416 — Re: [PATCH 1/7] pinctrl: amlogic: gxbb: add spifc pins

FromKevin Hilman <khilman@baylibre.com>
Date2016-09-08 20:10 +0200
SubjectRe: [PATCH 1/7] pinctrl: amlogic: gxbb: add spifc pins
Message-ID<sfbVU-HP-21@gated-at.bofh.it>
In reply to#1478418
Jerome Brunet <jbrunet@baylibre.com> writes:

> Add EE domains pins for the SPI flash controller
>
> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
> ---
>  drivers/pinctrl/meson/pinctrl-meson-gxbb.c | 14 ++++++++++++++
>  1 file changed, 14 insertions(+)
>
> diff --git a/drivers/pinctrl/meson/pinctrl-meson-gxbb.c b/drivers/pinctrl/meson/pinctrl-meson-gxbb.c
> index cb4d6ad..802ad83 100644
> --- a/drivers/pinctrl/meson/pinctrl-meson-gxbb.c
> +++ b/drivers/pinctrl/meson/pinctrl-meson-gxbb.c
> @@ -156,6 +156,11 @@ static const unsigned int emmc_clk_pins[] = { PIN(BOOT_8, EE_OFF) };
>  static const unsigned int emmc_cmd_pins[] = { PIN(BOOT_10, EE_OFF) };
>  static const unsigned int emmc_ds_pins[] = { PIN(BOOT_15, EE_OFF) };
>  
> +static const unsigned int spifc_d_pins[]	= { PIN(BOOT_11, EE_OFF) };
> +static const unsigned int spifc_q_pins[]	= { PIN(BOOT_12, EE_OFF) };
> +static const unsigned int spifc_c_pins[]	= { PIN(BOOT_13, EE_OFF) };
> +static const unsigned int spifc_cs_pins[]	= { PIN(BOOT_15, EE_OFF) };

In the datasheet, these are called nor_* instead of spifc_*.  I'm trying
to keep the names here aligned with the names in the datasheet.  Please
rename to nor_*.

Thanks,

Kevin

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