Groups | Search | Server Info | Keyboard shortcuts | Login | Register [http] [https] [nntp] [nntps]

Groups > linux.kernel > #1473983 > unrolled thread

[PATCH v3 00/22] Support qcom's HSIC USB and rewrite USB2 HS phy support

Back to article view | Back to linux.kernel

Contents

  [PATCH v3 00/22] Support qcom's HSIC USB and rewrite USB2 HS phy support Stephen Boyd <stephen.boyd@linaro.org> - 2016-09-01 02:50 +0200
    [PATCH v3 06/22] usb: chipidea: Add platform flag for wrapper phy management Stephen Boyd <stephen.boyd@linaro.org> - 2016-09-01 02:50 +0200
    [PATCH v3 12/22] usb: chipidea: msm: Rely on core to override AHBBURST Stephen Boyd <stephen.boyd@linaro.org> - 2016-09-01 02:50 +0200
    [PATCH v3 16/22] usb: chipidea: msm: Restore wrapper settings after reset Stephen Boyd <stephen.boyd@linaro.org> - 2016-09-01 02:50 +0200
    [PATCH v3 11/22] usb: chipidea: msm: Mark device as runtime pm active Stephen Boyd <stephen.boyd@linaro.org> - 2016-09-01 02:50 +0200
    [PATCH v3 04/22] usb: chipidea: Only read/write OTGSC from one place Stephen Boyd <stephen.boyd@linaro.org> - 2016-09-01 02:50 +0200
      Re: [PATCH v3 04/22] usb: chipidea: Only read/write OTGSC from one  place Peter Chen <hzpeterchen@gmail.com> - 2016-09-02 05:00 +0200
    [PATCH v3 17/22] usb: chipidea: msm: Make platform data driver local instead of global Stephen Boyd <stephen.boyd@linaro.org> - 2016-09-01 02:50 +0200
    [PATCH v3 03/22] usb: ulpi: Support device discovery via device properties Stephen Boyd <stephen.boyd@linaro.org> - 2016-09-01 02:50 +0200
      Re: [PATCH v3 03/22] usb: ulpi: Support device discovery via device  properties Heikki Krogerus <heikki.krogerus@linux.intel.com> - 2016-09-02 16:20 +0200
        Re: [PATCH v3 03/22] usb: ulpi: Support device discovery via device properties Stephen Boyd <stephen.boyd@linaro.org> - 2016-09-03 03:20 +0200
    [PATCH v3 20/22] usb: chipidea: msm: Be silent on probe defer errors Stephen Boyd <stephen.boyd@linaro.org> - 2016-09-01 02:50 +0200
    [PATCH v3 15/22] usb: chipidea: msm: Mux over secondary phy at the right time Stephen Boyd <stephen.boyd@linaro.org> - 2016-09-01 02:50 +0200
    [PATCH v3 13/22] usb: chipidea: msm: Use hw_write_id_reg() instead of writel Stephen Boyd <stephen.boyd@linaro.org> - 2016-09-01 02:50 +0200
    [PATCH v3 19/22] usb: chipidea: msm: Handle phy power states Stephen Boyd <stephen.boyd@linaro.org> - 2016-09-01 02:50 +0200
    [PATCH v3 22/22] phy: Add support for Qualcomm's USB HS phy Stephen Boyd <stephen.boyd@linaro.org> - 2016-09-01 02:50 +0200
    [PATCH v3 05/22] usb: chipidea: Handle extcon events properly Stephen Boyd <stephen.boyd@linaro.org> - 2016-09-01 02:50 +0200
    [PATCH v3 01/22] of: device: Support loading a module with OF based modalias Stephen Boyd <stephen.boyd@linaro.org> - 2016-09-01 02:50 +0200
    [PATCH v3 02/22] of: device: Export of_device_{get_modalias,uvent_modalias} to modules Stephen Boyd <stephen.boyd@linaro.org> - 2016-09-01 02:50 +0200
    [PATCH v3 14/22] usb: chipidea: msm: Add proper clk and reset support Stephen Boyd <stephen.boyd@linaro.org> - 2016-09-01 02:50 +0200
    [PATCH v3 09/22] usb: chipidea: Add support for ULPI PHY bus Stephen Boyd <stephen.boyd@linaro.org> - 2016-09-01 02:50 +0200
      Re: [PATCH v3 09/22] usb: chipidea: Add support for ULPI PHY bus Peter Chen <hzpeterchen@gmail.com> - 2016-09-02 05:00 +0200
    [PATCH v3 18/22] usb: chipidea: msm: Add reset controller for PHY POR bit Stephen Boyd <stephen.boyd@linaro.org> - 2016-09-01 02:50 +0200
      Re: [PATCH v3 18/22] usb: chipidea: msm: Add reset controller for  PHY POR bit Peter Chen <hzpeterchen@gmail.com> - 2016-09-02 05:50 +0200
    [PATCH v3 10/22] usb: chipidea: Consolidate extcon notifiers Stephen Boyd <stephen.boyd@linaro.org> - 2016-09-01 02:50 +0200
      Re: [PATCH v3 10/22] usb: chipidea: Consolidate extcon notifiers Peter Chen <hzpeterchen@gmail.com> - 2016-09-02 05:30 +0200
        Re: [PATCH v3 10/22] usb: chipidea: Consolidate extcon notifiers Stephen Boyd <stephen.boyd@linaro.org> - 2016-09-03 03:10 +0200
          Re: [PATCH v3 10/22] usb: chipidea: Consolidate extcon notifiers Peter Chen <hzpeterchen@gmail.com> - 2016-09-05 04:40 +0200
            Re: [PATCH v3 10/22] usb: chipidea: Consolidate extcon notifiers Stephen Boyd <stephen.boyd@linaro.org> - 2016-09-06 19:50 +0200
    [PATCH v3 21/22] phy: Add support for Qualcomm's USB HSIC phy Stephen Boyd <stephen.boyd@linaro.org> - 2016-09-01 02:50 +0200
      Re: [PATCH v3 21/22] phy: Add support for Qualcomm's USB HSIC phy Vivek Gautam <vivek.gautam@codeaurora.org> - 2016-09-01 08:20 +0200
        Re: [PATCH v3 21/22] phy: Add support for Qualcomm's USB HSIC phy vivek.gautam@codeaurora.org - 2016-09-02 13:30 +0200
    [PATCH v3 07/22] usb: chipidea: Notify events when switching host mode Stephen Boyd <stephen.boyd@linaro.org> - 2016-09-01 02:50 +0200

Page 2 of 2 — ← Prev page 1 [2]

#1474002 — [PATCH v3 09/22] usb: chipidea: Add support for ULPI PHY bus

Some phys for the chipidea controller are controlled via the ULPI
viewport. Add support for the ULPI bus so that these sorts of
phys can be probed and read/written automatically without having
to duplicate the viewport logic in each phy driver.

Cc: Peter Chen <peter.chen@nxp.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org>
---
 drivers/usb/chipidea/Kconfig  |   7 +++
 drivers/usb/chipidea/Makefile |   1 +
 drivers/usb/chipidea/ci.h     |  21 ++++++++
 drivers/usb/chipidea/core.c   |  31 +++++++++---
 drivers/usb/chipidea/ulpi.c   | 113 ++++++++++++++++++++++++++++++++++++++++++
 5 files changed, 167 insertions(+), 6 deletions(-)
 create mode 100644 drivers/usb/chipidea/ulpi.c

diff --git a/drivers/usb/chipidea/Kconfig b/drivers/usb/chipidea/Kconfig
index 5e5b9eb7ebf6..19c20eaa23f2 100644
--- a/drivers/usb/chipidea/Kconfig
+++ b/drivers/usb/chipidea/Kconfig
@@ -38,4 +38,11 @@ config USB_CHIPIDEA_HOST
 	  Say Y here to enable host controller functionality of the
 	  ChipIdea driver.
 
+config USB_CHIPIDEA_ULPI
+	bool "ChipIdea ULPI PHY support"
+	depends on USB_ULPI_BUS=y || USB_ULPI_BUS=USB_CHIPIDEA
+	help
+	  Say Y here if you have a ULPI PHY attached to your ChipIdea
+	  controller.
+
 endif
diff --git a/drivers/usb/chipidea/Makefile b/drivers/usb/chipidea/Makefile
index 518e445476c3..39fca5715ed3 100644
--- a/drivers/usb/chipidea/Makefile
+++ b/drivers/usb/chipidea/Makefile
@@ -4,6 +4,7 @@ ci_hdrc-y				:= core.o otg.o debug.o
 ci_hdrc-$(CONFIG_USB_CHIPIDEA_UDC)	+= udc.o
 ci_hdrc-$(CONFIG_USB_CHIPIDEA_HOST)	+= host.o
 ci_hdrc-$(CONFIG_USB_OTG_FSM)		+= otg_fsm.o
+ci_hdrc-$(CONFIG_USB_CHIPIDEA_ULPI)	+= ulpi.o
 
 # Glue/Bridge layers go here
 
diff --git a/drivers/usb/chipidea/ci.h b/drivers/usb/chipidea/ci.h
index 05bc4d631cb9..59e22389c10b 100644
--- a/drivers/usb/chipidea/ci.h
+++ b/drivers/usb/chipidea/ci.h
@@ -18,6 +18,8 @@
 #include <linux/usb.h>
 #include <linux/usb/gadget.h>
 #include <linux/usb/otg-fsm.h>
+#include <linux/usb/otg.h>
+#include <linux/ulpi/interface.h>
 
 /******************************************************************************
  * DEFINE
@@ -52,6 +54,7 @@ enum ci_hw_regs {
 	OP_ENDPTLISTADDR,
 	OP_TTCTRL,
 	OP_BURSTSIZE,
+	OP_ULPI_VIEWPORT,
 	OP_PORTSC,
 	OP_DEVLC,
 	OP_OTGSC,
@@ -187,6 +190,8 @@ struct hw_bank {
  * @test_mode: the selected test mode
  * @platdata: platform specific information supplied by parent device
  * @vbus_active: is VBUS active
+ * @ulpi: pointer to ULPI device, if any
+ * @ulpi_ops: ULPI read/write ops for this device
  * @phy: pointer to PHY, if any
  * @usb_phy: pointer to USB PHY, if any and if using the USB PHY framework
  * @hcd: pointer to usb_hcd for ehci host driver
@@ -236,6 +241,10 @@ struct ci_hdrc {
 
 	struct ci_hdrc_platform_data	*platdata;
 	int				vbus_active;
+#ifdef CONFIG_USB_CHIPIDEA_ULPI
+	struct ulpi			*ulpi;
+	struct ulpi_ops 		ulpi_ops;
+#endif
 	struct phy			*phy;
 	/* old usb_phy interface */
 	struct usb_phy			*usb_phy;
@@ -418,6 +427,16 @@ static inline bool ci_otg_is_fsm_mode(struct ci_hdrc *ci)
 #endif
 }
 
+#if IS_ENABLED(CONFIG_USB_CHIPIDEA_ULPI)
+int ci_ulpi_init(struct ci_hdrc *ci);
+void ci_ulpi_exit(struct ci_hdrc *ci);
+int ci_ulpi_resume(struct ci_hdrc *ci);
+#else
+static inline int ci_ulpi_init(struct ci_hdrc *ci) { return 0; }
+static inline void ci_ulpi_exit(struct ci_hdrc *ci) { }
+static inline int ci_ulpi_resume(struct ci_hdrc *ci) { return 0; }
+#endif
+
 u32 hw_read_intr_enable(struct ci_hdrc *ci);
 
 u32 hw_read_intr_status(struct ci_hdrc *ci);
@@ -428,6 +447,8 @@ int hw_port_test_set(struct ci_hdrc *ci, u8 mode);
 
 u8 hw_port_test_get(struct ci_hdrc *ci);
 
+void hw_phymode_configure(struct ci_hdrc *ci);
+
 void ci_platform_configure(struct ci_hdrc *ci);
 
 int dbg_create_files(struct ci_hdrc *ci);
diff --git a/drivers/usb/chipidea/core.c b/drivers/usb/chipidea/core.c
index 532085a096d9..f144e1bbcc82 100644
--- a/drivers/usb/chipidea/core.c
+++ b/drivers/usb/chipidea/core.c
@@ -86,6 +86,7 @@ static const u8 ci_regs_nolpm[] = {
 	[OP_ENDPTLISTADDR]	= 0x18U,
 	[OP_TTCTRL]		= 0x1CU,
 	[OP_BURSTSIZE]		= 0x20U,
+	[OP_ULPI_VIEWPORT]	= 0x30U,
 	[OP_PORTSC]		= 0x44U,
 	[OP_DEVLC]		= 0x84U,
 	[OP_OTGSC]		= 0x64U,
@@ -110,6 +111,7 @@ static const u8 ci_regs_lpm[] = {
 	[OP_ENDPTLISTADDR]	= 0x18U,
 	[OP_TTCTRL]		= 0x1CU,
 	[OP_BURSTSIZE]		= 0x20U,
+	[OP_ULPI_VIEWPORT]	= 0x30U,
 	[OP_PORTSC]		= 0x44U,
 	[OP_DEVLC]		= 0x84U,
 	[OP_OTGSC]		= 0xC4U,
@@ -285,7 +287,7 @@ static int hw_device_init(struct ci_hdrc *ci, void __iomem *base)
 	return 0;
 }
 
-static void hw_phymode_configure(struct ci_hdrc *ci)
+void hw_phymode_configure(struct ci_hdrc *ci)
 {
 	u32 portsc, lpm, sts = 0;
 
@@ -894,6 +896,7 @@ static int ci_hdrc_probe(struct platform_device *pdev)
 		CI_HDRC_IMX28_WRITE_FIX);
 	ci->supports_runtime_pm = !!(ci->platdata->flags &
 		CI_HDRC_SUPPORTS_RUNTIME_PM);
+	platform_set_drvdata(pdev, ci);
 
 	ret = hw_device_init(ci, base);
 	if (ret < 0) {
@@ -901,6 +904,10 @@ static int ci_hdrc_probe(struct platform_device *pdev)
 		return -ENODEV;
 	}
 
+	ret = ci_ulpi_init(ci);
+	if (ret)
+		return ret;
+
 	if (ci->platdata->phy) {
 		ci->phy = ci->platdata->phy;
 	} else if (ci->platdata->usb_phy) {
@@ -911,11 +918,15 @@ static int ci_hdrc_probe(struct platform_device *pdev)
 
 		/* if both generic PHY and USB PHY layers aren't enabled */
 		if (PTR_ERR(ci->phy) == -ENOSYS &&
-				PTR_ERR(ci->usb_phy) == -ENXIO)
-			return -ENXIO;
+				PTR_ERR(ci->usb_phy) == -ENXIO) {
+			ret = -ENXIO;
+			goto ulpi_exit;
+		}
 
-		if (IS_ERR(ci->phy) && IS_ERR(ci->usb_phy))
-			return -EPROBE_DEFER;
+		if (IS_ERR(ci->phy) && IS_ERR(ci->usb_phy)) {
+			ret = -EPROBE_DEFER;
+			goto ulpi_exit;
+		}
 
 		if (IS_ERR(ci->phy))
 			ci->phy = NULL;
@@ -1000,7 +1011,6 @@ static int ci_hdrc_probe(struct platform_device *pdev)
 		}
 	}
 
-	platform_set_drvdata(pdev, ci);
 	ret = devm_request_irq(dev, ci->irq, ci_irq, IRQF_SHARED,
 			ci->platdata->name, ci);
 	if (ret)
@@ -1032,6 +1042,8 @@ stop:
 	ci_role_destroy(ci);
 deinit_phy:
 	ci_usb_phy_exit(ci);
+ulpi_exit:
+	ci_ulpi_exit(ci);
 
 	return ret;
 }
@@ -1051,6 +1063,7 @@ static int ci_hdrc_remove(struct platform_device *pdev)
 	ci_role_destroy(ci);
 	ci_hdrc_enter_lpm(ci, true);
 	ci_usb_phy_exit(ci);
+	ci_ulpi_exit(ci);
 
 	return 0;
 }
@@ -1098,6 +1111,7 @@ static void ci_controller_suspend(struct ci_hdrc *ci)
 static int ci_controller_resume(struct device *dev)
 {
 	struct ci_hdrc *ci = dev_get_drvdata(dev);
+	int ret;
 
 	dev_dbg(dev, "at %s\n", __func__);
 
@@ -1107,6 +1121,11 @@ static int ci_controller_resume(struct device *dev)
 	}
 
 	ci_hdrc_enter_lpm(ci, false);
+
+	ret = ci_ulpi_resume(ci);
+	if (ret)
+		return ret;
+
 	if (ci->usb_phy) {
 		usb_phy_set_suspend(ci->usb_phy, 0);
 		usb_phy_set_wakeup(ci->usb_phy, false);
diff --git a/drivers/usb/chipidea/ulpi.c b/drivers/usb/chipidea/ulpi.c
new file mode 100644
index 000000000000..3962255ff687
--- /dev/null
+++ b/drivers/usb/chipidea/ulpi.c
@@ -0,0 +1,113 @@
+/*
+ * Copyright (c) 2016 Linaro Ltd.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/device.h>
+#include <linux/usb/chipidea.h>
+#include <linux/ulpi/interface.h>
+
+#include "ci.h"
+
+#define ULPI_WAKEUP		BIT(31)
+#define ULPI_RUN		BIT(30)
+#define ULPI_WRITE		BIT(29)
+#define ULPI_SYNC_STATE		BIT(27)
+#define ULPI_ADDR(n)		((n) << 16)
+#define ULPI_DATA(n)		(n)
+
+static int ci_ulpi_wait(struct ci_hdrc *ci, u32 mask)
+{
+	unsigned long usec = 10000;
+
+	while (usec--) {
+		if (!hw_read(ci, OP_ULPI_VIEWPORT, mask))
+			return 0;
+
+		udelay(1);
+	}
+
+	return -ETIMEDOUT;
+}
+
+static int ci_ulpi_read(struct ulpi_ops *ops, u8 addr)
+{
+	struct ci_hdrc *ci = dev_get_drvdata(ops->dev);
+	int ret;
+
+	hw_write(ci, OP_ULPI_VIEWPORT, 0xffffffff, ULPI_WRITE | ULPI_WAKEUP);
+	ret = ci_ulpi_wait(ci, ULPI_WAKEUP);
+	if (ret)
+		return ret;
+
+	hw_write(ci, OP_ULPI_VIEWPORT, 0xffffffff, ULPI_RUN | ULPI_ADDR(addr));
+	ret = ci_ulpi_wait(ci, ULPI_RUN);
+	if (ret)
+		return ret;
+
+	return hw_read(ci, OP_ULPI_VIEWPORT, GENMASK(15, 8)) >> 8;
+}
+
+static int ci_ulpi_write(struct ulpi_ops *ops, u8 addr, u8 val)
+{
+	struct ci_hdrc *ci = dev_get_drvdata(ops->dev);
+	int ret;
+
+	hw_write(ci, OP_ULPI_VIEWPORT, 0xffffffff, ULPI_WRITE | ULPI_WAKEUP);
+	ret = ci_ulpi_wait(ci, ULPI_WAKEUP);
+	if (ret)
+		return ret;
+
+	hw_write(ci, OP_ULPI_VIEWPORT, 0xffffffff,
+		 ULPI_RUN | ULPI_WRITE | ULPI_ADDR(addr) | val);
+	return ci_ulpi_wait(ci, ULPI_RUN);
+}
+
+int ci_ulpi_init(struct ci_hdrc *ci)
+{
+	if (ci->platdata->phy_mode != USBPHY_INTERFACE_MODE_ULPI)
+		return 0;
+
+	/*
+	 * Set PORTSC correctly so we can read/write ULPI registers for
+	 * identification purposes
+	 */
+	hw_phymode_configure(ci);
+
+	ci->ulpi_ops.read = ci_ulpi_read;
+	ci->ulpi_ops.write = ci_ulpi_write;
+	ci->ulpi = ulpi_register_interface(ci->dev, &ci->ulpi_ops);
+	if (IS_ERR(ci->ulpi))
+		dev_err(ci->dev, "failed to register ULPI interface");
+
+	return PTR_ERR_OR_ZERO(ci->ulpi);
+}
+
+void ci_ulpi_exit(struct ci_hdrc *ci)
+{
+	if (ci->ulpi) {
+		ulpi_unregister_interface(ci->ulpi);
+		ci->ulpi = NULL;
+	}
+}
+
+int ci_ulpi_resume(struct ci_hdrc *ci)
+{
+	int cnt = 100000;
+
+	while (cnt-- > 0) {
+		if (hw_read(ci, OP_ULPI_VIEWPORT, ULPI_SYNC_STATE))
+			return 0;
+		udelay(1);
+	}
+
+	return -ETIMEDOUT;
+}
-- 
2.9.0.rc2.8.ga28705d

[toc] | [prev] | [next] | [standalone]

#1474864 — Re: [PATCH v3 09/22] usb: chipidea: Add support for ULPI PHY bus

On Wed, Aug 31, 2016 at 05:40:23PM -0700, Stephen Boyd wrote:
> Some phys for the chipidea controller are controlled via the ULPI
> viewport. Add support for the ULPI bus so that these sorts of
> phys can be probed and read/written automatically without having
> to duplicate the viewport logic in each phy driver.
> 
> Cc: Peter Chen <peter.chen@nxp.com>
> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
> Cc: Heikki Krogerus <heikki.krogerus@linux.intel.com>
> Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org>
> ---
>  drivers/usb/chipidea/Kconfig  |   7 +++
>  drivers/usb/chipidea/Makefile |   1 +
>  drivers/usb/chipidea/ci.h     |  21 ++++++++
>  drivers/usb/chipidea/core.c   |  31 +++++++++---
>  drivers/usb/chipidea/ulpi.c   | 113 ++++++++++++++++++++++++++++++++++++++++++
>  5 files changed, 167 insertions(+), 6 deletions(-)
>  create mode 100644 drivers/usb/chipidea/ulpi.c
> 
> diff --git a/drivers/usb/chipidea/Kconfig b/drivers/usb/chipidea/Kconfig
> index 5e5b9eb7ebf6..19c20eaa23f2 100644
> --- a/drivers/usb/chipidea/Kconfig
> +++ b/drivers/usb/chipidea/Kconfig
> @@ -38,4 +38,11 @@ config USB_CHIPIDEA_HOST
>  	  Say Y here to enable host controller functionality of the
>  	  ChipIdea driver.
>  
> +config USB_CHIPIDEA_ULPI
> +	bool "ChipIdea ULPI PHY support"
> +	depends on USB_ULPI_BUS=y || USB_ULPI_BUS=USB_CHIPIDEA
> +	help
> +	  Say Y here if you have a ULPI PHY attached to your ChipIdea
> +	  controller.
> +
>  endif
> diff --git a/drivers/usb/chipidea/Makefile b/drivers/usb/chipidea/Makefile
> index 518e445476c3..39fca5715ed3 100644
> --- a/drivers/usb/chipidea/Makefile
> +++ b/drivers/usb/chipidea/Makefile
> @@ -4,6 +4,7 @@ ci_hdrc-y				:= core.o otg.o debug.o
>  ci_hdrc-$(CONFIG_USB_CHIPIDEA_UDC)	+= udc.o
>  ci_hdrc-$(CONFIG_USB_CHIPIDEA_HOST)	+= host.o
>  ci_hdrc-$(CONFIG_USB_OTG_FSM)		+= otg_fsm.o
> +ci_hdrc-$(CONFIG_USB_CHIPIDEA_ULPI)	+= ulpi.o
>  
>  # Glue/Bridge layers go here
>  
> diff --git a/drivers/usb/chipidea/ci.h b/drivers/usb/chipidea/ci.h
> index 05bc4d631cb9..59e22389c10b 100644
> --- a/drivers/usb/chipidea/ci.h
> +++ b/drivers/usb/chipidea/ci.h
> @@ -18,6 +18,8 @@
>  #include <linux/usb.h>
>  #include <linux/usb/gadget.h>
>  #include <linux/usb/otg-fsm.h>
> +#include <linux/usb/otg.h>
> +#include <linux/ulpi/interface.h>
>  
>  /******************************************************************************
>   * DEFINE
> @@ -52,6 +54,7 @@ enum ci_hw_regs {
>  	OP_ENDPTLISTADDR,
>  	OP_TTCTRL,
>  	OP_BURSTSIZE,
> +	OP_ULPI_VIEWPORT,
>  	OP_PORTSC,
>  	OP_DEVLC,
>  	OP_OTGSC,
> @@ -187,6 +190,8 @@ struct hw_bank {
>   * @test_mode: the selected test mode
>   * @platdata: platform specific information supplied by parent device
>   * @vbus_active: is VBUS active
> + * @ulpi: pointer to ULPI device, if any
> + * @ulpi_ops: ULPI read/write ops for this device
>   * @phy: pointer to PHY, if any
>   * @usb_phy: pointer to USB PHY, if any and if using the USB PHY framework
>   * @hcd: pointer to usb_hcd for ehci host driver
> @@ -236,6 +241,10 @@ struct ci_hdrc {
>  
>  	struct ci_hdrc_platform_data	*platdata;
>  	int				vbus_active;
> +#ifdef CONFIG_USB_CHIPIDEA_ULPI
> +	struct ulpi			*ulpi;
> +	struct ulpi_ops 		ulpi_ops;
> +#endif
>  	struct phy			*phy;
>  	/* old usb_phy interface */
>  	struct usb_phy			*usb_phy;
> @@ -418,6 +427,16 @@ static inline bool ci_otg_is_fsm_mode(struct ci_hdrc *ci)
>  #endif
>  }
>  
> +#if IS_ENABLED(CONFIG_USB_CHIPIDEA_ULPI)
> +int ci_ulpi_init(struct ci_hdrc *ci);
> +void ci_ulpi_exit(struct ci_hdrc *ci);
> +int ci_ulpi_resume(struct ci_hdrc *ci);
> +#else
> +static inline int ci_ulpi_init(struct ci_hdrc *ci) { return 0; }
> +static inline void ci_ulpi_exit(struct ci_hdrc *ci) { }
> +static inline int ci_ulpi_resume(struct ci_hdrc *ci) { return 0; }
> +#endif
> +
>  u32 hw_read_intr_enable(struct ci_hdrc *ci);
>  
>  u32 hw_read_intr_status(struct ci_hdrc *ci);
> @@ -428,6 +447,8 @@ int hw_port_test_set(struct ci_hdrc *ci, u8 mode);
>  
>  u8 hw_port_test_get(struct ci_hdrc *ci);
>  
> +void hw_phymode_configure(struct ci_hdrc *ci);
> +
>  void ci_platform_configure(struct ci_hdrc *ci);
>  
>  int dbg_create_files(struct ci_hdrc *ci);
> diff --git a/drivers/usb/chipidea/core.c b/drivers/usb/chipidea/core.c
> index 532085a096d9..f144e1bbcc82 100644
> --- a/drivers/usb/chipidea/core.c
> +++ b/drivers/usb/chipidea/core.c
> @@ -86,6 +86,7 @@ static const u8 ci_regs_nolpm[] = {
>  	[OP_ENDPTLISTADDR]	= 0x18U,
>  	[OP_TTCTRL]		= 0x1CU,
>  	[OP_BURSTSIZE]		= 0x20U,
> +	[OP_ULPI_VIEWPORT]	= 0x30U,
>  	[OP_PORTSC]		= 0x44U,
>  	[OP_DEVLC]		= 0x84U,
>  	[OP_OTGSC]		= 0x64U,
> @@ -110,6 +111,7 @@ static const u8 ci_regs_lpm[] = {
>  	[OP_ENDPTLISTADDR]	= 0x18U,
>  	[OP_TTCTRL]		= 0x1CU,
>  	[OP_BURSTSIZE]		= 0x20U,
> +	[OP_ULPI_VIEWPORT]	= 0x30U,
>  	[OP_PORTSC]		= 0x44U,
>  	[OP_DEVLC]		= 0x84U,
>  	[OP_OTGSC]		= 0xC4U,
> @@ -285,7 +287,7 @@ static int hw_device_init(struct ci_hdrc *ci, void __iomem *base)
>  	return 0;
>  }
>  
> -static void hw_phymode_configure(struct ci_hdrc *ci)
> +void hw_phymode_configure(struct ci_hdrc *ci)
>  {
>  	u32 portsc, lpm, sts = 0;
>  
> @@ -894,6 +896,7 @@ static int ci_hdrc_probe(struct platform_device *pdev)
>  		CI_HDRC_IMX28_WRITE_FIX);
>  	ci->supports_runtime_pm = !!(ci->platdata->flags &
>  		CI_HDRC_SUPPORTS_RUNTIME_PM);
> +	platform_set_drvdata(pdev, ci);
>  
>  	ret = hw_device_init(ci, base);
>  	if (ret < 0) {
> @@ -901,6 +904,10 @@ static int ci_hdrc_probe(struct platform_device *pdev)
>  		return -ENODEV;
>  	}
>  
> +	ret = ci_ulpi_init(ci);
> +	if (ret)
> +		return ret;
> +
>  	if (ci->platdata->phy) {
>  		ci->phy = ci->platdata->phy;
>  	} else if (ci->platdata->usb_phy) {
> @@ -911,11 +918,15 @@ static int ci_hdrc_probe(struct platform_device *pdev)
>  
>  		/* if both generic PHY and USB PHY layers aren't enabled */
>  		if (PTR_ERR(ci->phy) == -ENOSYS &&
> -				PTR_ERR(ci->usb_phy) == -ENXIO)
> -			return -ENXIO;
> +				PTR_ERR(ci->usb_phy) == -ENXIO) {
> +			ret = -ENXIO;
> +			goto ulpi_exit;
> +		}
>  
> -		if (IS_ERR(ci->phy) && IS_ERR(ci->usb_phy))
> -			return -EPROBE_DEFER;
> +		if (IS_ERR(ci->phy) && IS_ERR(ci->usb_phy)) {
> +			ret = -EPROBE_DEFER;
> +			goto ulpi_exit;
> +		}
>  
>  		if (IS_ERR(ci->phy))
>  			ci->phy = NULL;
> @@ -1000,7 +1011,6 @@ static int ci_hdrc_probe(struct platform_device *pdev)
>  		}
>  	}
>  
> -	platform_set_drvdata(pdev, ci);
>  	ret = devm_request_irq(dev, ci->irq, ci_irq, IRQF_SHARED,
>  			ci->platdata->name, ci);
>  	if (ret)
> @@ -1032,6 +1042,8 @@ stop:
>  	ci_role_destroy(ci);
>  deinit_phy:
>  	ci_usb_phy_exit(ci);
> +ulpi_exit:
> +	ci_ulpi_exit(ci);
>  
>  	return ret;
>  }
> @@ -1051,6 +1063,7 @@ static int ci_hdrc_remove(struct platform_device *pdev)
>  	ci_role_destroy(ci);
>  	ci_hdrc_enter_lpm(ci, true);
>  	ci_usb_phy_exit(ci);
> +	ci_ulpi_exit(ci);
>  
>  	return 0;
>  }
> @@ -1098,6 +1111,7 @@ static void ci_controller_suspend(struct ci_hdrc *ci)
>  static int ci_controller_resume(struct device *dev)
>  {
>  	struct ci_hdrc *ci = dev_get_drvdata(dev);
> +	int ret;
>  
>  	dev_dbg(dev, "at %s\n", __func__);
>  
> @@ -1107,6 +1121,11 @@ static int ci_controller_resume(struct device *dev)
>  	}
>  
>  	ci_hdrc_enter_lpm(ci, false);
> +
> +	ret = ci_ulpi_resume(ci);
> +	if (ret)
> +		return ret;
> +
>  	if (ci->usb_phy) {
>  		usb_phy_set_suspend(ci->usb_phy, 0);
>  		usb_phy_set_wakeup(ci->usb_phy, false);
> diff --git a/drivers/usb/chipidea/ulpi.c b/drivers/usb/chipidea/ulpi.c
> new file mode 100644
> index 000000000000..3962255ff687
> --- /dev/null
> +++ b/drivers/usb/chipidea/ulpi.c
> @@ -0,0 +1,113 @@
> +/*
> + * Copyright (c) 2016 Linaro Ltd.
> + *
> + * This software is licensed under the terms of the GNU General Public
> + * License version 2, as published by the Free Software Foundation, and
> + * may be copied, distributed, and modified under those terms.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + */
> +
> +#include <linux/device.h>
> +#include <linux/usb/chipidea.h>
> +#include <linux/ulpi/interface.h>
> +
> +#include "ci.h"
> +
> +#define ULPI_WAKEUP		BIT(31)
> +#define ULPI_RUN		BIT(30)
> +#define ULPI_WRITE		BIT(29)
> +#define ULPI_SYNC_STATE		BIT(27)
> +#define ULPI_ADDR(n)		((n) << 16)
> +#define ULPI_DATA(n)		(n)
> +
> +static int ci_ulpi_wait(struct ci_hdrc *ci, u32 mask)
> +{
> +	unsigned long usec = 10000;
> +
> +	while (usec--) {
> +		if (!hw_read(ci, OP_ULPI_VIEWPORT, mask))
> +			return 0;
> +
> +		udelay(1);
> +	}
> +
> +	return -ETIMEDOUT;
> +}
> +
> +static int ci_ulpi_read(struct ulpi_ops *ops, u8 addr)
> +{
> +	struct ci_hdrc *ci = dev_get_drvdata(ops->dev);
> +	int ret;
> +
> +	hw_write(ci, OP_ULPI_VIEWPORT, 0xffffffff, ULPI_WRITE | ULPI_WAKEUP);
> +	ret = ci_ulpi_wait(ci, ULPI_WAKEUP);
> +	if (ret)
> +		return ret;
> +
> +	hw_write(ci, OP_ULPI_VIEWPORT, 0xffffffff, ULPI_RUN | ULPI_ADDR(addr));
> +	ret = ci_ulpi_wait(ci, ULPI_RUN);
> +	if (ret)
> +		return ret;
> +
> +	return hw_read(ci, OP_ULPI_VIEWPORT, GENMASK(15, 8)) >> 8;
> +}
> +
> +static int ci_ulpi_write(struct ulpi_ops *ops, u8 addr, u8 val)
> +{
> +	struct ci_hdrc *ci = dev_get_drvdata(ops->dev);
> +	int ret;
> +
> +	hw_write(ci, OP_ULPI_VIEWPORT, 0xffffffff, ULPI_WRITE | ULPI_WAKEUP);
> +	ret = ci_ulpi_wait(ci, ULPI_WAKEUP);
> +	if (ret)
> +		return ret;
> +
> +	hw_write(ci, OP_ULPI_VIEWPORT, 0xffffffff,
> +		 ULPI_RUN | ULPI_WRITE | ULPI_ADDR(addr) | val);
> +	return ci_ulpi_wait(ci, ULPI_RUN);
> +}
> +
> +int ci_ulpi_init(struct ci_hdrc *ci)
> +{
> +	if (ci->platdata->phy_mode != USBPHY_INTERFACE_MODE_ULPI)
> +		return 0;
> +
> +	/*
> +	 * Set PORTSC correctly so we can read/write ULPI registers for
> +	 * identification purposes
> +	 */
> +	hw_phymode_configure(ci);
> +
> +	ci->ulpi_ops.read = ci_ulpi_read;
> +	ci->ulpi_ops.write = ci_ulpi_write;
> +	ci->ulpi = ulpi_register_interface(ci->dev, &ci->ulpi_ops);
> +	if (IS_ERR(ci->ulpi))
> +		dev_err(ci->dev, "failed to register ULPI interface");
> +
> +	return PTR_ERR_OR_ZERO(ci->ulpi);
> +}
> +
> +void ci_ulpi_exit(struct ci_hdrc *ci)
> +{
> +	if (ci->ulpi) {
> +		ulpi_unregister_interface(ci->ulpi);
> +		ci->ulpi = NULL;
> +	}
> +}
> +
> +int ci_ulpi_resume(struct ci_hdrc *ci)
> +{
> +	int cnt = 100000;
> +
> +	while (cnt-- > 0) {
> +		if (hw_read(ci, OP_ULPI_VIEWPORT, ULPI_SYNC_STATE))
> +			return 0;
> +		udelay(1);
> +	}
> +
> +	return -ETIMEDOUT;
> +}
> -- 

Acked-by: Peter Chen <peter.chen@nxp.com>

-- 

Best Regards,
Peter Chen

[toc] | [prev] | [next] | [standalone]

#1474003 — [PATCH v3 18/22] usb: chipidea: msm: Add reset controller for PHY POR bit

The MSM chipidea wrapper has two bits that are used to reset the
first or second phy. Add support for these bits via the reset
controller framework, so that phy drivers can reset their
hardware at the right time during initialization.

Cc: Peter Chen <peter.chen@nxp.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org>
---
 drivers/usb/chipidea/Kconfig       |  1 +
 drivers/usb/chipidea/ci_hdrc_msm.c | 50 ++++++++++++++++++++++++++++++++++++--
 2 files changed, 49 insertions(+), 2 deletions(-)

diff --git a/drivers/usb/chipidea/Kconfig b/drivers/usb/chipidea/Kconfig
index 19c20eaa23f2..fc96f5cdcb5c 100644
--- a/drivers/usb/chipidea/Kconfig
+++ b/drivers/usb/chipidea/Kconfig
@@ -2,6 +2,7 @@ config USB_CHIPIDEA
 	tristate "ChipIdea Highspeed Dual Role Controller"
 	depends on ((USB_EHCI_HCD && USB_GADGET) || (USB_EHCI_HCD && !USB_GADGET) || (!USB_EHCI_HCD && USB_GADGET)) && HAS_DMA
 	select EXTCON
+	select RESET_CONTROLLER
 	help
 	  Say Y here if your system has a dual role high speed USB
 	  controller based on ChipIdea silicon IP. It supports:
diff --git a/drivers/usb/chipidea/ci_hdrc_msm.c b/drivers/usb/chipidea/ci_hdrc_msm.c
index 2489a63d3e75..fe96df7b530c 100644
--- a/drivers/usb/chipidea/ci_hdrc_msm.c
+++ b/drivers/usb/chipidea/ci_hdrc_msm.c
@@ -14,6 +14,7 @@
 #include <linux/mfd/syscon.h>
 #include <linux/regmap.h>
 #include <linux/io.h>
+#include <linux/reset-controller.h>
 #include <linux/extcon.h>
 #include <linux/of.h>
 
@@ -31,8 +32,10 @@
 #define HSPHY_SESS_VLD_CTRL		BIT(25)
 
 /* Vendor base starts at 0x200 beyond CI base */
+#define HS_PHY_CTRL			0x0040
 #define HS_PHY_SEC_CTRL			0x0078
 #define HS_PHY_DIG_CLAMP_N		BIT(16)
+#define HS_PHY_POR_ASSERT		BIT(0)
 
 struct ci_hdrc_msm {
 	struct platform_device *ci;
@@ -40,11 +43,43 @@ struct ci_hdrc_msm {
 	struct clk *iface_clk;
 	struct clk *fs_clk;
 	struct ci_hdrc_platform_data pdata;
+	struct reset_controller_dev rcdev;
 	bool secondary_phy;
 	bool hsic;
 	void __iomem *base;
 };
 
+static int
+ci_hdrc_msm_por_reset(struct reset_controller_dev *r, unsigned long id)
+{
+	struct ci_hdrc_msm *ci_msm = container_of(r, struct ci_hdrc_msm, rcdev);
+	void __iomem *addr = ci_msm->base;
+	u32 val;
+
+	if (id)
+		addr += HS_PHY_SEC_CTRL;
+	else
+		addr += HS_PHY_CTRL;
+
+	val = readl_relaxed(addr);
+	val |= HS_PHY_POR_ASSERT;
+	writel(val, addr);
+	/*
+	 * wait for minimum 10 microseconds as suggested by manual.
+	 * Use a slightly larger value since the exact value didn't
+	 * work 100% of the time.
+	 */
+	udelay(12);
+	val &= ~HS_PHY_POR_ASSERT;
+	writel(val, addr);
+
+	return 0;
+}
+
+static const struct reset_control_ops ci_hdrc_msm_reset_ops = {
+	.reset = ci_hdrc_msm_por_reset,
+};
+
 static void ci_hdrc_msm_notify_event(struct ci_hdrc *ci, unsigned event)
 {
 	struct device *dev = ci->dev->parent;
@@ -186,10 +221,18 @@ static int ci_hdrc_msm_probe(struct platform_device *pdev)
 	if (!ci->base)
 		return -ENOMEM;
 
-	ret = clk_prepare_enable(ci->fs_clk);
+	ci->rcdev.owner = THIS_MODULE;
+	ci->rcdev.ops = &ci_hdrc_msm_reset_ops;
+	ci->rcdev.of_node = pdev->dev.of_node;
+	ci->rcdev.nr_resets = 2;
+	ret = reset_controller_register(&ci->rcdev);
 	if (ret)
 		return ret;
 
+	ret = clk_prepare_enable(ci->fs_clk);
+	if (ret)
+		goto err_fs;
+
 	reset_control_assert(reset);
 	usleep_range(10000, 12000);
 	reset_control_deassert(reset);
@@ -198,7 +241,7 @@ static int ci_hdrc_msm_probe(struct platform_device *pdev)
 
 	ret = clk_prepare_enable(ci->core_clk);
 	if (ret)
-		return ret;
+		goto err_fs;
 
 	ret = clk_prepare_enable(ci->iface_clk);
 	if (ret)
@@ -236,6 +279,8 @@ err_mux:
 	clk_disable_unprepare(ci->iface_clk);
 err_iface:
 	clk_disable_unprepare(ci->core_clk);
+err_fs:
+	reset_controller_unregister(&ci->rcdev);
 	return ret;
 }
 
@@ -247,6 +292,7 @@ static int ci_hdrc_msm_remove(struct platform_device *pdev)
 	ci_hdrc_remove_device(ci->ci);
 	clk_disable_unprepare(ci->iface_clk);
 	clk_disable_unprepare(ci->core_clk);
+	reset_controller_unregister(&ci->rcdev);
 
 	return 0;
 }
-- 
2.9.0.rc2.8.ga28705d

[toc] | [prev] | [next] | [standalone]

#1474876 — Re: [PATCH v3 18/22] usb: chipidea: msm: Add reset controller for PHY POR bit

On Wed, Aug 31, 2016 at 05:40:32PM -0700, Stephen Boyd wrote:
> The MSM chipidea wrapper has two bits that are used to reset the
> first or second phy. Add support for these bits via the reset
> controller framework, so that phy drivers can reset their
> hardware at the right time during initialization.
> 
> Cc: Peter Chen <peter.chen@nxp.com>
> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
> Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org>
> ---
>  drivers/usb/chipidea/Kconfig       |  1 +
>  drivers/usb/chipidea/ci_hdrc_msm.c | 50 ++++++++++++++++++++++++++++++++++++--
>  2 files changed, 49 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/usb/chipidea/Kconfig b/drivers/usb/chipidea/Kconfig
> index 19c20eaa23f2..fc96f5cdcb5c 100644
> --- a/drivers/usb/chipidea/Kconfig
> +++ b/drivers/usb/chipidea/Kconfig
> @@ -2,6 +2,7 @@ config USB_CHIPIDEA
>  	tristate "ChipIdea Highspeed Dual Role Controller"
>  	depends on ((USB_EHCI_HCD && USB_GADGET) || (USB_EHCI_HCD && !USB_GADGET) || (!USB_EHCI_HCD && USB_GADGET)) && HAS_DMA
>  	select EXTCON
> +	select RESET_CONTROLLER
>  	help
>  	  Say Y here if your system has a dual role high speed USB
>  	  controller based on ChipIdea silicon IP. It supports:
> diff --git a/drivers/usb/chipidea/ci_hdrc_msm.c b/drivers/usb/chipidea/ci_hdrc_msm.c
> index 2489a63d3e75..fe96df7b530c 100644
> --- a/drivers/usb/chipidea/ci_hdrc_msm.c
> +++ b/drivers/usb/chipidea/ci_hdrc_msm.c
> @@ -14,6 +14,7 @@
>  #include <linux/mfd/syscon.h>
>  #include <linux/regmap.h>
>  #include <linux/io.h>
> +#include <linux/reset-controller.h>
>  #include <linux/extcon.h>
>  #include <linux/of.h>
>  
> @@ -31,8 +32,10 @@
>  #define HSPHY_SESS_VLD_CTRL		BIT(25)
>  
>  /* Vendor base starts at 0x200 beyond CI base */
> +#define HS_PHY_CTRL			0x0040
>  #define HS_PHY_SEC_CTRL			0x0078
>  #define HS_PHY_DIG_CLAMP_N		BIT(16)
> +#define HS_PHY_POR_ASSERT		BIT(0)
>  
>  struct ci_hdrc_msm {
>  	struct platform_device *ci;
> @@ -40,11 +43,43 @@ struct ci_hdrc_msm {
>  	struct clk *iface_clk;
>  	struct clk *fs_clk;
>  	struct ci_hdrc_platform_data pdata;
> +	struct reset_controller_dev rcdev;
>  	bool secondary_phy;
>  	bool hsic;
>  	void __iomem *base;
>  };
>  
> +static int
> +ci_hdrc_msm_por_reset(struct reset_controller_dev *r, unsigned long id)
> +{
> +	struct ci_hdrc_msm *ci_msm = container_of(r, struct ci_hdrc_msm, rcdev);
> +	void __iomem *addr = ci_msm->base;
> +	u32 val;
> +
> +	if (id)
> +		addr += HS_PHY_SEC_CTRL;
> +	else
> +		addr += HS_PHY_CTRL;
> +
> +	val = readl_relaxed(addr);
> +	val |= HS_PHY_POR_ASSERT;
> +	writel(val, addr);
> +	/*
> +	 * wait for minimum 10 microseconds as suggested by manual.
> +	 * Use a slightly larger value since the exact value didn't
> +	 * work 100% of the time.
> +	 */
> +	udelay(12);
> +	val &= ~HS_PHY_POR_ASSERT;
> +	writel(val, addr);
> +
> +	return 0;
> +}
> +
> +static const struct reset_control_ops ci_hdrc_msm_reset_ops = {
> +	.reset = ci_hdrc_msm_por_reset,
> +};
> +
>  static void ci_hdrc_msm_notify_event(struct ci_hdrc *ci, unsigned event)
>  {
>  	struct device *dev = ci->dev->parent;
> @@ -186,10 +221,18 @@ static int ci_hdrc_msm_probe(struct platform_device *pdev)
>  	if (!ci->base)
>  		return -ENOMEM;
>  
> -	ret = clk_prepare_enable(ci->fs_clk);
> +	ci->rcdev.owner = THIS_MODULE;
> +	ci->rcdev.ops = &ci_hdrc_msm_reset_ops;
> +	ci->rcdev.of_node = pdev->dev.of_node;
> +	ci->rcdev.nr_resets = 2;
> +	ret = reset_controller_register(&ci->rcdev);
>  	if (ret)
>  		return ret;
>  
> +	ret = clk_prepare_enable(ci->fs_clk);
> +	if (ret)
> +		goto err_fs;
> +
>  	reset_control_assert(reset);
>  	usleep_range(10000, 12000);
>  	reset_control_deassert(reset);
> @@ -198,7 +241,7 @@ static int ci_hdrc_msm_probe(struct platform_device *pdev)
>  
>  	ret = clk_prepare_enable(ci->core_clk);
>  	if (ret)
> -		return ret;
> +		goto err_fs;
>  
>  	ret = clk_prepare_enable(ci->iface_clk);
>  	if (ret)
> @@ -236,6 +279,8 @@ err_mux:
>  	clk_disable_unprepare(ci->iface_clk);
>  err_iface:
>  	clk_disable_unprepare(ci->core_clk);
> +err_fs:
> +	reset_controller_unregister(&ci->rcdev);
>  	return ret;
>  }
>  
> @@ -247,6 +292,7 @@ static int ci_hdrc_msm_remove(struct platform_device *pdev)
>  	ci_hdrc_remove_device(ci->ci);
>  	clk_disable_unprepare(ci->iface_clk);
>  	clk_disable_unprepare(ci->core_clk);
> +	reset_controller_unregister(&ci->rcdev);
>  
>  	return 0;
>  }

Acked-by: Peter Chen <peter.chen@nxp.com>

-- 

Best Regards,
Peter Chen

[toc] | [prev] | [next] | [standalone]

#1474004 — [PATCH v3 10/22] usb: chipidea: Consolidate extcon notifiers

The two extcon notifiers are almost the same except for the
variable name for the cable structure and the id notifier inverts
the cable->state logic. Make it the same and replace two
functions with one to save some lines. This also makes it so that
the id cable state is true when the id pin is pulled low.

Cc: Peter Chen <peter.chen@nxp.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: "Ivan T. Ivanov" <iivanov.xz@gmail.com>
Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org>
---
 drivers/usb/chipidea/core.c | 41 ++++++++++-------------------------------
 drivers/usb/chipidea/otg.c  |  4 ++--
 2 files changed, 12 insertions(+), 33 deletions(-)

diff --git a/drivers/usb/chipidea/core.c b/drivers/usb/chipidea/core.c
index f144e1bbcc82..f3b8d7488648 100644
--- a/drivers/usb/chipidea/core.c
+++ b/drivers/usb/chipidea/core.c
@@ -577,35 +577,14 @@ static irqreturn_t ci_irq(int irq, void *data)
 	return ret;
 }
 
-static int ci_vbus_notifier(struct notifier_block *nb, unsigned long event,
-			    void *ptr)
+static int ci_cable_notifier(struct notifier_block *nb, unsigned long event,
+			     void *ptr)
 {
-	struct ci_hdrc_cable *vbus = container_of(nb, struct ci_hdrc_cable, nb);
-	struct ci_hdrc *ci = vbus->ci;
+	struct ci_hdrc_cable *cbl = container_of(nb, struct ci_hdrc_cable, nb);
+	struct ci_hdrc *ci = cbl->ci;
 
-	if (event)
-		vbus->state = true;
-	else
-		vbus->state = false;
-
-	vbus->changed = true;
-
-	ci_irq(ci->irq, ci);
-	return NOTIFY_DONE;
-}
-
-static int ci_id_notifier(struct notifier_block *nb, unsigned long event,
-			  void *ptr)
-{
-	struct ci_hdrc_cable *id = container_of(nb, struct ci_hdrc_cable, nb);
-	struct ci_hdrc *ci = id->ci;
-
-	if (event)
-		id->state = false;
-	else
-		id->state = true;
-
-	id->changed = true;
+	cbl->state = event;
+	cbl->changed = true;
 
 	ci_irq(ci->irq, ci);
 	return NOTIFY_DONE;
@@ -714,7 +693,7 @@ static int ci_get_platdata(struct device *dev,
 	}
 
 	cable = &platdata->vbus_extcon;
-	cable->nb.notifier_call = ci_vbus_notifier;
+	cable->nb.notifier_call = ci_cable_notifier;
 	cable->edev = ext_vbus;
 
 	if (!IS_ERR(ext_vbus)) {
@@ -726,15 +705,15 @@ static int ci_get_platdata(struct device *dev,
 	}
 
 	cable = &platdata->id_extcon;
-	cable->nb.notifier_call = ci_id_notifier;
+	cable->nb.notifier_call = ci_cable_notifier;
 	cable->edev = ext_id;
 
 	if (!IS_ERR(ext_id)) {
 		ret = extcon_get_cable_state_(cable->edev, EXTCON_USB_HOST);
 		if (ret)
-			cable->state = false;
-		else
 			cable->state = true;
+		else
+			cable->state = false;
 	}
 	return 0;
 }
diff --git a/drivers/usb/chipidea/otg.c b/drivers/usb/chipidea/otg.c
index 0cf149edddd8..fb58d6b312c2 100644
--- a/drivers/usb/chipidea/otg.c
+++ b/drivers/usb/chipidea/otg.c
@@ -63,9 +63,9 @@ u32 hw_read_otgsc(struct ci_hdrc *ci, u32 mask)
 			val &= ~OTGSC_IDIS;
 
 		if (cable->state)
-			val |= OTGSC_ID;
+			val &= ~OTGSC_ID; /* A device */
 		else
-			val &= ~OTGSC_ID;
+			val |= OTGSC_ID; /* B device */
 
 		if (cable->enabled)
 			val |= OTGSC_IDIE;
-- 
2.9.0.rc2.8.ga28705d

[toc] | [prev] | [next] | [standalone]

#1474872 — Re: [PATCH v3 10/22] usb: chipidea: Consolidate extcon notifiers

On Wed, Aug 31, 2016 at 05:40:24PM -0700, Stephen Boyd wrote:
> The two extcon notifiers are almost the same except for the
> variable name for the cable structure and the id notifier inverts
> the cable->state logic. Make it the same and replace two
> functions with one to save some lines. This also makes it so that
> the id cable state is true when the id pin is pulled low.
> 
> Cc: Peter Chen <peter.chen@nxp.com>
> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
> Cc: "Ivan T. Ivanov" <iivanov.xz@gmail.com>
> Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org>
> ---
>  drivers/usb/chipidea/core.c | 41 ++++++++++-------------------------------
>  drivers/usb/chipidea/otg.c  |  4 ++--
>  2 files changed, 12 insertions(+), 33 deletions(-)
> 
> diff --git a/drivers/usb/chipidea/core.c b/drivers/usb/chipidea/core.c
> index f144e1bbcc82..f3b8d7488648 100644
> --- a/drivers/usb/chipidea/core.c
> +++ b/drivers/usb/chipidea/core.c
> @@ -577,35 +577,14 @@ static irqreturn_t ci_irq(int irq, void *data)
>  	return ret;
>  }
>  
> -static int ci_vbus_notifier(struct notifier_block *nb, unsigned long event,
> -			    void *ptr)
> +static int ci_cable_notifier(struct notifier_block *nb, unsigned long event,
> +			     void *ptr)
>  {
> -	struct ci_hdrc_cable *vbus = container_of(nb, struct ci_hdrc_cable, nb);
> -	struct ci_hdrc *ci = vbus->ci;
> +	struct ci_hdrc_cable *cbl = container_of(nb, struct ci_hdrc_cable, nb);
> +	struct ci_hdrc *ci = cbl->ci;
>  
> -	if (event)
> -		vbus->state = true;
> -	else
> -		vbus->state = false;
> -
> -	vbus->changed = true;
> -
> -	ci_irq(ci->irq, ci);
> -	return NOTIFY_DONE;
> -}
> -
> -static int ci_id_notifier(struct notifier_block *nb, unsigned long event,
> -			  void *ptr)
> -{
> -	struct ci_hdrc_cable *id = container_of(nb, struct ci_hdrc_cable, nb);
> -	struct ci_hdrc *ci = id->ci;
> -
> -	if (event)
> -		id->state = false;
> -	else
> -		id->state = true;
> -
> -	id->changed = true;
> +	cbl->state = event;
> +	cbl->changed = true;
>  
>  	ci_irq(ci->irq, ci);
>  	return NOTIFY_DONE;
> @@ -714,7 +693,7 @@ static int ci_get_platdata(struct device *dev,
>  	}
>  
>  	cable = &platdata->vbus_extcon;
> -	cable->nb.notifier_call = ci_vbus_notifier;
> +	cable->nb.notifier_call = ci_cable_notifier;
>  	cable->edev = ext_vbus;
>  
>  	if (!IS_ERR(ext_vbus)) {
> @@ -726,15 +705,15 @@ static int ci_get_platdata(struct device *dev,
>  	}
>  
>  	cable = &platdata->id_extcon;
> -	cable->nb.notifier_call = ci_id_notifier;
> +	cable->nb.notifier_call = ci_cable_notifier;
>  	cable->edev = ext_id;
>  
>  	if (!IS_ERR(ext_id)) {
>  		ret = extcon_get_cable_state_(cable->edev, EXTCON_USB_HOST);
>  		if (ret)
> -			cable->state = false;
> -		else
>  			cable->state = true;
> +		else
> +			cable->state = false;
>  	}
>  	return 0;
>  }
> diff --git a/drivers/usb/chipidea/otg.c b/drivers/usb/chipidea/otg.c
> index 0cf149edddd8..fb58d6b312c2 100644
> --- a/drivers/usb/chipidea/otg.c
> +++ b/drivers/usb/chipidea/otg.c
> @@ -63,9 +63,9 @@ u32 hw_read_otgsc(struct ci_hdrc *ci, u32 mask)
>  			val &= ~OTGSC_IDIS;
>  
>  		if (cable->state)
> -			val |= OTGSC_ID;
> +			val &= ~OTGSC_ID; /* A device */
>  		else
> -			val &= ~OTGSC_ID;
> +			val |= OTGSC_ID; /* B device */
>  
>  		if (cable->enabled)
>  			val |= OTGSC_IDIE;

/**
 * struct ci_hdrc_cable - structure for external connector cable state tracking
 * @state: current state of the line

You may change the name of variable "state" to "connected", per I
understand, it has changed to the meaning of connected status for your patch.

-- 

Best Regards,
Peter Chen

[toc] | [prev] | [next] | [standalone]

#1475525 — Re: [PATCH v3 10/22] usb: chipidea: Consolidate extcon notifiers

On Thu, Sep 1, 2016 at 8:17 PM, Peter Chen <hzpeterchen@gmail.com> wrote:
> On Wed, Aug 31, 2016 at 05:40:24PM -0700, Stephen Boyd wrote:
>>
>>
>>               if (cable->state)
>> -                     val |= OTGSC_ID;
>> +                     val &= ~OTGSC_ID; /* A device */
>>               else
>> -                     val &= ~OTGSC_ID;
>> +                     val |= OTGSC_ID; /* B device */
>>
>>               if (cable->enabled)
>>                       val |= OTGSC_IDIE;
>
> /**
>  * struct ci_hdrc_cable - structure for external connector cable state tracking
>  * @state: current state of the line
>
> You may change the name of variable "state" to "connected", per I
> understand, it has changed to the meaning of connected status for your patch.
>

Ok sure.

[toc] | [prev] | [next] | [standalone]

#1476093 — Re: [PATCH v3 10/22] usb: chipidea: Consolidate extcon notifiers

On Fri, Sep 02, 2016 at 06:03:06PM -0700, Stephen Boyd wrote:
> On Thu, Sep 1, 2016 at 8:17 PM, Peter Chen <hzpeterchen@gmail.com> wrote:
> > On Wed, Aug 31, 2016 at 05:40:24PM -0700, Stephen Boyd wrote:
> >>
> >>
> >>               if (cable->state)
> >> -                     val |= OTGSC_ID;
> >> +                     val &= ~OTGSC_ID; /* A device */
> >>               else
> >> -                     val &= ~OTGSC_ID;
> >> +                     val |= OTGSC_ID; /* B device */

One more comment, would you change the comment to "host" and "device"?
Unless we are supporting OTG-compliance device, otherwise, we should
not mention "A" or "B" for USB device.

Peter
> >>
> >>               if (cable->enabled)
> >>                       val |= OTGSC_IDIE;
> >
> > /**
> >  * struct ci_hdrc_cable - structure for external connector cable state tracking
> >  * @state: current state of the line
> >
> > You may change the name of variable "state" to "connected", per I
> > understand, it has changed to the meaning of connected status for your patch.
> >
> 
> Ok sure.

-- 

Best Regards,
Peter Chen

[toc] | [prev] | [next] | [standalone]

#1477703 — Re: [PATCH v3 10/22] usb: chipidea: Consolidate extcon notifiers

On Sun, Sep 4, 2016 at 7:39 PM, Peter Chen <hzpeterchen@gmail.com> wrote:
> On Fri, Sep 02, 2016 at 06:03:06PM -0700, Stephen Boyd wrote:
>> On Thu, Sep 1, 2016 at 8:17 PM, Peter Chen <hzpeterchen@gmail.com> wrote:
>> > On Wed, Aug 31, 2016 at 05:40:24PM -0700, Stephen Boyd wrote:
>> >>
>> >>
>> >>               if (cable->state)
>> >> -                     val |= OTGSC_ID;
>> >> +                     val &= ~OTGSC_ID; /* A device */
>> >>               else
>> >> -                     val &= ~OTGSC_ID;
>> >> +                     val |= OTGSC_ID; /* B device */
>
> One more comment, would you change the comment to "host" and "device"?
> Unless we are supporting OTG-compliance device, otherwise, we should
> not mention "A" or "B" for USB device.
>

Done

[toc] | [prev] | [next] | [standalone]

#1474005 — [PATCH v3 21/22] phy: Add support for Qualcomm's USB HSIC phy

The HSIC USB controller on qcom SoCs has an integrated all
digital phy controlled via the ULPI viewport.

Cc: Kishon Vijay Abraham I <kishon@ti.com>
Cc: <devicetree@vger.kernel.org>
Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org>
---
 .../devicetree/bindings/phy/qcom,usb-hsic-phy.txt  |  65 +++++++++
 drivers/phy/Kconfig                                |   7 +
 drivers/phy/Makefile                               |   1 +
 drivers/phy/phy-qcom-usb-hsic.c                    | 160 +++++++++++++++++++++
 4 files changed, 233 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/phy/qcom,usb-hsic-phy.txt
 create mode 100644 drivers/phy/phy-qcom-usb-hsic.c

diff --git a/Documentation/devicetree/bindings/phy/qcom,usb-hsic-phy.txt b/Documentation/devicetree/bindings/phy/qcom,usb-hsic-phy.txt
new file mode 100644
index 000000000000..3c7cb2be4b12
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/qcom,usb-hsic-phy.txt
@@ -0,0 +1,65 @@
+Qualcomm's USB HSIC PHY
+
+PROPERTIES
+
+- compatible:
+    Usage: required
+    Value type: <string>
+    Definition: Should contain "qcom,usb-hsic-phy" and more specifically one of the
+		following:
+
+			"qcom,usb-hsic-phy-mdm9615"
+			"qcom,usb-hsic-phy-msm8974"
+
+- #phy-cells:
+    Usage: required
+    Value type: <u32>
+    Definition: Should contain 0
+
+- clocks:
+    Usage: required
+    Value type: <prop-encoded-array>
+    Definition: Should contain clock specifier for phy, calibration and
+                a calibration sleep clock
+
+- clock-names:
+    Usage: required
+    Value type: <stringlist>
+    Definition: Should contain "phy, "cal" and "cal_sleep"
+
+- pinctrl-names:
+    Usage: required
+    Value type: <stringlist>
+    Definition: Should contain "init" and "default" in that order
+
+- pinctrl-0:
+    Usage: required
+    Value type: <prop-encoded-array>
+    Definition: List of pinctrl settings to apply to keep HSIC pins in a glitch
+                free state
+
+- pinctrl-1:
+    Usage: required
+    Value type: <prop-encoded-array>
+    Definition: List of pinctrl settings to apply to mux out the HSIC pins
+
+EXAMPLE
+
+usb-controller {
+	ulpi {
+		phy {
+			compatible = "qcom,usb-hsic-phy-msm8974",
+				     "qcom,usb-hsic-phy";
+			#phy-cells = <0>;
+			pinctrl-names = "init", "default";
+			pinctrl-0 = <&hsic_sleep>;
+			pinctrl-1 = <&hsic_default>;
+			clocks = <&gcc GCC_USB_HSIC_CLK>,
+				 <&gcc GCC_USB_HSIC_IO_CAL_CLK>,
+				 <&gcc GCC_USB_HSIC_IO_CAL_SLEEP_CLK>;
+			clock-names = "phy", "cal", "cal_sleep";
+			assigned-clocks = <&gcc GCC_USB_HSIC_IO_CAL_CLK>;
+			assigned-clock-rates = <960000>;
+		};
+	};
+};
diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index 19bff3a10f69..830c443eeabf 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -417,6 +417,13 @@ config PHY_QCOM_UFS
 	help
 	  Support for UFS PHY on QCOM chipsets.
 
+config PHY_QCOM_USB_HSIC
+	tristate "Qualcomm USB HSIC ULPI PHY module"
+	depends on USB_ULPI_BUS
+	select GENERIC_PHY
+	help
+	  Support for the USB HSIC ULPI compliant PHY on QCOM chipsets.
+
 config PHY_TUSB1210
 	tristate "TI TUSB1210 ULPI PHY module"
 	depends on USB_ULPI_BUS
diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
index 90ae19879b0a..5422f543d17d 100644
--- a/drivers/phy/Makefile
+++ b/drivers/phy/Makefile
@@ -50,6 +50,7 @@ obj-$(CONFIG_PHY_STIH41X_USB)		+= phy-stih41x-usb.o
 obj-$(CONFIG_PHY_QCOM_UFS) 	+= phy-qcom-ufs.o
 obj-$(CONFIG_PHY_QCOM_UFS) 	+= phy-qcom-ufs-qmp-20nm.o
 obj-$(CONFIG_PHY_QCOM_UFS) 	+= phy-qcom-ufs-qmp-14nm.o
+obj-$(CONFIG_PHY_QCOM_USB_HSIC) 	+= phy-qcom-usb-hsic.o
 obj-$(CONFIG_PHY_TUSB1210)		+= phy-tusb1210.o
 obj-$(CONFIG_PHY_BRCM_SATA)		+= phy-brcm-sata.o
 obj-$(CONFIG_PHY_PISTACHIO_USB)		+= phy-pistachio-usb.o
diff --git a/drivers/phy/phy-qcom-usb-hsic.c b/drivers/phy/phy-qcom-usb-hsic.c
new file mode 100644
index 000000000000..47690f9945b9
--- /dev/null
+++ b/drivers/phy/phy-qcom-usb-hsic.c
@@ -0,0 +1,160 @@
+/**
+ * Copyright (C) 2016 Linaro Ltd
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/module.h>
+#include <linux/ulpi/driver.h>
+#include <linux/ulpi/regs.h>
+#include <linux/pinctrl/consumer.h>
+#include <linux/pinctrl/pinctrl-state.h>
+#include <linux/delay.h>
+#include <linux/clk.h>
+
+#include "ulpi_phy.h"
+
+#define ULPI_HSIC_CFG		0x30
+#define ULPI_HSIC_IO_CAL	0x33
+
+struct qcom_usb_hsic_phy {
+	struct ulpi *ulpi;
+	struct phy *phy;
+	struct pinctrl *pctl;
+	struct clk *phy_clk;
+	struct clk *cal_clk;
+	struct clk *cal_sleep_clk;
+};
+
+static int qcom_usb_hsic_phy_power_on(struct phy *phy)
+{
+	struct qcom_usb_hsic_phy *uphy = phy_get_drvdata(phy);
+	struct ulpi *ulpi = uphy->ulpi;
+	struct pinctrl_state *pins_default;
+	int ret;
+
+	ret = clk_prepare_enable(uphy->phy_clk);
+	if (ret)
+		return ret;
+
+	ret = clk_prepare_enable(uphy->cal_clk);
+	if (ret)
+		goto err_cal;
+
+	ret = clk_prepare_enable(uphy->cal_sleep_clk);
+	if (ret)
+		goto err_sleep;
+
+	/* Set periodic calibration interval to ~2.048sec in HSIC_IO_CAL_REG */
+	ret = ulpi_write(ulpi, ULPI_HSIC_IO_CAL, 0xff);
+	if (ret)
+		goto err_ulpi;
+
+	/* Enable periodic IO calibration in HSIC_CFG register */
+	ret = ulpi_write(ulpi, ULPI_HSIC_CFG, 0xa8);
+	if (ret)
+		goto err_ulpi;
+
+	/* Configure pins for HSIC functionality */
+	pins_default = pinctrl_lookup_state(uphy->pctl, PINCTRL_STATE_DEFAULT);
+	if (IS_ERR(pins_default))
+		return PTR_ERR(pins_default);
+
+	ret = pinctrl_select_state(uphy->pctl, pins_default);
+	if (ret)
+		goto err_ulpi;
+
+	 /* Enable HSIC mode in HSIC_CFG register */
+	ret = ulpi_write(ulpi, ULPI_SET(ULPI_HSIC_CFG), 0x01);
+	if (ret)
+		goto err_ulpi;
+
+	/* Disable auto-resume */
+	ret = ulpi_write(ulpi, ULPI_CLR(ULPI_IFC_CTRL),
+			 ULPI_IFC_CTRL_AUTORESUME);
+	if (ret)
+		goto err_ulpi;
+
+	return ret;
+err_ulpi:
+	clk_disable_unprepare(uphy->cal_sleep_clk);
+err_sleep:
+	clk_disable_unprepare(uphy->cal_clk);
+err_cal:
+	clk_disable_unprepare(uphy->phy_clk);
+	return ret;
+}
+
+static int qcom_usb_hsic_phy_power_off(struct phy *phy)
+{
+	struct qcom_usb_hsic_phy *uphy = phy_get_drvdata(phy);
+
+	clk_disable_unprepare(uphy->cal_sleep_clk);
+	clk_disable_unprepare(uphy->cal_clk);
+	clk_disable_unprepare(uphy->phy_clk);
+
+	return 0;
+}
+
+static const struct phy_ops qcom_usb_hsic_phy_ops = {
+	.power_on = qcom_usb_hsic_phy_power_on,
+	.power_off = qcom_usb_hsic_phy_power_off,
+	.owner = THIS_MODULE,
+};
+
+static int qcom_usb_hsic_phy_probe(struct ulpi *ulpi)
+{
+	struct qcom_usb_hsic_phy *uphy;
+	struct phy_provider *p;
+	struct clk *clk;
+
+	uphy = devm_kzalloc(&ulpi->dev, sizeof(*uphy), GFP_KERNEL);
+	if (!uphy)
+		return -ENOMEM;
+	ulpi_set_drvdata(ulpi, uphy);
+
+	uphy->ulpi = ulpi;
+	uphy->pctl = devm_pinctrl_get(&ulpi->dev);
+	if (IS_ERR(uphy->pctl))
+		return PTR_ERR(uphy->pctl);
+
+	uphy->phy_clk = clk = devm_clk_get(&ulpi->dev, "phy");
+	if (IS_ERR(clk))
+		return PTR_ERR(clk);
+
+	uphy->cal_clk = clk = devm_clk_get(&ulpi->dev, "cal");
+	if (IS_ERR(clk))
+		return PTR_ERR(clk);
+
+	uphy->cal_sleep_clk = clk = devm_clk_get(&ulpi->dev, "cal_sleep");
+	if (IS_ERR(clk))
+		return PTR_ERR(clk);
+
+	uphy->phy = devm_phy_create(&ulpi->dev, ulpi->dev.of_node,
+				    &qcom_usb_hsic_phy_ops);
+	if (IS_ERR(uphy->phy))
+		return PTR_ERR(uphy->phy);
+	phy_set_drvdata(uphy->phy, uphy);
+
+	p = devm_of_phy_provider_register(&ulpi->dev, of_phy_simple_xlate);
+	return PTR_ERR_OR_ZERO(p);
+}
+
+static const struct of_device_id qcom_usb_hsic_phy_match[] = {
+	{ .compatible = "qcom,usb-hsic-phy", },
+	{ }
+};
+MODULE_DEVICE_TABLE(of, qcom_usb_hsic_phy_match);
+
+static struct ulpi_driver qcom_usb_hsic_phy_driver = {
+	.probe = qcom_usb_hsic_phy_probe,
+	.driver = {
+		.name = "qcom_usb_hsic_phy",
+		.of_match_table = qcom_usb_hsic_phy_match,
+	},
+};
+module_ulpi_driver(qcom_usb_hsic_phy_driver);
+
+MODULE_DESCRIPTION("Qualcomm USB HSIC phy");
+MODULE_LICENSE("GPL v2");
-- 
2.9.0.rc2.8.ga28705d

[toc] | [prev] | [next] | [standalone]

#1474072 — Re: [PATCH v3 21/22] phy: Add support for Qualcomm's USB HSIC phy

Hi Stephen,


On Thu, Sep 1, 2016 at 6:10 AM, Stephen Boyd <stephen.boyd@linaro.org> wrote:
> The HSIC USB controller on qcom SoCs has an integrated all
> digital phy controlled via the ULPI viewport.
>
> Cc: Kishon Vijay Abraham I <kishon@ti.com>
> Cc: <devicetree@vger.kernel.org>
> Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org>
> ---
>  .../devicetree/bindings/phy/qcom,usb-hsic-phy.txt  |  65 +++++++++
>  drivers/phy/Kconfig                                |   7 +
>  drivers/phy/Makefile                               |   1 +
>  drivers/phy/phy-qcom-usb-hsic.c                    | 160 +++++++++++++++++++++
>  4 files changed, 233 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/phy/qcom,usb-hsic-phy.txt
>  create mode 100644 drivers/phy/phy-qcom-usb-hsic.c
>
> diff --git a/Documentation/devicetree/bindings/phy/qcom,usb-hsic-phy.txt b/Documentation/devicetree/bindings/phy/qcom,usb-hsic-phy.txt
> new file mode 100644
> index 000000000000..3c7cb2be4b12
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/phy/qcom,usb-hsic-phy.txt
> @@ -0,0 +1,65 @@
> +Qualcomm's USB HSIC PHY
> +
> +PROPERTIES
> +
> +- compatible:
> +    Usage: required
> +    Value type: <string>
> +    Definition: Should contain "qcom,usb-hsic-phy" and more specifically one of the
> +               following:
> +
> +                       "qcom,usb-hsic-phy-mdm9615"
> +                       "qcom,usb-hsic-phy-msm8974"
> +
> +- #phy-cells:
> +    Usage: required
> +    Value type: <u32>
> +    Definition: Should contain 0
> +
> +- clocks:
> +    Usage: required
> +    Value type: <prop-encoded-array>
> +    Definition: Should contain clock specifier for phy, calibration and
> +                a calibration sleep clock
> +
> +- clock-names:
> +    Usage: required
> +    Value type: <stringlist>
> +    Definition: Should contain "phy, "cal" and "cal_sleep"
> +
> +- pinctrl-names:
> +    Usage: required
> +    Value type: <stringlist>
> +    Definition: Should contain "init" and "default" in that order
> +
> +- pinctrl-0:
> +    Usage: required
> +    Value type: <prop-encoded-array>
> +    Definition: List of pinctrl settings to apply to keep HSIC pins in a glitch
> +                free state
> +
> +- pinctrl-1:
> +    Usage: required
> +    Value type: <prop-encoded-array>
> +    Definition: List of pinctrl settings to apply to mux out the HSIC pins
> +
> +EXAMPLE
> +
> +usb-controller {
> +       ulpi {
> +               phy {
> +                       compatible = "qcom,usb-hsic-phy-msm8974",
> +                                    "qcom,usb-hsic-phy";
> +                       #phy-cells = <0>;
> +                       pinctrl-names = "init", "default";
> +                       pinctrl-0 = <&hsic_sleep>;
> +                       pinctrl-1 = <&hsic_default>;
> +                       clocks = <&gcc GCC_USB_HSIC_CLK>,
> +                                <&gcc GCC_USB_HSIC_IO_CAL_CLK>,
> +                                <&gcc GCC_USB_HSIC_IO_CAL_SLEEP_CLK>;
> +                       clock-names = "phy", "cal", "cal_sleep";
> +                       assigned-clocks = <&gcc GCC_USB_HSIC_IO_CAL_CLK>;
> +                       assigned-clock-rates = <960000>;
> +               };
> +       };
> +};
> diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
> index 19bff3a10f69..830c443eeabf 100644
> --- a/drivers/phy/Kconfig
> +++ b/drivers/phy/Kconfig
> @@ -417,6 +417,13 @@ config PHY_QCOM_UFS
>         help
>           Support for UFS PHY on QCOM chipsets.
>
> +config PHY_QCOM_USB_HSIC
> +       tristate "Qualcomm USB HSIC ULPI PHY module"
> +       depends on USB_ULPI_BUS
> +       select GENERIC_PHY
> +       help
> +         Support for the USB HSIC ULPI compliant PHY on QCOM chipsets.
> +
>  config PHY_TUSB1210
>         tristate "TI TUSB1210 ULPI PHY module"
>         depends on USB_ULPI_BUS
> diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
> index 90ae19879b0a..5422f543d17d 100644
> --- a/drivers/phy/Makefile
> +++ b/drivers/phy/Makefile
> @@ -50,6 +50,7 @@ obj-$(CONFIG_PHY_STIH41X_USB)         += phy-stih41x-usb.o
>  obj-$(CONFIG_PHY_QCOM_UFS)     += phy-qcom-ufs.o
>  obj-$(CONFIG_PHY_QCOM_UFS)     += phy-qcom-ufs-qmp-20nm.o
>  obj-$(CONFIG_PHY_QCOM_UFS)     += phy-qcom-ufs-qmp-14nm.o
> +obj-$(CONFIG_PHY_QCOM_USB_HSIC)        += phy-qcom-usb-hsic.o
>  obj-$(CONFIG_PHY_TUSB1210)             += phy-tusb1210.o
>  obj-$(CONFIG_PHY_BRCM_SATA)            += phy-brcm-sata.o
>  obj-$(CONFIG_PHY_PISTACHIO_USB)                += phy-pistachio-usb.o
> diff --git a/drivers/phy/phy-qcom-usb-hsic.c b/drivers/phy/phy-qcom-usb-hsic.c
> new file mode 100644
> index 000000000000..47690f9945b9
> --- /dev/null
> +++ b/drivers/phy/phy-qcom-usb-hsic.c
> @@ -0,0 +1,160 @@
> +/**
> + * Copyright (C) 2016 Linaro Ltd
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +#include <linux/module.h>
> +#include <linux/ulpi/driver.h>
> +#include <linux/ulpi/regs.h>
> +#include <linux/pinctrl/consumer.h>
> +#include <linux/pinctrl/pinctrl-state.h>
> +#include <linux/delay.h>
> +#include <linux/clk.h>
> +
> +#include "ulpi_phy.h"
> +
> +#define ULPI_HSIC_CFG          0x30
> +#define ULPI_HSIC_IO_CAL       0x33
> +
> +struct qcom_usb_hsic_phy {
> +       struct ulpi *ulpi;
> +       struct phy *phy;
> +       struct pinctrl *pctl;
> +       struct clk *phy_clk;
> +       struct clk *cal_clk;
> +       struct clk *cal_sleep_clk;
> +};
> +
> +static int qcom_usb_hsic_phy_power_on(struct phy *phy)
> +{
> +       struct qcom_usb_hsic_phy *uphy = phy_get_drvdata(phy);
> +       struct ulpi *ulpi = uphy->ulpi;
> +       struct pinctrl_state *pins_default;
> +       int ret;
> +
> +       ret = clk_prepare_enable(uphy->phy_clk);
> +       if (ret)
> +               return ret;
> +
> +       ret = clk_prepare_enable(uphy->cal_clk);
> +       if (ret)
> +               goto err_cal;
> +
> +       ret = clk_prepare_enable(uphy->cal_sleep_clk);
> +       if (ret)
> +               goto err_sleep;
> +
> +       /* Set periodic calibration interval to ~2.048sec in HSIC_IO_CAL_REG */
> +       ret = ulpi_write(ulpi, ULPI_HSIC_IO_CAL, 0xff);
> +       if (ret)
> +               goto err_ulpi;
> +
> +       /* Enable periodic IO calibration in HSIC_CFG register */
> +       ret = ulpi_write(ulpi, ULPI_HSIC_CFG, 0xa8);
> +       if (ret)
> +               goto err_ulpi;
> +
> +       /* Configure pins for HSIC functionality */
> +       pins_default = pinctrl_lookup_state(uphy->pctl, PINCTRL_STATE_DEFAULT);
> +       if (IS_ERR(pins_default))
> +               return PTR_ERR(pins_default);
> +
> +       ret = pinctrl_select_state(uphy->pctl, pins_default);
> +       if (ret)
> +               goto err_ulpi;
> +
> +        /* Enable HSIC mode in HSIC_CFG register */
> +       ret = ulpi_write(ulpi, ULPI_SET(ULPI_HSIC_CFG), 0x01);
> +       if (ret)
> +               goto err_ulpi;
> +
> +       /* Disable auto-resume */
> +       ret = ulpi_write(ulpi, ULPI_CLR(ULPI_IFC_CTRL),
> +                        ULPI_IFC_CTRL_AUTORESUME);
> +       if (ret)
> +               goto err_ulpi;
> +
> +       return ret;
> +err_ulpi:
> +       clk_disable_unprepare(uphy->cal_sleep_clk);
> +err_sleep:
> +       clk_disable_unprepare(uphy->cal_clk);
> +err_cal:
> +       clk_disable_unprepare(uphy->phy_clk);
> +       return ret;
> +}
> +
> +static int qcom_usb_hsic_phy_power_off(struct phy *phy)
> +{
> +       struct qcom_usb_hsic_phy *uphy = phy_get_drvdata(phy);
> +
> +       clk_disable_unprepare(uphy->cal_sleep_clk);
> +       clk_disable_unprepare(uphy->cal_clk);
> +       clk_disable_unprepare(uphy->phy_clk);
> +
> +       return 0;
> +}
> +
> +static const struct phy_ops qcom_usb_hsic_phy_ops = {
> +       .power_on = qcom_usb_hsic_phy_power_on,
> +       .power_off = qcom_usb_hsic_phy_power_off,
> +       .owner = THIS_MODULE,
> +};
> +
> +static int qcom_usb_hsic_phy_probe(struct ulpi *ulpi)
> +{
> +       struct qcom_usb_hsic_phy *uphy;
> +       struct phy_provider *p;
> +       struct clk *clk;
> +
> +       uphy = devm_kzalloc(&ulpi->dev, sizeof(*uphy), GFP_KERNEL);
> +       if (!uphy)
> +               return -ENOMEM;
> +       ulpi_set_drvdata(ulpi, uphy);
> +
> +       uphy->ulpi = ulpi;
> +       uphy->pctl = devm_pinctrl_get(&ulpi->dev);
> +       if (IS_ERR(uphy->pctl))
> +               return PTR_ERR(uphy->pctl);
> +
> +       uphy->phy_clk = clk = devm_clk_get(&ulpi->dev, "phy");
> +       if (IS_ERR(clk))
> +               return PTR_ERR(clk);
> +
> +       uphy->cal_clk = clk = devm_clk_get(&ulpi->dev, "cal");
> +       if (IS_ERR(clk))
> +               return PTR_ERR(clk);
> +
> +       uphy->cal_sleep_clk = clk = devm_clk_get(&ulpi->dev, "cal_sleep");
> +       if (IS_ERR(clk))
> +               return PTR_ERR(clk);
> +
> +       uphy->phy = devm_phy_create(&ulpi->dev, ulpi->dev.of_node,
> +                                   &qcom_usb_hsic_phy_ops);

There's a ulpi_phy library available in  drivers/phy/. Do we want to use that ?
That also creates a phy-lookup of this PHY so that the ulpi device's parent
can request the PHY.

You may want to modify the APIs available in ulpi_phy library to use the
devm_* APIs.

same applies to the next patch in the series.

> +       if (IS_ERR(uphy->phy))
> +               return PTR_ERR(uphy->phy);
> +       phy_set_drvdata(uphy->phy, uphy);
> +
> +       p = devm_of_phy_provider_register(&ulpi->dev, of_phy_simple_xlate);
> +       return PTR_ERR_OR_ZERO(p);
> +}
> +
> +static const struct of_device_id qcom_usb_hsic_phy_match[] = {
> +       { .compatible = "qcom,usb-hsic-phy", },
> +       { }
> +};
> +MODULE_DEVICE_TABLE(of, qcom_usb_hsic_phy_match);
> +
> +static struct ulpi_driver qcom_usb_hsic_phy_driver = {
> +       .probe = qcom_usb_hsic_phy_probe,
> +       .driver = {
> +               .name = "qcom_usb_hsic_phy",
> +               .of_match_table = qcom_usb_hsic_phy_match,
> +       },
> +};
> +module_ulpi_driver(qcom_usb_hsic_phy_driver);
> +
> +MODULE_DESCRIPTION("Qualcomm USB HSIC phy");
> +MODULE_LICENSE("GPL v2");
> --
> 2.9.0.rc2.8.ga28705d
>

[toc] | [prev] | [next] | [standalone]

#1475055 — Re: [PATCH v3 21/22] phy: Add support for Qualcomm's USB HSIC phy

On 2016-09-02 03:30, Stephen Boyd wrote:
> (Please trim replies)

sorry, will take care from next time.

> 
> Quoting Vivek Gautam (2016-08-31 23:17:55)
>> On Thu, Sep 1, 2016 at 6:10 AM, Stephen Boyd <stephen.boyd@linaro.org> 
>> wrote:
>> > +
>> > +       uphy->cal_sleep_clk = clk = devm_clk_get(&ulpi->dev, "cal_sleep");
>> > +       if (IS_ERR(clk))
>> > +               return PTR_ERR(clk);
>> > +
>> > +       uphy->phy = devm_phy_create(&ulpi->dev, ulpi->dev.of_node,
>> > +                                   &qcom_usb_hsic_phy_ops);
>> 
>> There's a ulpi_phy library available in  drivers/phy/. Do we want to 
>> use that ?
>> That also creates a phy-lookup of this PHY so that the ulpi device's 
>> parent
>> can request the PHY.
> 
> I don't have any interest in using those two functions (does two
> functions constitute a library?).

Not really.

> There's no devm as you say,

I meant to say that you may need to change the existing APIs to the 
devm_* APIs.

> and it seems to be specific to the ULPI hardware for dwc3 (the only 
> user) where
> the phy is called "usb2-phy".

This was used with TI's USB 2.0 PHY, that has ULPI interface.

> This is a phy for the ChipIdea controller
> which only has one phy and it's called "usb-phy" in that case.

In a way this is also a USB 2.0 phy, isn't it ?

> 
>> 
>> You may want to modify the APIs available in ulpi_phy library to use 
>> the
>> devm_* APIs.
>> 
> 
> The lookup isn't necessary because we use DT to find the lookup. I seem
> to recall the phy framework requiring a DT lookup too.

The lookup created in this ulpi_phy.h was used to help getting the PHY 
in the
driver for parent device (a core wrapper) of the controller (platform 
glue layer) that requests this PHY.
I am not certain at this point about how PHY has to be handled in case 
of Chipidea.
Was just throwing in ideas. :-)


Thanks
Vivek

[toc] | [prev] | [next] | [standalone]

#1474006 — [PATCH v3 07/22] usb: chipidea: Notify events when switching host mode

The chipidea/udc.c file sends a CI_HDRC_CONTROLLER_RESET_EVENT to
the wrapper drivers when it calls hw_device_reset(), but that
function is not called from chipidea/host.c. And the udc.c file
sends the CI_HDRC_CONTROLLER_STOPPED_EVENT but the host.c file
doesn't do anything.

The intent of the reset event is to allow the wrapper driver to
do any wrapper specific things after the reset bit has been set
in the usb command register. Therefore, add this event hook in
the host role after we toggle that bit.

Similarly, the intent of the stopped event is to allow the
wrapper driver to do any wrapper specific things after the device
is stopped. So when we stop the host role, send the stopped
event.

Acked-by: Peter Chen <peter.chen@nxp.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org>
---
 drivers/usb/chipidea/host.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/drivers/usb/chipidea/host.c b/drivers/usb/chipidea/host.c
index 053bac9d983c..a1d8551ca79d 100644
--- a/drivers/usb/chipidea/host.c
+++ b/drivers/usb/chipidea/host.c
@@ -87,6 +87,9 @@ static int ehci_ci_reset(struct usb_hcd *hcd)
 	if (ret)
 		return ret;
 
+	if (ci->platdata->notify_event)
+		ci->platdata->notify_event(ci, CI_HDRC_CONTROLLER_RESET_EVENT);
+
 	ci_platform_configure(ci);
 
 	return ret;
@@ -184,6 +187,9 @@ static void host_stop(struct ci_hdrc *ci)
 	struct usb_hcd *hcd = ci->hcd;
 
 	if (hcd) {
+		if (ci->platdata->notify_event)
+			ci->platdata->notify_event(ci,
+				CI_HDRC_CONTROLLER_STOPPED_EVENT);
 		usb_remove_hcd(hcd);
 		usb_put_hcd(hcd);
 		if (ci->platdata->reg_vbus && !ci_otg_is_fsm_mode(ci) &&
-- 
2.9.0.rc2.8.ga28705d

[toc] | [prev] | [standalone]

Page 2 of 2 — ← Prev page 1 [2]

Back to top | Article view | linux.kernel

csiph-web