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Re: [PATCH] x86/AMD: Fix Socket ID for LLC topology for AMD Fam17h systems

Started byThomas Gleixner <tglx@linutronix.de>
First post2016-09-02 10:50 +0200
Last post2016-09-02 20:10 +0200
Articles 4 — 2 participants

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  Re: [PATCH] x86/AMD: Fix Socket ID for LLC topology for AMD Fam17h  systems Thomas Gleixner <tglx@linutronix.de> - 2016-09-02 10:50 +0200
    RE: [PATCH] x86/AMD: Fix Socket ID for LLC topology for AMD Fam17h  systems "Ghannam, Yazen" <Yazen.Ghannam@amd.com> - 2016-09-02 15:00 +0200
      RE: [PATCH] x86/AMD: Fix Socket ID for LLC topology for AMD Fam17h  systems Thomas Gleixner <tglx@linutronix.de> - 2016-09-02 15:20 +0200
        RE: [PATCH] x86/AMD: Fix Socket ID for LLC topology for AMD Fam17h  systems "Ghannam, Yazen" <Yazen.Ghannam@amd.com> - 2016-09-02 20:10 +0200

#1474956 — Re: [PATCH] x86/AMD: Fix Socket ID for LLC topology for AMD Fam17h systems

FromThomas Gleixner <tglx@linutronix.de>
Date2016-09-02 10:50 +0200
SubjectRe: [PATCH] x86/AMD: Fix Socket ID for LLC topology for AMD Fam17h systems
Message-ID<scSkF-5B4-29@gated-at.bofh.it>
On Wed, 31 Aug 2016, Yazen Ghannam wrote:

> The Socket ID is ApicId[bits] on Fam17h systems.
> 
> Change substraction to logical AND when extracting socket_id
> from c->apicid.

So Fam17h will only ever have 2 sockets, right?

Thanks,

	tglx

> Signed-off-by: Yazen Ghannam <Yazen.Ghannam@amd.com>
> ---
>  arch/x86/kernel/cpu/amd.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
> index f5c69d8..479555f 100644
> --- a/arch/x86/kernel/cpu/amd.c
> +++ b/arch/x86/kernel/cpu/amd.c
> @@ -365,7 +365,7 @@ static void amd_detect_cmp(struct cpuinfo_x86 *c)
>  	 if (c->x86 != 0x17 || !cpuid_edx(0x80000006))
>  		return;
>  
> -	socket_id	= (c->apicid >> bits) - 1;
> +	socket_id	= (c->apicid >> bits) & 1;
>  	core_complex_id	= (c->apicid & ((1 << bits) - 1)) >> 3;
>  
>  	per_cpu(cpu_llc_id, cpu) = (socket_id << 3) | core_complex_id;
> -- 
> 1.9.1
> 
> 

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#1475135

From"Ghannam, Yazen" <Yazen.Ghannam@amd.com>
Date2016-09-02 15:00 +0200
Message-ID<scWeC-82j-41@gated-at.bofh.it>
In reply to#1474956
> 
> > The Socket ID is ApicId[bits] on Fam17h systems.
> >
> > Change substraction to logical AND when extracting socket_id
> > from c->apicid.
> 
> So Fam17h will only ever have 2 sockets, right?
> 

This is the decoding of the ApicId shown in our latest Programming
Reference. However, I can remove the "& 1" if you think it'll be better.

Thanks,
Yazen

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#1475147

FromThomas Gleixner <tglx@linutronix.de>
Date2016-09-02 15:20 +0200
Message-ID<scWxX-8o5-23@gated-at.bofh.it>
In reply to#1475135
On Fri, 2 Sep 2016, Ghannam, Yazen wrote:
> > > The Socket ID is ApicId[bits] on Fam17h systems.
> > >
> > > Change substraction to logical AND when extracting socket_id
> > > from c->apicid.
> > 
> > So Fam17h will only ever have 2 sockets, right?
> > 
> 
> This is the decoding of the ApicId shown in our latest Programming
> Reference.

I have no idea what your latest reference manual says as it seems to be not
yet public.

> However, I can remove the "& 1" if you think it'll be better.

I's not about what I think is better.

I asked the obvious question whether Fam17h will only ever have two sockets,
because your patch limits it hard to that.

Care to answer that very question instead of handwaving about your
interpretation of a secret manual?

Thanks,

	tglx

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#1475384

From"Ghannam, Yazen" <Yazen.Ghannam@amd.com>
Date2016-09-02 20:10 +0200
Message-ID<sd14C-2Oa-29@gated-at.bofh.it>
In reply to#1475147
> I asked the obvious question whether Fam17h will only ever have two
> sockets,
> because your patch limits it hard to that.
> 

I don't know if Fam17h will only ever have two sockets, so I'll send a V2
removing the hard limit.

Thanks,
Yazen

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