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Groups > linux.kernel > #1471336 > unrolled thread

[PATCH 0/4 v3] Add a new board TOPEET iTOP for exynos 4412

Started byRandy Li <ayaka@soulik.info>
First post2016-08-28 13:30 +0200
Last post2016-08-30 09:10 +0200
Articles 13 — 5 participants

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Contents

  [PATCH 0/4 v3] Add a new board TOPEET iTOP for exynos 4412 Randy Li <ayaka@soulik.info> - 2016-08-28 13:30 +0200
    [PATCH 1/4] ARM: dts: Add TOPEET itop core board SCP package version Randy Li <ayaka@soulik.info> - 2016-08-28 13:30 +0200
      Re: [PATCH 1/4] ARM: dts: Add TOPEET itop core board SCP package  version Rask Ingemann Lambertsen <ccc94453@vip.cybercity.dk> - 2016-08-28 23:20 +0200
      Re: [PATCH 1/4] ARM: dts: Add TOPEET itop core board SCP package  version Krzysztof Kozlowski <krzk@kernel.org> - 2016-08-30 09:20 +0200
        [RESEND PATCH 1/3] ARM: dts: Add TOPEET itop core board SCP package version Randy Li <ayaka@soulik.info> - 2016-08-31 15:00 +0200
          Re: [RESEND PATCH 1/3] ARM: dts: Add TOPEET itop core board SCP  package version Krzysztof Kozlowski <krzk@kernel.org> - 2016-08-31 20:50 +0200
            Re: [RESEND PATCH 1/3] ARM: dts: Add TOPEET itop core board SCP package version Ayaka <ayaka@soulik.info> - 2016-08-31 22:00 +0200
          Re: [RESEND PATCH 1/3] ARM: dts: Add TOPEET itop core board SCP  package version Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> - 2016-09-01 15:10 +0200
            Re: [RESEND PATCH 1/3] ARM: dts: Add TOPEET itop core board SCP  package version Krzysztof Kozlowski <krzk@kernel.org> - 2016-09-01 18:20 +0200
    [PATCH 3/4] ARM: dts: add fimc support in exynos4412 TOPEET iTop Elite board Randy Li <ayaka@soulik.info> - 2016-08-28 13:30 +0200
      Re: [PATCH 3/4] ARM: dts: add fimc support in exynos4412 TOPEET iTop  Elite board Krzysztof Kozlowski <krzk@kernel.org> - 2016-08-30 09:40 +0200
        [PATCH 3/3 v3] devicetree: bindings: Add vendor prefix for Topeet. Randy Li <ayaka@soulik.info> - 2016-08-31 15:10 +0200
    Re: [PATCH 0/4 v3] Add a new board TOPEET iTOP for exynos 4412 Krzysztof Kozlowski <krzk@kernel.org> - 2016-08-30 09:10 +0200

#1471336 — [PATCH 0/4 v3] Add a new board TOPEET iTOP for exynos 4412

FromRandy Li <ayaka@soulik.info>
Date2016-08-28 13:30 +0200
Subject[PATCH 0/4 v3] Add a new board TOPEET iTOP for exynos 4412
Message-ID<sb6rL-12n-3@gated-at.bofh.it>
The added the audio codec seems work now, but the audio sounds
still a little different to the original. But I didn't hear the sound
in the Android, I don't know whether it is qualified.

Also it lacks of full pinctrl for the sleep state.

Changelog:
 - v3:
   - fixing the rtc clock, using clock source from PMIC
   - enable the tmu
   - enable the fimc for elite board
   - suuport the audio codec at elite board
   - fixing minor bugs in the last commit
 - v2:
   - removing rtc node
     the clock source driver is not done yet.
   - adding exynos-bus
   - fixing the MFC

Randy Li (4):
  ARM: dts: Add TOPEET itop core board SCP package version
  ARM: dts: add TOPEET itop elite based board
  ARM: dts: add fimc support in exynos4412 TOPEET iTop Elite board
  ARM: dts: samsung: add analog audio codec on TOPEET iTop 4412 Elite

 .../bindings/arm/samsung/samsung-boards.txt        |   3 +
 arch/arm/boot/dts/Makefile                         |   1 +
 arch/arm/boot/dts/exynos4412-itop-elite.dts        | 241 ++++++++++
 arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi    | 489 +++++++++++++++++++++
 4 files changed, 734 insertions(+)
 create mode 100644 arch/arm/boot/dts/exynos4412-itop-elite.dts
 create mode 100644 arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi

-- 
2.7.4

[toc] | [next] | [standalone]


#1471337 — [PATCH 1/4] ARM: dts: Add TOPEET itop core board SCP package version

FromRandy Li <ayaka@soulik.info>
Date2016-08-28 13:30 +0200
Subject[PATCH 1/4] ARM: dts: Add TOPEET itop core board SCP package version
Message-ID<sb6rM-12n-23@gated-at.bofh.it>
In reply to#1471336
The TOPEET itop is a samsung exnynos 4412 core board, which have
two package versions. This patch add the support for SCP version.

Currently supported are USB3503A HSIC, USB OTG, eMMC, rtc and
PMIC. The future features are in the based board. Also MFC and
watchdog have been enabled.

Signed-off-by: Randy Li <ayaka@soulik.info>
---
 arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi | 489 ++++++++++++++++++++++++
 1 file changed, 489 insertions(+)
 create mode 100644 arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi

diff --git a/arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi b/arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi
new file mode 100644
index 0000000..ce5076c
--- /dev/null
+++ b/arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi
@@ -0,0 +1,489 @@
+/*
+ * TOPEET's Exynos4412 based itop board device tree source
+ *
+ * Copyright (c) 2016 SUMOMO Computer Association
+ *			https://www.sumomo.mobi
+ *			Randy Li <ayaka@soulik.info>
+ *			
+ * Device tree source file for TOPEET iTop Exynos 4412 SCP package core 
+ * board which is based on Samsung's Exynos4412 SoC.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include "exynos4412.dtsi"
+#include "exynos4412-ppmu-common.dtsi"
+#include "exynos-mfc-reserved-memory.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+	memory {
+		reg = <0x40000000 0x40000000>;
+	};
+
+	firmware@0203F000 {
+		compatible = "samsung,secure-firmware";
+		reg = <0x0203F000 0x1000>;
+	};
+
+	fixed-rate-clocks {
+		xxti {
+			compatible = "samsung,clock-xxti";
+			clock-frequency = <0>;
+		};
+
+		xusbxti {
+			compatible = "samsung,clock-xusbxti";
+			clock-frequency = <24000000>;
+		};
+
+		/* Clock from S5M8767A AP32K */
+		ap32k: xrtcxti {
+			compatible = "fixed-clock";
+			#clock-cells = <0>;
+			clock-frequency = <32768000>;
+		};
+	};
+
+	thermal-zones {
+		cpu_thermal: cpu-thermal {
+			cooling-maps {
+				map0 {
+				     /* Corresponds to 800MHz at freq_table */
+				     cooling-device = <&cpu0 7 7>;
+				};
+				map1 {
+				     /* Corresponds to 200MHz at freq_table */
+				     cooling-device = <&cpu0 13 13>;
+			       };
+		       };
+		};
+	};
+
+	usb-hub {
+		compatible = "smsc,usb3503a";
+		reset-gpios = <&gpm2 4 GPIO_ACTIVE_LOW>;
+		connect-gpios = <&gpm3 3 GPIO_ACTIVE_HIGH>;
+		intn-gpios = <&gpx2 3 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&hsic_reset>;
+	};
+};
+
+&bus_dmc {
+	devfreq-events = <&ppmu_dmc0_3>, <&ppmu_dmc1_3>;
+	vdd-supply = <&buck1_reg>;
+	status = "okay";
+};
+
+&bus_acp {
+        devfreq = <&bus_dmc>;
+        status = "okay";
+};
+
+&bus_c2c {
+        devfreq = <&bus_dmc>;
+        status = "okay";
+};
+
+&bus_leftbus {
+        devfreq-events = <&ppmu_leftbus_3>, <&ppmu_rightbus_3>;
+        vdd-supply = <&buck3_reg>;
+        status = "okay";
+};
+
+&bus_rightbus {
+        devfreq = <&bus_leftbus>;
+        status = "okay";
+};
+
+&bus_fsys {
+        devfreq = <&bus_leftbus>;
+        status = "okay";
+};
+
+&bus_peri {
+        devfreq = <&bus_leftbus>;
+        status = "okay";
+};
+
+&bus_mfc {
+        devfreq = <&bus_leftbus>;
+        status = "okay";
+};
+
+&cpu0 {
+	cpu0-supply = <&buck2_reg>;
+};
+
+&i2c_1 {
+	#address-cells = <1>;
+	#size-cells = <0>;
+	samsung,i2c-sda-delay = <100>;
+	samsung,i2c-max-bus-freq = <400000>;
+	pinctrl-0 = <&i2c1_bus>;
+	pinctrl-names = "default";
+	status = "okay";
+
+	s5m8767: s5m8767_pmic@66 {
+		compatible = "samsung,s5m8767-pmic";
+		reg = <0x66>;
+
+		s5m8767,pmic-buck-default-dvs-idx = <3>;
+
+		s5m8767,pmic-buck-dvs-gpios = <&gpb 5 GPIO_ACTIVE_HIGH>,
+						 <&gpb 6 GPIO_ACTIVE_HIGH>,
+						 <&gpb 7 GPIO_ACTIVE_HIGH>;
+
+		s5m8767,pmic-buck-ds-gpios = <&gpm3 5 GPIO_ACTIVE_HIGH>,
+						<&gpm3 6 GPIO_ACTIVE_HIGH>,
+						<&gpm3 7 GPIO_ACTIVE_HIGH>;
+
+		/* VDD_ARM */
+		s5m8767,pmic-buck2-dvs-voltage = <1356250>, <1300000>,
+						 <1243750>, <1118750>,
+						 <1068750>, <1012500>,
+						 <956250>, <900000>;
+		/* VDD_INT */
+		s5m8767,pmic-buck3-dvs-voltage = <1000000>, <1000000>,
+						 <925000>, <925000>,
+						 <887500>, <887500>,
+						 <850000>, <850000>;
+		/* VDD_G3D */
+		s5m8767,pmic-buck4-dvs-voltage = <1081250>, <1081250>,
+						 <1025000>, <950000>,
+						 <918750>, <900000>,
+						 <875000>, <831250>;
+
+		regulators {
+			ldo1_reg: LDO1 {
+				regulator-name = "VDD_ALIVE";
+				regulator-min-microvolt = <1100000>;
+				regulator-max-microvolt = <1100000>;
+				regulator-always-on;
+				regulator-boot-on;
+				op_mode = <1>; /* Normal Mode */
+			};
+
+			/* SCP uses 1.5v, POP uses 1.2v */
+			ldo2_reg: LDO2 {
+				regulator-name = "VDDQ_M12";
+				regulator-min-microvolt = <1500000>;
+				regulator-max-microvolt = <1500000>;
+				regulator-always-on;
+				regulator-boot-on;
+				op_mode = <1>; /* Normal Mode */
+			};
+
+			ldo3_reg: LDO3 {
+				regulator-name = "VDDIOAP_18";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-always-on;
+				op_mode = <1>; /* Normal Mode */
+			};
+
+			ldo4_reg: LDO4 {
+				regulator-name = "VDDQ_PRE";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-always-on;
+				op_mode = <1>; /* Normal Mode */
+			};
+
+			ldo6_reg: LDO6 {
+				regulator-name = "VDD10_MPLL";
+				regulator-min-microvolt = <1000000>;
+				regulator-max-microvolt = <1000000>;
+				regulator-always-on;
+				op_mode = <1>; /* Normal Mode */
+			};
+
+			ldo7_reg: LDO7 {
+				regulator-name = "VDD10_XPLL";
+				regulator-min-microvolt = <1000000>;
+				regulator-max-microvolt = <1000000>;
+				regulator-always-on;
+				op_mode = <1>; /* Normal Mode */
+			};
+
+			ldo8_reg: LDO8 {
+				regulator-name = "VDD10_MIPI";
+				regulator-min-microvolt = <1000000>;
+				regulator-max-microvolt = <1000000>;
+				op_mode = <1>; /* Normal Mode */
+			};
+
+			ldo9_reg: LDO9 {
+				regulator-name = "VDD33_LCD";
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+				op_mode = <1>; /* Normal Mode */
+			};
+
+			ldo10_reg: LDO10 {
+				regulator-name = "VDD18_MIPI";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				op_mode = <1>; /* Normal Mode */
+			};
+
+			ldo11_reg: LDO11 {
+				regulator-name = "VDD18_ABB1";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-always-on;
+				op_mode = <1>; /* Normal Mode */
+			};
+
+			ldo12_reg: LDO12 {
+				regulator-name = "VDD33_UOTG";
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-always-on;
+				op_mode = <1>; /* Normal Mode */
+			};
+
+			ldo13_reg: LDO13 {
+				regulator-name = "VDDIOPERI_18";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-always-on;
+				op_mode = <1>; /* Normal Mode */
+			};
+
+			ldo14_reg: LDO14 {
+				regulator-name = "VDD18_ABB02";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-always-on;
+				op_mode = <1>; /* Normal Mode */
+			};
+
+			ldo15_reg: LDO15 {
+				regulator-name = "VDD10_USH";
+				regulator-min-microvolt = <1000000>;
+				regulator-max-microvolt = <1000000>;
+				regulator-always-on;
+				op_mode = <1>; /* Normal Mode */
+			};
+
+			ldo16_reg: LDO16 {
+				regulator-name = "VDD18_HSIC";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-always-on;
+				op_mode = <1>; /* Normal Mode */
+			};
+
+			ldo17_reg: LDO17 {
+				regulator-name = "VDDIOAP_MMC012_28";
+				regulator-min-microvolt = <2800000>;
+				regulator-max-microvolt = <2800000>;
+				op_mode = <1>; /* Normal Mode */
+			};
+
+			/* Used by HSIC */
+			ldo18_reg: LDO18 {
+				regulator-name = "VDDIOPERI_28";
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-always-on;
+				op_mode = <1>; /* Normal Mode */
+			};
+
+			ldo20_reg: LDO20 {
+				regulator-name = "VDD28_CAM";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <2800000>;
+				op_mode = <1>; /* Normal Mode */
+			};
+
+			ldo21_reg: LDO21 {
+				regulator-name = "VDD28_AF";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <2800000>;
+				op_mode = <1>; /* Normal Mode */
+			};
+
+			ldo22_reg: LDO22 {
+				regulator-name = "VDDA28_2M";
+				regulator-min-microvolt = <2800000>;
+				regulator-max-microvolt = <2800000>;
+				op_mode = <1>; /* Normal Mode */
+			};
+
+			ldo23_reg: LDO23 {
+				regulator-name = "VDD28_TF";
+				regulator-min-microvolt = <2800000>;
+				regulator-max-microvolt = <2800000>;
+				op_mode = <1>; /* Normal Mode */
+			};
+
+			ldo24_reg: LDO24 {
+				regulator-name = "VDD33_A31";
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+				op_mode = <1>; /* Normal Mode */
+			};
+
+			ldo25_reg: LDO25 {
+				regulator-name = "VDD18_CAM";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				op_mode = <1>; /* Normal Mode */
+			};
+
+			ldo26_reg: LDO26 {
+				regulator-name = "VDD18_A31";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				op_mode = <1>; /* Normal Mode */
+			};
+
+			ldo27_reg: LDO27 {
+				regulator-name = "GPS_1V8";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				op_mode = <1>; /* Normal Mode */
+			};
+
+			ldo28_reg: LDO28 {
+				regulator-name = "DVDD12";
+				regulator-min-microvolt = <1200000>;
+				regulator-max-microvolt = <1200000>;
+				op_mode = <1>; /* Normal Mode */
+			};
+
+			buck1_reg: BUCK1 {
+				regulator-name = "vdd_mif";
+				regulator-min-microvolt = <850000>;
+				regulator-max-microvolt	= <1100000>;
+				regulator-always-on;
+				regulator-boot-on;
+				op_mode = <1>; /* Normal Mode */
+			};
+
+			buck2_reg: BUCK2 {
+				regulator-name = "vdd_arm";
+				regulator-min-microvolt = <850000>;
+				regulator-max-microvolt	= <1456250>;
+				regulator-always-on;
+				regulator-boot-on;
+				op_mode = <1>; /* Normal Mode */
+			};
+
+			buck3_reg: BUCK3 {
+				regulator-name = "vdd_int";
+				regulator-min-microvolt = <875000>;
+				regulator-max-microvolt	= <1200000>;
+				regulator-always-on;
+				regulator-boot-on;
+				op_mode = <1>; /* Normal Mode */
+			};
+
+			buck4_reg: BUCK4 {
+				regulator-name = "vdd_g3d";
+				regulator-min-microvolt = <750000>;
+				regulator-max-microvolt	= <1500000>;
+				regulator-always-on;
+				regulator-boot-on;
+				op_mode = <1>; /* Normal Mode */
+			};
+
+			buck5_reg: BUCK5 {
+				regulator-name = "vdd_m12";
+				regulator-min-microvolt = <750000>;
+				regulator-max-microvolt	= <1500000>;
+				regulator-always-on;
+				regulator-boot-on;
+				op_mode = <1>; /* Normal Mode */
+			};
+
+			buck6_reg: BUCK6 {
+				regulator-name = "vdd12_5m";
+				regulator-min-microvolt = <750000>;
+				regulator-max-microvolt	= <1500000>;
+				regulator-always-on;
+				regulator-boot-on;
+				op_mode = <1>; /* Normal Mode */
+			};
+
+			buck7_reg: BUCK7 {
+				regulator-name = "pvdd_buck7";
+				regulator-min-microvolt = <750000>;
+				regulator-max-microvolt	= <2000000>;
+				regulator-boot-on;
+				regulator-always-on;
+				op_mode = <1>; /* Normal Mode */
+			};
+
+			buck8_reg: BUCK8 {
+				regulator-name = "pvdd_buck8";
+				regulator-min-microvolt = <750000>;
+				regulator-max-microvolt	= <1500000>;
+				regulator-boot-on;
+				regulator-always-on;
+				op_mode = <1>; /* Normal Mode */
+			};
+
+			buck9_reg: BUCK9 {
+				regulator-name = "vddf28_emmc";
+				regulator-min-microvolt = <750000>;
+				regulator-max-microvolt	= <3000000>;
+				op_mode = <1>; /* Normal Mode */
+			};
+		};
+	};
+};
+
+&pinctrl_1 {
+	hsic_reset: hsic-reset {
+		samsung,pins = "gpm2-4";
+		samsung,pin-function = <1>;
+		samsung,pin-pud = <0>;
+		samsung,pin-drv = <3>;
+	};
+};
+
+&mfc {
+	status = "okay";
+};
+
+&mshc_0 {
+	pinctrl-0 = <&sd4_clk &sd4_cmd &sd4_bus4 &sd4_bus8>;
+	pinctrl-names = "default";
+	status = "okay";
+	vmmc-supply = <&buck9_reg>;
+	num-slots = <1>;
+	broken-cd;
+	card-detect-delay = <200>;
+	samsung,dw-mshc-ciu-div = <3>;
+	samsung,dw-mshc-sdr-timing = <2 3>;
+	samsung,dw-mshc-ddr-timing = <1 2>;
+	bus-width = <8>;
+	cap-mmc-highspeed;
+};
+
+&hsotg {
+	vusb_d-supply = <&ldo15_reg>;
+	vusb_a-supply = <&ldo12_reg>;
+};
+
+&rtc {
+	status = "okay";
+	clocks = <&clock CLK_RTC>, <&ap32k>;
+	clock-names = "rtc", "rtc_src";
+};
+
+&watchdog {
+	status = "okay";
+};
+
+&tmu {
+	vtmu-supply = <&ldo16_reg>;
+	status = "okay";
+};
-- 
2.7.4

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#1471471 — Re: [PATCH 1/4] ARM: dts: Add TOPEET itop core board SCP package version

FromRask Ingemann Lambertsen <ccc94453@vip.cybercity.dk>
Date2016-08-28 23:20 +0200
SubjectRe: [PATCH 1/4] ARM: dts: Add TOPEET itop core board SCP package version
Message-ID<sbfEJ-6Ud-1@gated-at.bofh.it>
In reply to#1471337
On Sun, Aug 28, 2016 at 07:21:06PM +0800, Randy Li wrote:

> +	s5m8767: s5m8767_pmic@66 {
> +		compatible = "samsung,s5m8767-pmic";
> +		reg = <0x66>;

You shouldn't use underscores in node names.
https://www.mail-archive.com/linux-kernel%40vger.kernel.org/msg1122967.html
https://www.mail-archive.com/linux-kernel%40vger.kernel.org/msg1145633.html

-- 
Rask Ingemann Lambertsen

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#1472269 — Re: [PATCH 1/4] ARM: dts: Add TOPEET itop core board SCP package version

FromKrzysztof Kozlowski <krzk@kernel.org>
Date2016-08-30 09:20 +0200
SubjectRe: [PATCH 1/4] ARM: dts: Add TOPEET itop core board SCP package version
Message-ID<sbLuV-1Hg-29@gated-at.bofh.it>
In reply to#1471337
On 08/28/2016 01:21 PM, Randy Li wrote:
> The TOPEET itop is a samsung exnynos 4412 core board, which have
> two package versions. This patch add the support for SCP version.
> 
> Currently supported are USB3503A HSIC, USB OTG, eMMC, rtc and
> PMIC. The future features are in the based board. Also MFC and
> watchdog have been enabled.
> 
> Signed-off-by: Randy Li <ayaka@soulik.info>
> ---
>  arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi | 489 ++++++++++++++++++++++++
>  1 file changed, 489 insertions(+)
>  create mode 100644 arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi
> 
> diff --git a/arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi b/arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi
> new file mode 100644
> index 0000000..ce5076c
> --- /dev/null
> +++ b/arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi
> @@ -0,0 +1,489 @@
> +/*
> + * TOPEET's Exynos4412 based itop board device tree source
> + *
> + * Copyright (c) 2016 SUMOMO Computer Association
> + *			https://www.sumomo.mobi
> + *			Randy Li <ayaka@soulik.info>
> + *			
> + * Device tree source file for TOPEET iTop Exynos 4412 SCP package core 
> + * board which is based on Samsung's Exynos4412 SoC.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> +*/
> +
> +#include "exynos4412.dtsi"
> +#include "exynos4412-ppmu-common.dtsi"
> +#include "exynos-mfc-reserved-memory.dtsi"
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/input/input.h>

First system-wide includes, then local ones.

> +
> +/ {
> +	memory {
> +		reg = <0x40000000 0x40000000>;
> +	};
> +
> +	firmware@0203F000 {
> +		compatible = "samsung,secure-firmware";
> +		reg = <0x0203F000 0x1000>;
> +	};
> +
> +	fixed-rate-clocks {
> +		xxti {
> +			compatible = "samsung,clock-xxti";
> +			clock-frequency = <0>;
> +		};
> +
> +		xusbxti {
> +			compatible = "samsung,clock-xusbxti";
> +			clock-frequency = <24000000>;
> +		};
> +
> +		/* Clock from S5M8767A AP32K */
> +		ap32k: xrtcxti {
> +			compatible = "fixed-clock";
> +			#clock-cells = <0>;
> +			clock-frequency = <32768000>;

1. 32 MHz? Usually it is 32 kHz... Did you test these DTS?
2. Please use existing S5M8767 driver.


> +		};
> +	};
> +
> +	thermal-zones {
> +		cpu_thermal: cpu-thermal {
> +			cooling-maps {
> +				map0 {
> +				     /* Corresponds to 800MHz at freq_table */
> +				     cooling-device = <&cpu0 7 7>;
> +				};
> +				map1 {
> +				     /* Corresponds to 200MHz at freq_table */
> +				     cooling-device = <&cpu0 13 13>;
> +			       };
> +		       };
> +		};
> +	};
> +
> +	usb-hub {

> +		compatible = "smsc,usb3503a";

Floating USB hub? Isn't it connected to SoC through I2C?

> +		reset-gpios = <&gpm2 4 GPIO_ACTIVE_LOW>;
> +		connect-gpios = <&gpm3 3 GPIO_ACTIVE_HIGH>;
> +		intn-gpios = <&gpx2 3 GPIO_ACTIVE_HIGH>;
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&hsic_reset>;
> +	};
> +};
> +
> +&bus_dmc {
> +	devfreq-events = <&ppmu_dmc0_3>, <&ppmu_dmc1_3>;
> +	vdd-supply = <&buck1_reg>;
> +	status = "okay";
> +};
> +
> +&bus_acp {
> +        devfreq = <&bus_dmc>;
> +        status = "okay";
> +};
> +
> +&bus_c2c {
> +        devfreq = <&bus_dmc>;
> +        status = "okay";
> +};
> +
> +&bus_leftbus {
> +        devfreq-events = <&ppmu_leftbus_3>, <&ppmu_rightbus_3>;
> +        vdd-supply = <&buck3_reg>;
> +        status = "okay";
> +};
> +
> +&bus_rightbus {
> +        devfreq = <&bus_leftbus>;
> +        status = "okay";
> +};
> +
> +&bus_fsys {
> +        devfreq = <&bus_leftbus>;
> +        status = "okay";
> +};
> +
> +&bus_peri {
> +        devfreq = <&bus_leftbus>;
> +        status = "okay";
> +};
> +
> +&bus_mfc {
> +        devfreq = <&bus_leftbus>;
> +        status = "okay";
> +};
> +
> +&cpu0 {
> +	cpu0-supply = <&buck2_reg>;
> +};
> +
> +&i2c_1 {
> +	#address-cells = <1>;
> +	#size-cells = <0>;
> +	samsung,i2c-sda-delay = <100>;
> +	samsung,i2c-max-bus-freq = <400000>;
> +	pinctrl-0 = <&i2c1_bus>;
> +	pinctrl-names = "default";
> +	status = "okay";
> +
> +	s5m8767: s5m8767_pmic@66 {
> +		compatible = "samsung,s5m8767-pmic";
> +		reg = <0x66>;
> +
> +		s5m8767,pmic-buck-default-dvs-idx = <3>;
> +
> +		s5m8767,pmic-buck-dvs-gpios = <&gpb 5 GPIO_ACTIVE_HIGH>,
> +						 <&gpb 6 GPIO_ACTIVE_HIGH>,
> +						 <&gpb 7 GPIO_ACTIVE_HIGH>;
> +
> +		s5m8767,pmic-buck-ds-gpios = <&gpm3 5 GPIO_ACTIVE_HIGH>,
> +						<&gpm3 6 GPIO_ACTIVE_HIGH>,
> +						<&gpm3 7 GPIO_ACTIVE_HIGH>;
> +
> +		/* VDD_ARM */
> +		s5m8767,pmic-buck2-dvs-voltage = <1356250>, <1300000>,
> +						 <1243750>, <1118750>,
> +						 <1068750>, <1012500>,
> +						 <956250>, <900000>;
> +		/* VDD_INT */
> +		s5m8767,pmic-buck3-dvs-voltage = <1000000>, <1000000>,
> +						 <925000>, <925000>,
> +						 <887500>, <887500>,
> +						 <850000>, <850000>;
> +		/* VDD_G3D */
> +		s5m8767,pmic-buck4-dvs-voltage = <1081250>, <1081250>,
> +						 <1025000>, <950000>,
> +						 <918750>, <900000>,
> +						 <875000>, <831250>;
> +
> +		regulators {
> +			ldo1_reg: LDO1 {
> +				regulator-name = "VDD_ALIVE";
> +				regulator-min-microvolt = <1100000>;
> +				regulator-max-microvolt = <1100000>;
> +				regulator-always-on;
> +				regulator-boot-on;
> +				op_mode = <1>; /* Normal Mode */
> +			};
> +
> +			/* SCP uses 1.5v, POP uses 1.2v */
> +			ldo2_reg: LDO2 {
> +				regulator-name = "VDDQ_M12";
> +				regulator-min-microvolt = <1500000>;
> +				regulator-max-microvolt = <1500000>;
> +				regulator-always-on;
> +				regulator-boot-on;
> +				op_mode = <1>; /* Normal Mode */
> +			};
> +
> +			ldo3_reg: LDO3 {
> +				regulator-name = "VDDIOAP_18";
> +				regulator-min-microvolt = <1800000>;
> +				regulator-max-microvolt = <1800000>;
> +				regulator-always-on;
> +				op_mode = <1>; /* Normal Mode */
> +			};
> +
> +			ldo4_reg: LDO4 {
> +				regulator-name = "VDDQ_PRE";
> +				regulator-min-microvolt = <1800000>;
> +				regulator-max-microvolt = <1800000>;
> +				regulator-always-on;
> +				op_mode = <1>; /* Normal Mode */
> +			};
> +
> +			ldo6_reg: LDO6 {
> +				regulator-name = "VDD10_MPLL";
> +				regulator-min-microvolt = <1000000>;
> +				regulator-max-microvolt = <1000000>;
> +				regulator-always-on;
> +				op_mode = <1>; /* Normal Mode */
> +			};
> +
> +			ldo7_reg: LDO7 {
> +				regulator-name = "VDD10_XPLL";
> +				regulator-min-microvolt = <1000000>;
> +				regulator-max-microvolt = <1000000>;
> +				regulator-always-on;
> +				op_mode = <1>; /* Normal Mode */
> +			};
> +
> +			ldo8_reg: LDO8 {
> +				regulator-name = "VDD10_MIPI";
> +				regulator-min-microvolt = <1000000>;
> +				regulator-max-microvolt = <1000000>;
> +				op_mode = <1>; /* Normal Mode */
> +			};
> +
> +			ldo9_reg: LDO9 {
> +				regulator-name = "VDD33_LCD";
> +				regulator-min-microvolt = <3300000>;
> +				regulator-max-microvolt = <3300000>;
> +				op_mode = <1>; /* Normal Mode */
> +			};
> +
> +			ldo10_reg: LDO10 {
> +				regulator-name = "VDD18_MIPI";
> +				regulator-min-microvolt = <1800000>;
> +				regulator-max-microvolt = <1800000>;
> +				op_mode = <1>; /* Normal Mode */
> +			};
> +
> +			ldo11_reg: LDO11 {
> +				regulator-name = "VDD18_ABB1";
> +				regulator-min-microvolt = <1800000>;
> +				regulator-max-microvolt = <1800000>;
> +				regulator-always-on;
> +				op_mode = <1>; /* Normal Mode */
> +			};
> +
> +			ldo12_reg: LDO12 {
> +				regulator-name = "VDD33_UOTG";
> +				regulator-min-microvolt = <3300000>;
> +				regulator-max-microvolt = <3300000>;
> +				regulator-always-on;
> +				op_mode = <1>; /* Normal Mode */
> +			};
> +
> +			ldo13_reg: LDO13 {
> +				regulator-name = "VDDIOPERI_18";
> +				regulator-min-microvolt = <1800000>;
> +				regulator-max-microvolt = <1800000>;
> +				regulator-always-on;
> +				op_mode = <1>; /* Normal Mode */
> +			};
> +
> +			ldo14_reg: LDO14 {
> +				regulator-name = "VDD18_ABB02";
> +				regulator-min-microvolt = <1800000>;
> +				regulator-max-microvolt = <1800000>;
> +				regulator-always-on;
> +				op_mode = <1>; /* Normal Mode */
> +			};
> +
> +			ldo15_reg: LDO15 {
> +				regulator-name = "VDD10_USH";
> +				regulator-min-microvolt = <1000000>;
> +				regulator-max-microvolt = <1000000>;
> +				regulator-always-on;
> +				op_mode = <1>; /* Normal Mode */
> +			};
> +
> +			ldo16_reg: LDO16 {
> +				regulator-name = "VDD18_HSIC";
> +				regulator-min-microvolt = <1800000>;
> +				regulator-max-microvolt = <1800000>;
> +				regulator-always-on;
> +				op_mode = <1>; /* Normal Mode */
> +			};
> +
> +			ldo17_reg: LDO17 {
> +				regulator-name = "VDDIOAP_MMC012_28";
> +				regulator-min-microvolt = <2800000>;
> +				regulator-max-microvolt = <2800000>;
> +				op_mode = <1>; /* Normal Mode */
> +			};
> +
> +			/* Used by HSIC */
> +			ldo18_reg: LDO18 {
> +				regulator-name = "VDDIOPERI_28";
> +				regulator-min-microvolt = <3300000>;
> +				regulator-max-microvolt = <3300000>;
> +				regulator-always-on;
> +				op_mode = <1>; /* Normal Mode */
> +			};
> +
> +			ldo20_reg: LDO20 {
> +				regulator-name = "VDD28_CAM";
> +				regulator-min-microvolt = <1800000>;
> +				regulator-max-microvolt = <2800000>;
> +				op_mode = <1>; /* Normal Mode */
> +			};
> +
> +			ldo21_reg: LDO21 {
> +				regulator-name = "VDD28_AF";
> +				regulator-min-microvolt = <1800000>;
> +				regulator-max-microvolt = <2800000>;
> +				op_mode = <1>; /* Normal Mode */
> +			};
> +
> +			ldo22_reg: LDO22 {
> +				regulator-name = "VDDA28_2M";
> +				regulator-min-microvolt = <2800000>;
> +				regulator-max-microvolt = <2800000>;
> +				op_mode = <1>; /* Normal Mode */
> +			};
> +
> +			ldo23_reg: LDO23 {
> +				regulator-name = "VDD28_TF";
> +				regulator-min-microvolt = <2800000>;
> +				regulator-max-microvolt = <2800000>;
> +				op_mode = <1>; /* Normal Mode */
> +			};
> +
> +			ldo24_reg: LDO24 {
> +				regulator-name = "VDD33_A31";
> +				regulator-min-microvolt = <3300000>;
> +				regulator-max-microvolt = <3300000>;
> +				op_mode = <1>; /* Normal Mode */
> +			};
> +
> +			ldo25_reg: LDO25 {
> +				regulator-name = "VDD18_CAM";
> +				regulator-min-microvolt = <1800000>;
> +				regulator-max-microvolt = <1800000>;
> +				op_mode = <1>; /* Normal Mode */
> +			};
> +
> +			ldo26_reg: LDO26 {
> +				regulator-name = "VDD18_A31";
> +				regulator-min-microvolt = <1800000>;
> +				regulator-max-microvolt = <1800000>;
> +				op_mode = <1>; /* Normal Mode */
> +			};
> +
> +			ldo27_reg: LDO27 {
> +				regulator-name = "GPS_1V8";
> +				regulator-min-microvolt = <1800000>;
> +				regulator-max-microvolt = <1800000>;
> +				op_mode = <1>; /* Normal Mode */
> +			};
> +
> +			ldo28_reg: LDO28 {
> +				regulator-name = "DVDD12";
> +				regulator-min-microvolt = <1200000>;
> +				regulator-max-microvolt = <1200000>;
> +				op_mode = <1>; /* Normal Mode */
> +			};
> +
> +			buck1_reg: BUCK1 {
> +				regulator-name = "vdd_mif";
> +				regulator-min-microvolt = <850000>;
> +				regulator-max-microvolt	= <1100000>;
> +				regulator-always-on;
> +				regulator-boot-on;
> +				op_mode = <1>; /* Normal Mode */
> +			};
> +
> +			buck2_reg: BUCK2 {
> +				regulator-name = "vdd_arm";
> +				regulator-min-microvolt = <850000>;
> +				regulator-max-microvolt	= <1456250>;
> +				regulator-always-on;
> +				regulator-boot-on;
> +				op_mode = <1>; /* Normal Mode */
> +			};
> +
> +			buck3_reg: BUCK3 {
> +				regulator-name = "vdd_int";
> +				regulator-min-microvolt = <875000>;
> +				regulator-max-microvolt	= <1200000>;
> +				regulator-always-on;
> +				regulator-boot-on;
> +				op_mode = <1>; /* Normal Mode */
> +			};
> +
> +			buck4_reg: BUCK4 {
> +				regulator-name = "vdd_g3d";
> +				regulator-min-microvolt = <750000>;
> +				regulator-max-microvolt	= <1500000>;
> +				regulator-always-on;
> +				regulator-boot-on;
> +				op_mode = <1>; /* Normal Mode */
> +			};
> +
> +			buck5_reg: BUCK5 {
> +				regulator-name = "vdd_m12";
> +				regulator-min-microvolt = <750000>;
> +				regulator-max-microvolt	= <1500000>;
> +				regulator-always-on;
> +				regulator-boot-on;
> +				op_mode = <1>; /* Normal Mode */
> +			};
> +
> +			buck6_reg: BUCK6 {
> +				regulator-name = "vdd12_5m";
> +				regulator-min-microvolt = <750000>;
> +				regulator-max-microvolt	= <1500000>;
> +				regulator-always-on;
> +				regulator-boot-on;
> +				op_mode = <1>; /* Normal Mode */
> +			};
> +
> +			buck7_reg: BUCK7 {
> +				regulator-name = "pvdd_buck7";
> +				regulator-min-microvolt = <750000>;
> +				regulator-max-microvolt	= <2000000>;
> +				regulator-boot-on;
> +				regulator-always-on;
> +				op_mode = <1>; /* Normal Mode */
> +			};
> +
> +			buck8_reg: BUCK8 {
> +				regulator-name = "pvdd_buck8";
> +				regulator-min-microvolt = <750000>;
> +				regulator-max-microvolt	= <1500000>;
> +				regulator-boot-on;
> +				regulator-always-on;
> +				op_mode = <1>; /* Normal Mode */
> +			};
> +
> +			buck9_reg: BUCK9 {
> +				regulator-name = "vddf28_emmc";
> +				regulator-min-microvolt = <750000>;
> +				regulator-max-microvolt	= <3000000>;
> +				op_mode = <1>; /* Normal Mode */
> +			};
> +		};
> +	};
> +};
> +
> +&pinctrl_1 {

Please put it in alphabetical order.

> +	hsic_reset: hsic-reset {
> +		samsung,pins = "gpm2-4";
> +		samsung,pin-function = <1>;
> +		samsung,pin-pud = <0>;
> +		samsung,pin-drv = <3>;
> +	};
> +};
> +
> +&mfc {
> +	status = "okay";
> +};
> +
> +&mshc_0 {
> +	pinctrl-0 = <&sd4_clk &sd4_cmd &sd4_bus4 &sd4_bus8>;
> +	pinctrl-names = "default";
> +	status = "okay";
> +	vmmc-supply = <&buck9_reg>;
> +	num-slots = <1>;
> +	broken-cd;
> +	card-detect-delay = <200>;
> +	samsung,dw-mshc-ciu-div = <3>;
> +	samsung,dw-mshc-sdr-timing = <2 3>;
> +	samsung,dw-mshc-ddr-timing = <1 2>;
> +	bus-width = <8>;
> +	cap-mmc-highspeed;
> +};
> +
> +&hsotg {

Please put it in alphabetical order.

> +	vusb_d-supply = <&ldo15_reg>;
> +	vusb_a-supply = <&ldo12_reg>;
> +};
> +
> +&rtc {
> +	status = "okay";
> +	clocks = <&clock CLK_RTC>, <&ap32k>;

Use S5M8767/S2MPS bindings for AP clock.

> +	clock-names = "rtc", "rtc_src";
> +};
> +
> +&watchdog {

Please put it in alphabetical order.

Best regards,
Krzysztof

> +	status = "okay";
> +};
> +
> +&tmu {
> +	vtmu-supply = <&ldo16_reg>;
> +	status = "okay";
> +};
> 

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#1473436 — [RESEND PATCH 1/3] ARM: dts: Add TOPEET itop core board SCP package version

FromRandy Li <ayaka@soulik.info>
Date2016-08-31 15:00 +0200
Subject[RESEND PATCH 1/3] ARM: dts: Add TOPEET itop core board SCP package version
Message-ID<scdhv-2vG-13@gated-at.bofh.it>
In reply to#1472269
The TOPEET itop is a samsung exnynos 4412 core board, which have
two package versions. This patch add the support for SCP version.

Currently supported are USB3503A HSIC, USB OTG, eMMC, rtc and
PMIC. The future features are in the based board. Also MFC and
watchdog have been enabled.

Signed-off-by: Randy Li <ayaka@soulik.info>
---
 arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi | 490 ++++++++++++++++++++++++
 1 file changed, 490 insertions(+)
 create mode 100644 arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi

diff --git a/arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi b/arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi
new file mode 100644
index 0000000..9c02b16
--- /dev/null
+++ b/arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi
@@ -0,0 +1,490 @@
+/*
+ * TOPEET's Exynos4412 based itop board device tree source
+ *
+ * Copyright (c) 2016 SUMOMO Computer Association
+ *			https://www.sumomo.mobi
+ *			Randy Li <ayaka@soulik.info>
+ *			
+ * Device tree source file for TOPEET iTop Exynos 4412 SCP package core 
+ * board which is based on Samsung's Exynos4412 SoC.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/clock/samsung,s2mps11.h>
+#include "exynos4412.dtsi"
+#include "exynos4412-ppmu-common.dtsi"
+#include "exynos-mfc-reserved-memory.dtsi"
+
+/ {
+	memory {
+		reg = <0x40000000 0x40000000>;
+	};
+
+	firmware@0203F000 {
+		compatible = "samsung,secure-firmware";
+		reg = <0x0203F000 0x1000>;
+	};
+
+	fixed-rate-clocks {
+		xxti {
+			compatible = "samsung,clock-xxti";
+			clock-frequency = <0>;
+		};
+
+		xusbxti {
+			compatible = "samsung,clock-xusbxti";
+			clock-frequency = <24000000>;
+		};
+	};
+
+	thermal-zones {
+		cpu_thermal: cpu-thermal {
+			cooling-maps {
+				map0 {
+				     /* Corresponds to 800MHz at freq_table */
+				     cooling-device = <&cpu0 7 7>;
+				};
+				map1 {
+				     /* Corresponds to 200MHz at freq_table */
+				     cooling-device = <&cpu0 13 13>;
+			       };
+		       };
+		};
+	};
+
+	usb-hub {
+		compatible = "smsc,usb3503a";
+		reset-gpios = <&gpm2 4 GPIO_ACTIVE_LOW>;
+		connect-gpios = <&gpm3 3 GPIO_ACTIVE_HIGH>;
+		intn-gpios = <&gpx2 3 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&hsic_reset>;
+	};
+};
+
+&bus_dmc {
+	devfreq-events = <&ppmu_dmc0_3>, <&ppmu_dmc1_3>;
+	vdd-supply = <&buck1_reg>;
+	status = "okay";
+};
+
+&bus_acp {
+        devfreq = <&bus_dmc>;
+        status = "okay";
+};
+
+&bus_c2c {
+        devfreq = <&bus_dmc>;
+        status = "okay";
+};
+
+&bus_leftbus {
+        devfreq-events = <&ppmu_leftbus_3>, <&ppmu_rightbus_3>;
+        vdd-supply = <&buck3_reg>;
+        status = "okay";
+};
+
+&bus_rightbus {
+        devfreq = <&bus_leftbus>;
+        status = "okay";
+};
+
+&bus_fsys {
+        devfreq = <&bus_leftbus>;
+        status = "okay";
+};
+
+&bus_peri {
+        devfreq = <&bus_leftbus>;
+        status = "okay";
+};
+
+&bus_mfc {
+        devfreq = <&bus_leftbus>;
+        status = "okay";
+};
+
+&cpu0 {
+	cpu0-supply = <&buck2_reg>;
+};
+
+&hsotg {
+	vusb_d-supply = <&ldo15_reg>;
+	vusb_a-supply = <&ldo12_reg>;
+};
+
+&i2c_1 {
+	#address-cells = <1>;
+	#size-cells = <0>;
+	samsung,i2c-sda-delay = <100>;
+	samsung,i2c-max-bus-freq = <400000>;
+	pinctrl-0 = <&i2c1_bus>;
+	pinctrl-names = "default";
+	status = "okay";
+
+	s5m8767: s5m8767_pmic@66 {
+		compatible = "samsung,s5m8767-pmic";
+		reg = <0x66>;
+
+		s5m8767,pmic-buck-default-dvs-idx = <3>;
+
+		s5m8767,pmic-buck-dvs-gpios = <&gpb 5 GPIO_ACTIVE_HIGH>,
+						 <&gpb 6 GPIO_ACTIVE_HIGH>,
+						 <&gpb 7 GPIO_ACTIVE_HIGH>;
+
+		s5m8767,pmic-buck-ds-gpios = <&gpm3 5 GPIO_ACTIVE_HIGH>,
+						<&gpm3 6 GPIO_ACTIVE_HIGH>,
+						<&gpm3 7 GPIO_ACTIVE_HIGH>;
+
+		/* VDD_ARM */
+		s5m8767,pmic-buck2-dvs-voltage = <1356250>, <1300000>,
+						 <1243750>, <1118750>,
+						 <1068750>, <1012500>,
+						 <956250>, <900000>;
+		/* VDD_INT */
+		s5m8767,pmic-buck3-dvs-voltage = <1000000>, <1000000>,
+						 <925000>, <925000>,
+						 <887500>, <887500>,
+						 <850000>, <850000>;
+		/* VDD_G3D */
+		s5m8767,pmic-buck4-dvs-voltage = <1081250>, <1081250>,
+						 <1025000>, <950000>,
+						 <918750>, <900000>,
+						 <875000>, <831250>;
+
+		regulators {
+			ldo1_reg: LDO1 {
+				regulator-name = "VDD_ALIVE";
+				regulator-min-microvolt = <1100000>;
+				regulator-max-microvolt = <1100000>;
+				regulator-always-on;
+				regulator-boot-on;
+				op_mode = <1>; /* Normal Mode */
+			};
+
+			/* SCP uses 1.5v, POP uses 1.2v */
+			ldo2_reg: LDO2 {
+				regulator-name = "VDDQ_M12";
+				regulator-min-microvolt = <1500000>;
+				regulator-max-microvolt = <1500000>;
+				regulator-always-on;
+				regulator-boot-on;
+				op_mode = <1>; /* Normal Mode */
+			};
+
+			ldo3_reg: LDO3 {
+				regulator-name = "VDDIOAP_18";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-always-on;
+				op_mode = <1>; /* Normal Mode */
+			};
+
+			ldo4_reg: LDO4 {
+				regulator-name = "VDDQ_PRE";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-always-on;
+				op_mode = <1>; /* Normal Mode */
+			};
+
+			ldo6_reg: LDO6 {
+				regulator-name = "VDD10_MPLL";
+				regulator-min-microvolt = <1000000>;
+				regulator-max-microvolt = <1000000>;
+				regulator-always-on;
+				op_mode = <1>; /* Normal Mode */
+			};
+
+			ldo7_reg: LDO7 {
+				regulator-name = "VDD10_XPLL";
+				regulator-min-microvolt = <1000000>;
+				regulator-max-microvolt = <1000000>;
+				regulator-always-on;
+				op_mode = <1>; /* Normal Mode */
+			};
+
+			ldo8_reg: LDO8 {
+				regulator-name = "VDD10_MIPI";
+				regulator-min-microvolt = <1000000>;
+				regulator-max-microvolt = <1000000>;
+				op_mode = <1>; /* Normal Mode */
+			};
+
+			ldo9_reg: LDO9 {
+				regulator-name = "VDD33_LCD";
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+				op_mode = <1>; /* Normal Mode */
+			};
+
+			ldo10_reg: LDO10 {
+				regulator-name = "VDD18_MIPI";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				op_mode = <1>; /* Normal Mode */
+			};
+
+			ldo11_reg: LDO11 {
+				regulator-name = "VDD18_ABB1";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-always-on;
+				op_mode = <1>; /* Normal Mode */
+			};
+
+			ldo12_reg: LDO12 {
+				regulator-name = "VDD33_UOTG";
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-always-on;
+				op_mode = <1>; /* Normal Mode */
+			};
+
+			ldo13_reg: LDO13 {
+				regulator-name = "VDDIOPERI_18";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-always-on;
+				op_mode = <1>; /* Normal Mode */
+			};
+
+			ldo14_reg: LDO14 {
+				regulator-name = "VDD18_ABB02";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-always-on;
+				op_mode = <1>; /* Normal Mode */
+			};
+
+			ldo15_reg: LDO15 {
+				regulator-name = "VDD10_USH";
+				regulator-min-microvolt = <1000000>;
+				regulator-max-microvolt = <1000000>;
+				regulator-always-on;
+				op_mode = <1>; /* Normal Mode */
+			};
+
+			ldo16_reg: LDO16 {
+				regulator-name = "VDD18_HSIC";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-always-on;
+				op_mode = <1>; /* Normal Mode */
+			};
+
+			ldo17_reg: LDO17 {
+				regulator-name = "VDDIOAP_MMC012_28";
+				regulator-min-microvolt = <2800000>;
+				regulator-max-microvolt = <2800000>;
+				op_mode = <1>; /* Normal Mode */
+			};
+
+			/* Used by HSIC */
+			ldo18_reg: LDO18 {
+				regulator-name = "VDDIOPERI_28";
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-always-on;
+				op_mode = <1>; /* Normal Mode */
+			};
+
+			ldo20_reg: LDO20 {
+				regulator-name = "VDD28_CAM";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <2800000>;
+				op_mode = <1>; /* Normal Mode */
+			};
+
+			ldo21_reg: LDO21 {
+				regulator-name = "VDD28_AF";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <2800000>;
+				op_mode = <1>; /* Normal Mode */
+			};
+
+			ldo22_reg: LDO22 {
+				regulator-name = "VDDA28_2M";
+				regulator-min-microvolt = <2800000>;
+				regulator-max-microvolt = <2800000>;
+				op_mode = <1>; /* Normal Mode */
+			};
+
+			ldo23_reg: LDO23 {
+				regulator-name = "VDD28_TF";
+				regulator-min-microvolt = <2800000>;
+				regulator-max-microvolt = <2800000>;
+				op_mode = <1>; /* Normal Mode */
+			};
+
+			ldo24_reg: LDO24 {
+				regulator-name = "VDD33_A31";
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+				op_mode = <1>; /* Normal Mode */
+			};
+
+			ldo25_reg: LDO25 {
+				regulator-name = "VDD18_CAM";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				op_mode = <1>; /* Normal Mode */
+			};
+
+			ldo26_reg: LDO26 {
+				regulator-name = "VDD18_A31";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				op_mode = <1>; /* Normal Mode */
+			};
+
+			ldo27_reg: LDO27 {
+				regulator-name = "GPS_1V8";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				op_mode = <1>; /* Normal Mode */
+			};
+
+			ldo28_reg: LDO28 {
+				regulator-name = "DVDD12";
+				regulator-min-microvolt = <1200000>;
+				regulator-max-microvolt = <1200000>;
+				op_mode = <1>; /* Normal Mode */
+			};
+
+			buck1_reg: BUCK1 {
+				regulator-name = "vdd_mif";
+				regulator-min-microvolt = <850000>;
+				regulator-max-microvolt	= <1100000>;
+				regulator-always-on;
+				regulator-boot-on;
+				op_mode = <1>; /* Normal Mode */
+			};
+
+			buck2_reg: BUCK2 {
+				regulator-name = "vdd_arm";
+				regulator-min-microvolt = <850000>;
+				regulator-max-microvolt	= <1456250>;
+				regulator-always-on;
+				regulator-boot-on;
+				op_mode = <1>; /* Normal Mode */
+			};
+
+			buck3_reg: BUCK3 {
+				regulator-name = "vdd_int";
+				regulator-min-microvolt = <875000>;
+				regulator-max-microvolt	= <1200000>;
+				regulator-always-on;
+				regulator-boot-on;
+				op_mode = <1>; /* Normal Mode */
+			};
+
+			buck4_reg: BUCK4 {
+				regulator-name = "vdd_g3d";
+				regulator-min-microvolt = <750000>;
+				regulator-max-microvolt	= <1500000>;
+				regulator-always-on;
+				regulator-boot-on;
+				op_mode = <1>; /* Normal Mode */
+			};
+
+			buck5_reg: BUCK5 {
+				regulator-name = "vdd_m12";
+				regulator-min-microvolt = <750000>;
+				regulator-max-microvolt	= <1500000>;
+				regulator-always-on;
+				regulator-boot-on;
+				op_mode = <1>; /* Normal Mode */
+			};
+
+			buck6_reg: BUCK6 {
+				regulator-name = "vdd12_5m";
+				regulator-min-microvolt = <750000>;
+				regulator-max-microvolt	= <1500000>;
+				regulator-always-on;
+				regulator-boot-on;
+				op_mode = <1>; /* Normal Mode */
+			};
+
+			buck7_reg: BUCK7 {
+				regulator-name = "pvdd_buck7";
+				regulator-min-microvolt = <750000>;
+				regulator-max-microvolt	= <2000000>;
+				regulator-boot-on;
+				regulator-always-on;
+				op_mode = <1>; /* Normal Mode */
+			};
+
+			buck8_reg: BUCK8 {
+				regulator-name = "pvdd_buck8";
+				regulator-min-microvolt = <750000>;
+				regulator-max-microvolt	= <1500000>;
+				regulator-boot-on;
+				regulator-always-on;
+				op_mode = <1>; /* Normal Mode */
+			};
+
+			buck9_reg: BUCK9 {
+				regulator-name = "vddf28_emmc";
+				regulator-min-microvolt = <750000>;
+				regulator-max-microvolt	= <3000000>;
+				op_mode = <1>; /* Normal Mode */
+			};
+		};
+
+		s5m8767_osc: clocks {
+			#clock-cells = <1>;
+			clock-output-names = "s5m8767_ap",
+					"s5m8767_cp", "s5m8767_bt";
+		};
+
+	};
+};
+
+&mfc {
+	status = "okay";
+};
+
+&mshc_0 {
+	pinctrl-0 = <&sd4_clk &sd4_cmd &sd4_bus4 &sd4_bus8>;
+	pinctrl-names = "default";
+	status = "okay";
+	vmmc-supply = <&buck9_reg>;
+	num-slots = <1>;
+	broken-cd;
+	card-detect-delay = <200>;
+	samsung,dw-mshc-ciu-div = <3>;
+	samsung,dw-mshc-sdr-timing = <2 3>;
+	samsung,dw-mshc-ddr-timing = <1 2>;
+	bus-width = <8>;
+	cap-mmc-highspeed;
+};
+
+&pinctrl_1 {
+	hsic_reset: hsic-reset {
+		samsung,pins = "gpm2-4";
+		samsung,pin-function = <1>;
+		samsung,pin-pud = <0>;
+		samsung,pin-drv = <3>;
+	};
+};
+
+&rtc {
+	status = "okay";
+	clocks = <&clock CLK_RTC>, <&s5m8767_osc S2MPS11_CLK_AP>;
+	clock-names = "rtc", "rtc_src";
+};
+
+&tmu {
+	vtmu-supply = <&ldo16_reg>;
+	status = "okay";
+};
+
+&watchdog {
+	status = "okay";
+};
-- 
2.7.4

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#1473789 — Re: [RESEND PATCH 1/3] ARM: dts: Add TOPEET itop core board SCP package version

FromKrzysztof Kozlowski <krzk@kernel.org>
Date2016-08-31 20:50 +0200
SubjectRe: [RESEND PATCH 1/3] ARM: dts: Add TOPEET itop core board SCP package version
Message-ID<sciKe-5ZB-7@gated-at.bofh.it>
In reply to#1473436
On Wed, Aug 31, 2016 at 08:58:27PM +0800, Randy Li wrote:
> The TOPEET itop is a samsung exnynos 4412 core board, which have
> two package versions. This patch add the support for SCP version.
> 
> Currently supported are USB3503A HSIC, USB OTG, eMMC, rtc and
> PMIC. The future features are in the based board. Also MFC and
> watchdog have been enabled.
> 
> Signed-off-by: Randy Li <ayaka@soulik.info>
> ---
>  arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi | 490 ++++++++++++++++++++++++
>  1 file changed, 490 insertions(+)
>  create mode 100644 arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi

You are not making the review process easier... I asked for:
1. Not chaining the consecutive versions of patchset to the previous
ones. But now you removed chain replies totally (also from patches).
2. Versioning all patches.... but this is a resend of v1?

The changelog and cover letters disappeared...

Please, make it simple:
[PATCH v5 0/3] ARM: dts: exynos: some cover letter etc etc
  \---[PATCH v5 1/3] ARM: dts: exynos: Add TOPEET itop core board SCP
  \---[PATCH v5 2/3] ARM: dts: exynos: something more
  \---[PATCH v5 3/3] ARM: dts: exynos: something even more

git format-patch and git send-email do this by default. In every
sensible mail program this looks like that and is easy to read.

I don't have a clue what happened to these patches and what is current
status...

Best regards,
Krzysztof

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#1473816 — Re: [RESEND PATCH 1/3] ARM: dts: Add TOPEET itop core board SCP package version

FromAyaka <ayaka@soulik.info>
Date2016-08-31 22:00 +0200
SubjectRe: [RESEND PATCH 1/3] ARM: dts: Add TOPEET itop core board SCP package version
Message-ID<scjPY-6Fp-9@gated-at.bofh.it>
In reply to#1473789

從我的 iPad 傳送

> Krzysztof Kozlowski <krzk@kernel.org> 於 2016年9月1日 上午2:42 寫道:
> 
>> On Wed, Aug 31, 2016 at 08:58:27PM +0800, Randy Li wrote:
>> The TOPEET itop is a samsung exnynos 4412 core board, which have
>> two package versions. This patch add the support for SCP version.
>> 
>> Currently supported are USB3503A HSIC, USB OTG, eMMC, rtc and
>> PMIC. The future features are in the based board. Also MFC and
>> watchdog have been enabled.
>> 
>> Signed-off-by: Randy Li <ayaka@soulik.info>
>> ---
>> arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi | 490 ++++++++++++++++++++++++
>> 1 file changed, 490 insertions(+)
>> create mode 100644 arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi
> 
> You are not making the review process easier... I asked for:
> 1. Not chaining the consecutive versions of patchset to the previous
> ones. But now you removed chain replies totally (also from patches).
> 2. Versioning all patches.... but this is a resend of v1?
> 
> The changelog and cover letters disappeared...
> 
> Please, make it simple:
> [PATCH v5 0/3] ARM: dts: exynos: some cover letter etc etc
>  \---[PATCH v5 1/3] ARM: dts: exynos: Add TOPEET itop core board SCP
>  \---[PATCH v5 2/3] ARM: dts: exynos: something more
>  \---[PATCH v5 3/3] ARM: dts: exynos: something even more
> 
> git format-patch and git send-email do this by default. In every
> sensible mail program this looks like that and is easy to read.
I see, sir. I misunderstand your order before(English is not my native). And thank you for you patient guide. I would resend in the morning.
> 
> I don't have a clue what happened to these patches and what is current
> status...
> 
> Best regards,
> Krzysztof

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#1474398 — Re: [RESEND PATCH 1/3] ARM: dts: Add TOPEET itop core board SCP package version

FromBartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Date2016-09-01 15:10 +0200
SubjectRe: [RESEND PATCH 1/3] ARM: dts: Add TOPEET itop core board SCP package version
Message-ID<sczUJ-2jO-17@gated-at.bofh.it>
In reply to#1473436
Hi,

On Wednesday, August 31, 2016 08:58:27 PM Randy Li wrote:
> The TOPEET itop is a samsung exnynos 4412 core board, which have
> two package versions. This patch add the support for SCP version.
> 
> Currently supported are USB3503A HSIC, USB OTG, eMMC, rtc and
> PMIC. The future features are in the based board. Also MFC and
> watchdog have been enabled.
> 
> Signed-off-by: Randy Li <ayaka@soulik.info>
> ---
>  arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi | 490 ++++++++++++++++++++++++
>  1 file changed, 490 insertions(+)
>  create mode 100644 arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi

[...]

> +		s5m8767_osc: clocks {

Don't you also need:

			compatible = "samsung,s5m8767-clk";

here?

BTW Does anyone know why there are no users of
"samsung,s2mps11-clk" compatible in the tree
(commit 53c31b3437a6400c6ffc2c9315680217ad84cb6d
"mfd: sec-core: Add of_compatible strings for
clock MFD cells" added it in March 2014)?

> +			#clock-cells = <1>;
> +			clock-output-names = "s5m8767_ap",
> +					"s5m8767_cp", "s5m8767_bt";
> +		};
> +
> +	};
> +};

[...]

> +&rtc {
> +	status = "okay";
> +	clocks = <&clock CLK_RTC>, <&s5m8767_osc S2MPS11_CLK_AP>;
> +	clock-names = "rtc", "rtc_src";
> +};

Best regards,
--
Bartlomiej Zolnierkiewicz
Samsung R&D Institute Poland
Samsung Electronics

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#1474519 — Re: [RESEND PATCH 1/3] ARM: dts: Add TOPEET itop core board SCP package version

FromKrzysztof Kozlowski <krzk@kernel.org>
Date2016-09-01 18:20 +0200
SubjectRe: [RESEND PATCH 1/3] ARM: dts: Add TOPEET itop core board SCP package version
Message-ID<scCSB-47A-1@gated-at.bofh.it>
In reply to#1474398
On Thu, Sep 01, 2016 at 03:03:51PM +0200, Bartlomiej Zolnierkiewicz wrote:
> 
> Hi,
> 
> On Wednesday, August 31, 2016 08:58:27 PM Randy Li wrote:
> > The TOPEET itop is a samsung exnynos 4412 core board, which have
> > two package versions. This patch add the support for SCP version.
> > 
> > Currently supported are USB3503A HSIC, USB OTG, eMMC, rtc and
> > PMIC. The future features are in the based board. Also MFC and
> > watchdog have been enabled.
> > 
> > Signed-off-by: Randy Li <ayaka@soulik.info>
> > ---
> >  arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi | 490 ++++++++++++++++++++++++
> >  1 file changed, 490 insertions(+)
> >  create mode 100644 arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi
> 
> [...]
> 
> > +		s5m8767_osc: clocks {
> 
> Don't you also need:
> 
> 			compatible = "samsung,s5m8767-clk";
> 
> here?

No specific need... It is confusing but it is the same as with
regulators. The parent MFD driver creates children devices and match
drivers. The children (e.g. clk or regulator driver) look for hard-coded
subnode - clocks/regulators.

The compatible is actually not used in current form.

> BTW Does anyone know why there are no users of
> "samsung,s2mps11-clk" compatible in the tree
> (commit 53c31b3437a6400c6ffc2c9315680217ad84cb6d
> "mfd: sec-core: Add of_compatible strings for
> clock MFD cells" added it in March 2014)?

That is partially my fault. I got convinced by Lee Jones to add
compatibles even there are no users of them. The compatibles could be
added - for Arndale Octa and XU3/XU4. I think the only benefit of that
would be attaching the clock driver to the of_node.

Best regards,
Krzysztof

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#1471338 — [PATCH 3/4] ARM: dts: add fimc support in exynos4412 TOPEET iTop Elite board

FromRandy Li <ayaka@soulik.info>
Date2016-08-28 13:30 +0200
Subject[PATCH 3/4] ARM: dts: add fimc support in exynos4412 TOPEET iTop Elite board
Message-ID<sb6rM-12n-21@gated-at.bofh.it>
In reply to#1471336
The is not used for camera, I enabled it just for a colorspace
convertor.

Signed-off-by: Randy Li <ayaka@soulik.info>
---
 arch/arm/boot/dts/exynos4412-itop-elite.dts | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/arch/arm/boot/dts/exynos4412-itop-elite.dts b/arch/arm/boot/dts/exynos4412-itop-elite.dts
index 5688589..2d11b9a 100644
--- a/arch/arm/boot/dts/exynos4412-itop-elite.dts
+++ b/arch/arm/boot/dts/exynos4412-itop-elite.dts
@@ -82,6 +82,14 @@
 		pinctrl-0 = <&pwm0_out>;
 		pinctrl-names = "default";
 	};
+
+	camera: camera {
+		pinctrl-0 = <&cam_port_a_clk_active>;
+		pinctrl-names = "default";
+		status = "okay";
+		assigned-clocks = <&clock CLK_MOUT_CAM0>;
+		assigned-clock-parents = <&clock CLK_XUSBXTI>;
+	};
 };
 
 &pinctrl_1 {
@@ -146,3 +154,11 @@
 	vdd-supply = <&ldo3_reg>;
 	status = "okay";
 };
+
+&fimc_0 {
+	status = "okay";
+	assigned-clocks = <&clock CLK_MOUT_FIMC0>,
+			<&clock CLK_SCLK_FIMC0>;
+	assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
+	assigned-clock-rates = <0>, <176000000>;
+};
-- 
2.7.4

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#1472276 — Re: [PATCH 3/4] ARM: dts: add fimc support in exynos4412 TOPEET iTop Elite board

FromKrzysztof Kozlowski <krzk@kernel.org>
Date2016-08-30 09:40 +0200
SubjectRe: [PATCH 3/4] ARM: dts: add fimc support in exynos4412 TOPEET iTop Elite board
Message-ID<sbLOh-1No-5@gated-at.bofh.it>
In reply to#1471338
On 08/28/2016 01:21 PM, Randy Li wrote:
> The is not used for camera, I enabled it just for a colorspace
> convertor.
> 
> Signed-off-by: Randy Li <ayaka@soulik.info>
> ---
>  arch/arm/boot/dts/exynos4412-itop-elite.dts | 16 ++++++++++++++++

This should be squashed with patch #2.

BTW, please add also vendor prefix
(Documentation/devicetree/bindings/vendor-prefixes.txt).

Best regards,
Krzysztof

>  1 file changed, 16 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/exynos4412-itop-elite.dts b/arch/arm/boot/dts/exynos4412-itop-elite.dts
> index 5688589..2d11b9a 100644
> --- a/arch/arm/boot/dts/exynos4412-itop-elite.dts
> +++ b/arch/arm/boot/dts/exynos4412-itop-elite.dts
> @@ -82,6 +82,14 @@
>  		pinctrl-0 = <&pwm0_out>;
>  		pinctrl-names = "default";
>  	};
> +
> +	camera: camera {
> +		pinctrl-0 = <&cam_port_a_clk_active>;
> +		pinctrl-names = "default";
> +		status = "okay";
> +		assigned-clocks = <&clock CLK_MOUT_CAM0>;
> +		assigned-clock-parents = <&clock CLK_XUSBXTI>;
> +	};
>  };
>  
>  &pinctrl_1 {
> @@ -146,3 +154,11 @@
>  	vdd-supply = <&ldo3_reg>;
>  	status = "okay";
>  };
> +
> +&fimc_0 {
> +	status = "okay";
> +	assigned-clocks = <&clock CLK_MOUT_FIMC0>,
> +			<&clock CLK_SCLK_FIMC0>;
> +	assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
> +	assigned-clock-rates = <0>, <176000000>;
> +};
> 

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#1473448 — [PATCH 3/3 v3] devicetree: bindings: Add vendor prefix for Topeet.

FromRandy Li <ayaka@soulik.info>
Date2016-08-31 15:10 +0200
Subject[PATCH 3/3 v3] devicetree: bindings: Add vendor prefix for Topeet.
Message-ID<scdrb-2O7-27@gated-at.bofh.it>
In reply to#1472276
Add TOPEET, a ARM devlopment board vendor in China mainland.

Signed-off-by: Randy Li <ayaka@soulik.info>
---
 Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt
index 0d9d4d8..1e28cfd 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.txt
+++ b/Documentation/devicetree/bindings/vendor-prefixes.txt
@@ -266,6 +266,7 @@ technologic	Technologic Systems
 thine	THine Electronics, Inc.
 ti	Texas Instruments
 tlm	Trusted Logic Mobility
+topeet  Topeet
 toradex	Toradex AG
 toshiba	Toshiba Corporation
 toumaz	Toumaz
-- 
2.7.4

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#1472265

FromKrzysztof Kozlowski <krzk@kernel.org>
Date2016-08-30 09:10 +0200
Message-ID<sbLlg-1DW-9@gated-at.bofh.it>
In reply to#1471336
On 08/28/2016 01:21 PM, Randy Li wrote:
> The added the audio codec seems work now, but the audio sounds
> still a little different to the original. But I didn't hear the sound
> in the Android, I don't know whether it is qualified.
> 
> Also it lacks of full pinctrl for the sleep state.
> 
> Changelog:
>  - v3:
>    - fixing the rtc clock, using clock source from PMIC
>    - enable the tmu
>    - enable the fimc for elite board
>    - suuport the audio codec at elite board
>    - fixing minor bugs in the last commit
>  - v2:
>    - removing rtc node
>      the clock source driver is not done yet.
>    - adding exynos-bus
>    - fixing the MFC

The way you send emails is really messed up.
1. The v3 in "PATCH v3" should be present in all patches. Use -v3 for
format-patch.

2. Don't reply-in-to old thread. All your new patches are now under old
ones. They have same subject so this is highly confusing. I don't have a
clue which is a new one.

Best regards,
Krzysztof

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