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Re: [PATCH 1/4] PCI: exynos: replace to one register accessor from each accessors

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  Re: [PATCH 1/4] PCI: exynos: replace to one register accessor from  each accessors Bjorn Helgaas <helgaas@kernel.org> - 2017-01-11 20:00 +0100
    Re: [PATCH 1/4] PCI: exynos: replace to one register accessor from  each accessors Jaehoon Chung <jh80.chung@samsung.com> - 2017-01-12 02:20 +0100

#1556843 — Re: [PATCH 1/4] PCI: exynos: replace to one register accessor from each accessors

Hi Jaehoon,

On Mon, Dec 19, 2016 at 05:16:11PM +0900, Jaehoon Chung wrote:
> There is no reason to maintain *_blk/phy/elbi_* as register accessors.
> It can be replaced to one register accessor.
> 
> Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
> ---
>  drivers/pci/host/pci-exynos.c | 214 +++++++++++++++++++-----------------------
>  1 file changed, 97 insertions(+), 117 deletions(-)
> 
> diff --git a/drivers/pci/host/pci-exynos.c b/drivers/pci/host/pci-exynos.c
> index f1c544b..6dbfa2c 100644
> --- a/drivers/pci/host/pci-exynos.c
> +++ b/drivers/pci/host/pci-exynos.c
> @@ -102,197 +102,175 @@ struct exynos_pcie {
>  #define PCIE_PHY_TRSV3_PD_TSV		(0x1 << 7)
>  #define PCIE_PHY_TRSV3_LVCC		0x31c
>  
> -static void exynos_elb_writel(struct exynos_pcie *exynos_pcie, u32 val, u32 reg)
> +static void exynos_pcie_writel(void __iomem *base, u32 val, u32 reg)
>  {
> -	writel(val, exynos_pcie->elbi_base + reg);
> +	writel(val, base + reg);
>  }
>  
> -static u32 exynos_elb_readl(struct exynos_pcie *exynos_pcie, u32 reg)
> +static u32 exynos_pcie_readl(void __iomem *base, u32 reg)
>  {
> -	return readl(exynos_pcie->elbi_base + reg);
> +	return readl(base + reg);
>  }
>  
> -static void exynos_phy_writel(struct exynos_pcie *exynos_pcie, u32 val, u32 reg)
> -{
> -	writel(val, exynos_pcie->phy_base + reg);
> -}
> -
> -static u32 exynos_phy_readl(struct exynos_pcie *exynos_pcie, u32 reg)
> -{
> -	return readl(exynos_pcie->phy_base + reg);
> -}
> -
> -static void exynos_blk_writel(struct exynos_pcie *exynos_pcie, u32 val, u32 reg)
> -{
> -	writel(val, exynos_pcie->block_base + reg);
> -}
> -
> -static u32 exynos_blk_readl(struct exynos_pcie *exynos_pcie, u32 reg)
> -{
> -	return readl(exynos_pcie->block_base + reg);
> -}
> -
> -static void exynos_pcie_sideband_dbi_w_mode(struct exynos_pcie *exynos_pcie,
> -					    bool on)
> +static void exynos_pcie_sideband_dbi_w_mode(struct exynos_pcie *ep, bool on)

Replacing all the separate accessors with one that takes the base
pointer is OK, but please use the same name for all the "struct
exynos_pcie *" pointers in the whole file.

Before your patch, they were all called "exynos_pci"; after it some
are called "exynos_pci" and some are called "ep".

Bjorn

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#1557039

Hi Bjorn,

On 01/12/2017 03:50 AM, Bjorn Helgaas wrote:
> Hi Jaehoon,
> 
> On Mon, Dec 19, 2016 at 05:16:11PM +0900, Jaehoon Chung wrote:
>> There is no reason to maintain *_blk/phy/elbi_* as register accessors.
>> It can be replaced to one register accessor.
>>
>> Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
>> ---
>>  drivers/pci/host/pci-exynos.c | 214 +++++++++++++++++++-----------------------
>>  1 file changed, 97 insertions(+), 117 deletions(-)
>>
>> diff --git a/drivers/pci/host/pci-exynos.c b/drivers/pci/host/pci-exynos.c
>> index f1c544b..6dbfa2c 100644
>> --- a/drivers/pci/host/pci-exynos.c
>> +++ b/drivers/pci/host/pci-exynos.c
>> @@ -102,197 +102,175 @@ struct exynos_pcie {
>>  #define PCIE_PHY_TRSV3_PD_TSV		(0x1 << 7)
>>  #define PCIE_PHY_TRSV3_LVCC		0x31c
>>  
>> -static void exynos_elb_writel(struct exynos_pcie *exynos_pcie, u32 val, u32 reg)
>> +static void exynos_pcie_writel(void __iomem *base, u32 val, u32 reg)
>>  {
>> -	writel(val, exynos_pcie->elbi_base + reg);
>> +	writel(val, base + reg);
>>  }
>>  
>> -static u32 exynos_elb_readl(struct exynos_pcie *exynos_pcie, u32 reg)
>> +static u32 exynos_pcie_readl(void __iomem *base, u32 reg)
>>  {
>> -	return readl(exynos_pcie->elbi_base + reg);
>> +	return readl(base + reg);
>>  }
>>  
>> -static void exynos_phy_writel(struct exynos_pcie *exynos_pcie, u32 val, u32 reg)
>> -{
>> -	writel(val, exynos_pcie->phy_base + reg);
>> -}
>> -
>> -static u32 exynos_phy_readl(struct exynos_pcie *exynos_pcie, u32 reg)
>> -{
>> -	return readl(exynos_pcie->phy_base + reg);
>> -}
>> -
>> -static void exynos_blk_writel(struct exynos_pcie *exynos_pcie, u32 val, u32 reg)
>> -{
>> -	writel(val, exynos_pcie->block_base + reg);
>> -}
>> -
>> -static u32 exynos_blk_readl(struct exynos_pcie *exynos_pcie, u32 reg)
>> -{
>> -	return readl(exynos_pcie->block_base + reg);
>> -}
>> -
>> -static void exynos_pcie_sideband_dbi_w_mode(struct exynos_pcie *exynos_pcie,
>> -					    bool on)
>> +static void exynos_pcie_sideband_dbi_w_mode(struct exynos_pcie *ep, bool on)
> 
> Replacing all the separate accessors with one that takes the base
> pointer is OK, but please use the same name for all the "struct
> exynos_pcie *" pointers in the whole file.
> 
> Before your patch, they were all called "exynos_pci"; after it some
> are called "exynos_pci" and some are called "ep".

I will use the 'ep' as name, exynos_pcie is a little bit long.
When 'exynos_pcie' is used, some code is need to change lines because of 80 char.
I think it's the meaningless line changing.

I will resend the PATCH v2..also patches relevant to using PHY framework.
After applying everything, i will upstream TM2(Exynos5433) PCIe patches.

Thanks for reviewing.

Best Regards,
Jaehoon Chung

> 
> Bjorn
> --
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> 

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