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Groups > linux.kernel > #1554704 > unrolled thread
| Started by | Nikita Yushchenko <nikita.yoush@cogentembedded.com> |
|---|---|
| First post | 2017-01-09 21:50 +0100 |
| Last post | 2017-01-13 07:20 +0100 |
| Articles | 4 — 3 participants |
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blk_queue_bounce_limit() broken for mask=0xffffffff on 64bit archs Nikita Yushchenko <nikita.yoush@cogentembedded.com> - 2017-01-09 21:50 +0100
Re: blk_queue_bounce_limit() broken for mask=0xffffffff on 64bit archs Christoph Hellwig <hch@infradead.org> - 2017-01-09 22:10 +0100
Re: blk_queue_bounce_limit() broken for mask=0xffffffff on 64bit archs Ming Lei <tom.leiming@gmail.com> - 2017-01-13 07:10 +0100
Re: blk_queue_bounce_limit() broken for mask=0xffffffff on 64bit archs Nikita Yushchenko <nikita.yoush@cogentembedded.com> - 2017-01-13 07:20 +0100
| From | Nikita Yushchenko <nikita.yoush@cogentembedded.com> |
|---|---|
| Date | 2017-01-09 21:50 +0100 |
| Subject | blk_queue_bounce_limit() broken for mask=0xffffffff on 64bit archs |
| Message-ID | <sXP3b-qJ-27@gated-at.bofh.it> |
Hi
There is a use cases when architecture is 64-bit but hardware supports
only DMA to lower 4G of address space. E.g. NVMe device on RCar PCIe host.
For such cases, it looks proper to call blk_queue_bounce_limit() with
mask set to 0xffffffff - thus making block layer to use bounce buffers
for any addresses beyond 4G. To support that, architecture provides
GFP_DMA zone that covers exactly low 4G on arm64.
However setting this limit does not work:
if (b_pfn < (min_t(u64, 0xffffffffUL, BLK_BOUNCE_HIGH) >> PAGE_SHIFT))
dma = 1;
When mask is 0xffffffff that condition is false
q->limits.bounce_pfn = max(max_low_pfn, b_pfn);
this line is executed and replaces any limit with end of memory (on
64bit arch all memory is low).
Not sure how to fix this properly. Any hints?
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| From | Christoph Hellwig <hch@infradead.org> |
|---|---|
| Date | 2017-01-09 22:10 +0100 |
| Subject | Re: blk_queue_bounce_limit() broken for mask=0xffffffff on 64bit archs |
| Message-ID | <sXPmy-Mz-27@gated-at.bofh.it> |
| In reply to | #1554704 |
On Mon, Jan 09, 2017 at 11:48:11PM +0300, Nikita Yushchenko wrote: > Hi > > There is a use cases when architecture is 64-bit but hardware supports > only DMA to lower 4G of address space. E.g. NVMe device on RCar PCIe host. The solution is to shoot the SOC designer. If that doesn't work use swiotlb.
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| From | Ming Lei <tom.leiming@gmail.com> |
|---|---|
| Date | 2017-01-13 07:10 +0100 |
| Message-ID | <sZ3dM-5M4-3@gated-at.bofh.it> |
| In reply to | #1554704 |
Hi, On Tue, Jan 10, 2017 at 4:48 AM, Nikita Yushchenko <nikita.yoush@cogentembedded.com> wrote: > Hi > > There is a use cases when architecture is 64-bit but hardware supports > only DMA to lower 4G of address space. E.g. NVMe device on RCar PCIe host. > > For such cases, it looks proper to call blk_queue_bounce_limit() with > mask set to 0xffffffff - thus making block layer to use bounce buffers > for any addresses beyond 4G. To support that, architecture provides > GFP_DMA zone that covers exactly low 4G on arm64. > > However setting this limit does not work: > > if (b_pfn < (min_t(u64, 0xffffffffUL, BLK_BOUNCE_HIGH) >> PAGE_SHIFT)) > dma = 1; > > When mask is 0xffffffff that condition is false That should have been true in your case, since the b_pfn is smaller than 0xffffffff. > > q->limits.bounce_pfn = max(max_low_pfn, b_pfn); > > this line is executed and replaces any limit with end of memory (on > 64bit arch all memory is low). I don't understand why max() is used? And why not min()? Looks the above line just disables bounce for 64bit arch, doesn't it? Thanks, Ming > > > Not sure how to fix this properly. Any hints? > -- > To unsubscribe from this list: send the line "unsubscribe linux-block" in > the body of a message to majordomo@vger.kernel.org > More majordomo info at http://vger.kernel.org/majordomo-info.html -- Ming Lei
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| From | Nikita Yushchenko <nikita.yoush@cogentembedded.com> |
|---|---|
| Date | 2017-01-13 07:20 +0100 |
| Subject | Re: blk_queue_bounce_limit() broken for mask=0xffffffff on 64bit archs |
| Message-ID | <sZ3nr-5Pk-1@gated-at.bofh.it> |
| In reply to | #1558042 |
>> There is a use cases when architecture is 64-bit but hardware supports >> only DMA to lower 4G of address space. E.g. NVMe device on RCar PCIe host. >> >> For such cases, it looks proper to call blk_queue_bounce_limit() with >> mask set to 0xffffffff - thus making block layer to use bounce buffers >> for any addresses beyond 4G. To support that, architecture provides >> GFP_DMA zone that covers exactly low 4G on arm64. >> >> However setting this limit does not work: >> >> if (b_pfn < (min_t(u64, 0xffffffffUL, BLK_BOUNCE_HIGH) >> PAGE_SHIFT)) >> dma = 1; >> >> When mask is 0xffffffff that condition is false > > That should have been true in your case, since the b_pfn is smaller than > 0xffffffff. b_pfn is exactly 0xffffffffUL >> SHIFT, thus contition is false >> q->limits.bounce_pfn = max(max_low_pfn, b_pfn); >> >> this line is executed and replaces any limit with end of memory (on >> 64bit arch all memory is low). > > I don't understand why max() is used? And why not min()? > > Looks the above line just disables bounce for 64bit arch, doesn't it? Effectively yes. And I don't understand logic behind this code. Nikita
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