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| Started by | "Li, Liang Z" <liang.z.li@intel.com> |
|---|---|
| First post | 2016-12-14 10:10 +0100 |
| Last post | 2016-12-17 13:40 +0100 |
| Articles | 13 — 4 participants |
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RE: [Qemu-devel] [PATCH kernel v5 0/5] Extend virtio-balloon for fast (de)inflating & fast live migration "Li, Liang Z" <liang.z.li@intel.com> - 2016-12-14 10:10 +0100
Re: [Qemu-devel] [PATCH kernel v5 0/5] Extend virtio-balloon for fast (de)inflating & fast live migration Dave Hansen <dave.hansen@intel.com> - 2016-12-15 16:40 +0100
Re: [Qemu-devel] [PATCH kernel v5 0/5] Extend virtio-balloon for fast (de)inflating & fast live migration "Michael S. Tsirkin" <mst@redhat.com> - 2016-12-15 17:00 +0100
RE: [Qemu-devel] [PATCH kernel v5 0/5] Extend virtio-balloon for fast (de)inflating & fast live migration "Li, Liang Z" <liang.z.li@intel.com> - 2016-12-16 02:20 +0100
Re: [Qemu-devel] [PATCH kernel v5 0/5] Extend virtio-balloon for fast (de)inflating & fast live migration Andrea Arcangeli <aarcange@redhat.com> - 2016-12-16 16:50 +0100
RE: [Qemu-devel] [PATCH kernel v5 0/5] Extend virtio-balloon for fast (de)inflating & fast live migration "Li, Liang Z" <liang.z.li@intel.com> - 2016-12-17 13:00 +0100
RE: [Qemu-devel] [PATCH kernel v5 0/5] Extend virtio-balloon for fast (de)inflating & fast live migration "Li, Liang Z" <liang.z.li@intel.com> - 2016-12-16 01:50 +0100
Re: [Qemu-devel] [PATCH kernel v5 0/5] Extend virtio-balloon for fast (de)inflating & fast live migration Dave Hansen <dave.hansen@intel.com> - 2016-12-16 02:20 +0100
RE: [Qemu-devel] [PATCH kernel v5 0/5] Extend virtio-balloon for fast (de)inflating & fast live migration "Li, Liang Z" <liang.z.li@intel.com> - 2016-12-16 02:40 +0100
RE: [Qemu-devel] [PATCH kernel v5 0/5] Extend virtio-balloon for fast (de)inflating & fast live migration "Li, Liang Z" <liang.z.li@intel.com> - 2016-12-16 02:50 +0100
Re: [Qemu-devel] [PATCH kernel v5 0/5] Extend virtio-balloon for fast (de)inflating & fast live migration Dave Hansen <dave.hansen@intel.com> - 2016-12-16 02:50 +0100
Re: [Qemu-devel] [PATCH kernel v5 0/5] Extend virtio-balloon for fast (de)inflating & fast live migration Andrea Arcangeli <aarcange@redhat.com> - 2016-12-16 17:10 +0100
RE: [Qemu-devel] [PATCH kernel v5 0/5] Extend virtio-balloon for fast (de)inflating & fast live migration "Li, Liang Z" <liang.z.li@intel.com> - 2016-12-17 13:40 +0100
| From | "Li, Liang Z" <liang.z.li@intel.com> |
|---|---|
| Date | 2016-12-14 10:10 +0100 |
| Subject | RE: [Qemu-devel] [PATCH kernel v5 0/5] Extend virtio-balloon for fast (de)inflating & fast live migration |
| Message-ID | <sOdJw-4BA-11@gated-at.bofh.it> |
> Subject: Re: [Qemu-devel] [PATCH kernel v5 0/5] Extend virtio-balloon for > fast (de)inflating & fast live migration > > On 12/08/2016 08:45 PM, Li, Liang Z wrote: > > What's the conclusion of your discussion? It seems you want some > > statistic before deciding whether to ripping the bitmap from the ABI, > > am I right? > > I think Andrea and David feel pretty strongly that we should remove the > bitmap, unless we have some data to support keeping it. I don't feel as > strongly about it, but I think their critique of it is pretty valid. I think the > consensus is that the bitmap needs to go. > > The only real question IMNHO is whether we should do a power-of-2 or a > length. But, if we have 12 bits, then the argument for doing length is pretty > strong. We don't need anywhere near 12 bits if doing power-of-2. Just found the MAX_ORDER should be limited to 12 if use length instead of order, If the MAX_ORDER is configured to a value bigger than 12, it will make things more complex to handle this case. If use order, we need to break a large memory range whose length is not the power of 2 into several small ranges, it also make the code complex. It seems we leave too many bit for the pfn, and the bits leave for length is not enough, How about keep 45 bits for the pfn and 19 bits for length, 45 bits for pfn can cover 57 bits physical address, that should be enough in the near feature. What's your opinion? thanks! Liang
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| From | Dave Hansen <dave.hansen@intel.com> |
|---|---|
| Date | 2016-12-15 16:40 +0100 |
| Subject | Re: [Qemu-devel] [PATCH kernel v5 0/5] Extend virtio-balloon for fast (de)inflating & fast live migration |
| Message-ID | <sOGiu-7uh-25@gated-at.bofh.it> |
| In reply to | #1541769 |
On 12/14/2016 12:59 AM, Li, Liang Z wrote: >> Subject: Re: [Qemu-devel] [PATCH kernel v5 0/5] Extend virtio-balloon for >> fast (de)inflating & fast live migration >> >> On 12/08/2016 08:45 PM, Li, Liang Z wrote: >>> What's the conclusion of your discussion? It seems you want some >>> statistic before deciding whether to ripping the bitmap from the ABI, >>> am I right? >> >> I think Andrea and David feel pretty strongly that we should remove the >> bitmap, unless we have some data to support keeping it. I don't feel as >> strongly about it, but I think their critique of it is pretty valid. I think the >> consensus is that the bitmap needs to go. >> >> The only real question IMNHO is whether we should do a power-of-2 or a >> length. But, if we have 12 bits, then the argument for doing length is pretty >> strong. We don't need anywhere near 12 bits if doing power-of-2. > > Just found the MAX_ORDER should be limited to 12 if use length instead of order, > If the MAX_ORDER is configured to a value bigger than 12, it will make things more > complex to handle this case. > > If use order, we need to break a large memory range whose length is not the power of 2 into several > small ranges, it also make the code complex. I can't imagine it makes the code that much more complex. It adds a for loop. Right? > It seems we leave too many bit for the pfn, and the bits leave for length is not enough, > How about keep 45 bits for the pfn and 19 bits for length, 45 bits for pfn can cover 57 bits > physical address, that should be enough in the near feature. > > What's your opinion? I still think 'order' makes a lot of sense. But, as you say, 57 bits is enough for x86 for a while. Other architectures.... who knows?
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| From | "Michael S. Tsirkin" <mst@redhat.com> |
|---|---|
| Date | 2016-12-15 17:00 +0100 |
| Message-ID | <sOGBP-7B0-9@gated-at.bofh.it> |
| In reply to | #1542835 |
On Thu, Dec 15, 2016 at 07:34:33AM -0800, Dave Hansen wrote: > On 12/14/2016 12:59 AM, Li, Liang Z wrote: > >> Subject: Re: [Qemu-devel] [PATCH kernel v5 0/5] Extend virtio-balloon for > >> fast (de)inflating & fast live migration > >> > >> On 12/08/2016 08:45 PM, Li, Liang Z wrote: > >>> What's the conclusion of your discussion? It seems you want some > >>> statistic before deciding whether to ripping the bitmap from the ABI, > >>> am I right? > >> > >> I think Andrea and David feel pretty strongly that we should remove the > >> bitmap, unless we have some data to support keeping it. I don't feel as > >> strongly about it, but I think their critique of it is pretty valid. I think the > >> consensus is that the bitmap needs to go. > >> > >> The only real question IMNHO is whether we should do a power-of-2 or a > >> length. But, if we have 12 bits, then the argument for doing length is pretty > >> strong. We don't need anywhere near 12 bits if doing power-of-2. > > > > Just found the MAX_ORDER should be limited to 12 if use length instead of order, > > If the MAX_ORDER is configured to a value bigger than 12, it will make things more > > complex to handle this case. > > > > If use order, we need to break a large memory range whose length is not the power of 2 into several > > small ranges, it also make the code complex. > > I can't imagine it makes the code that much more complex. It adds a for > loop. Right? > > > It seems we leave too many bit for the pfn, and the bits leave for length is not enough, > > How about keep 45 bits for the pfn and 19 bits for length, 45 bits for pfn can cover 57 bits > > physical address, that should be enough in the near feature. > > > > What's your opinion? > > I still think 'order' makes a lot of sense. But, as you say, 57 bits is > enough for x86 for a while. Other architectures.... who knows? I think you can probably assume page size >= 4K. But I would not want to make any other assumptions. E.g. there are systems that absolutely require you to set high bits for DMA. I think we really want both length and order. I understand how you are trying to pack them as tightly as possible. However, I thought of a trick, we don't need to encode all possible orders. For example, with 2 bits of order, we can make them mean: 00 - 4K pages 01 - 2M pages 02 - 1G pages guest can program the sizes for each order through config space. We will have 10 bits left for legth. It might make sense to also allow guest to program the number of bits used for order, this will make it easy to extend without host changes. -- MST
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| From | "Li, Liang Z" <liang.z.li@intel.com> |
|---|---|
| Date | 2016-12-16 02:20 +0100 |
| Message-ID | <sOPlM-4TI-11@gated-at.bofh.it> |
| In reply to | #1542848 |
> On Thu, Dec 15, 2016 at 07:34:33AM -0800, Dave Hansen wrote: > > On 12/14/2016 12:59 AM, Li, Liang Z wrote: > > >> Subject: Re: [Qemu-devel] [PATCH kernel v5 0/5] Extend > > >> virtio-balloon for fast (de)inflating & fast live migration > > >> > > >> On 12/08/2016 08:45 PM, Li, Liang Z wrote: > > >>> What's the conclusion of your discussion? It seems you want some > > >>> statistic before deciding whether to ripping the bitmap from the > > >>> ABI, am I right? > > >> > > >> I think Andrea and David feel pretty strongly that we should remove > > >> the bitmap, unless we have some data to support keeping it. I > > >> don't feel as strongly about it, but I think their critique of it > > >> is pretty valid. I think the consensus is that the bitmap needs to go. > > >> > > >> The only real question IMNHO is whether we should do a power-of-2 > > >> or a length. But, if we have 12 bits, then the argument for doing > > >> length is pretty strong. We don't need anywhere near 12 bits if doing > power-of-2. > > > > > > Just found the MAX_ORDER should be limited to 12 if use length > > > instead of order, If the MAX_ORDER is configured to a value bigger > > > than 12, it will make things more complex to handle this case. > > > > > > If use order, we need to break a large memory range whose length is > > > not the power of 2 into several small ranges, it also make the code > complex. > > > > I can't imagine it makes the code that much more complex. It adds a > > for loop. Right? > > > > > It seems we leave too many bit for the pfn, and the bits leave for > > > length is not enough, How about keep 45 bits for the pfn and 19 bits > > > for length, 45 bits for pfn can cover 57 bits physical address, that should > be enough in the near feature. > > > > > > What's your opinion? > > > > I still think 'order' makes a lot of sense. But, as you say, 57 bits > > is enough for x86 for a while. Other architectures.... who knows? > > I think you can probably assume page size >= 4K. But I would not want to > make any other assumptions. E.g. there are systems that absolutely require > you to set high bits for DMA. > > I think we really want both length and order. > > I understand how you are trying to pack them as tightly as possible. > > However, I thought of a trick, we don't need to encode all possible orders. > For example, with 2 bits of order, we can make them mean: > 00 - 4K pages > 01 - 2M pages > 02 - 1G pages > > guest can program the sizes for each order through config space. > > We will have 10 bits left for legth. > Please don't, we just get rid of the bitmap for simplification. :) > It might make sense to also allow guest to program the number of bits used > for order, this will make it easy to extend without host changes. > There still exist the case if the MAX_ORDER is configured to a large value, e.g. 36 for a system with huge amount of memory, then there is only 28 bits left for the pfn, which is not enough. Should we limit the MAX_ORDER? I don't think so. It seems use order is better. Thanks! Liang > -- > MST
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| From | Andrea Arcangeli <aarcange@redhat.com> |
|---|---|
| Date | 2016-12-16 16:50 +0100 |
| Message-ID | <sP2VI-5xB-23@gated-at.bofh.it> |
| In reply to | #1543159 |
On Fri, Dec 16, 2016 at 01:12:21AM +0000, Li, Liang Z wrote: > There still exist the case if the MAX_ORDER is configured to a large value, e.g. 36 for a system > with huge amount of memory, then there is only 28 bits left for the pfn, which is not enough. Not related to the balloon but how would it help to set MAX_ORDER to 36? What the MAX_ORDER affects is that you won't be able to ask the kernel page allocator for contiguous memory bigger than 1<<(MAX_ORDER-1), but that's a driver issue not relevant to the amount of RAM. Drivers won't suddenly start to ask the kernel allocator to allocate compound pages at orders >= 11 just because more RAM was added. The higher the MAX_ORDER the slower the kernel runs simply so the smaller the MAX_ORDER the better. > Should we limit the MAX_ORDER? I don't think so. We shouldn't strictly depend on MAX_ORDER value but it's mostly limited already even if configurable at build time. We definitely need it to reach at least the hugepage size, then it's mostly driver issue, but drivers requiring large contiguous allocations should rely on CMA only or vmalloc if they only require it virtually contiguous, and not rely on larger MAX_ORDER that would slowdown all kernel allocations/freeing.
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| From | "Li, Liang Z" <liang.z.li@intel.com> |
|---|---|
| Date | 2016-12-17 13:00 +0100 |
| Message-ID | <sPlOF-Ha-15@gated-at.bofh.it> |
| In reply to | #1543539 |
> On Fri, Dec 16, 2016 at 01:12:21AM +0000, Li, Liang Z wrote: > > There still exist the case if the MAX_ORDER is configured to a large > > value, e.g. 36 for a system with huge amount of memory, then there is only > 28 bits left for the pfn, which is not enough. > > Not related to the balloon but how would it help to set MAX_ORDER to 36? > My point here is MAX_ORDER may be configured to a big value. > What the MAX_ORDER affects is that you won't be able to ask the kernel > page allocator for contiguous memory bigger than 1<<(MAX_ORDER-1), but > that's a driver issue not relevant to the amount of RAM. Drivers won't > suddenly start to ask the kernel allocator to allocate compound pages at > orders >= 11 just because more RAM was added. > > The higher the MAX_ORDER the slower the kernel runs simply so the smaller > the MAX_ORDER the better. > > > Should we limit the MAX_ORDER? I don't think so. > > We shouldn't strictly depend on MAX_ORDER value but it's mostly limited > already even if configurable at build time. > I didn't know that and will take a look, thanks for your information. Liang > We definitely need it to reach at least the hugepage size, then it's mostly > driver issue, but drivers requiring large contiguous allocations should rely on > CMA only or vmalloc if they only require it virtually contiguous, and not rely > on larger MAX_ORDER that would slowdown all kernel allocations/freeing.
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| From | "Li, Liang Z" <liang.z.li@intel.com> |
|---|---|
| Date | 2016-12-16 01:50 +0100 |
| Message-ID | <sOOSJ-4rO-1@gated-at.bofh.it> |
| In reply to | #1542835 |
> Subject: Re: [Qemu-devel] [PATCH kernel v5 0/5] Extend virtio-balloon for > fast (de)inflating & fast live migration > > On 12/14/2016 12:59 AM, Li, Liang Z wrote: > >> Subject: Re: [Qemu-devel] [PATCH kernel v5 0/5] Extend virtio-balloon > >> for fast (de)inflating & fast live migration > >> > >> On 12/08/2016 08:45 PM, Li, Liang Z wrote: > >>> What's the conclusion of your discussion? It seems you want some > >>> statistic before deciding whether to ripping the bitmap from the > >>> ABI, am I right? > >> > >> I think Andrea and David feel pretty strongly that we should remove > >> the bitmap, unless we have some data to support keeping it. I don't > >> feel as strongly about it, but I think their critique of it is pretty > >> valid. I think the consensus is that the bitmap needs to go. > >> > >> The only real question IMNHO is whether we should do a power-of-2 or > >> a length. But, if we have 12 bits, then the argument for doing > >> length is pretty strong. We don't need anywhere near 12 bits if doing > power-of-2. > > > > Just found the MAX_ORDER should be limited to 12 if use length instead > > of order, If the MAX_ORDER is configured to a value bigger than 12, it > > will make things more complex to handle this case. > > > > If use order, we need to break a large memory range whose length is > > not the power of 2 into several small ranges, it also make the code complex. > > I can't imagine it makes the code that much more complex. It adds a for loop. > Right? > Yes, just a little. :) > > It seems we leave too many bit for the pfn, and the bits leave for > > length is not enough, How about keep 45 bits for the pfn and 19 bits > > for length, 45 bits for pfn can cover 57 bits physical address, that should be > enough in the near feature. > > > > What's your opinion? > > I still think 'order' makes a lot of sense. But, as you say, 57 bits is enough for > x86 for a while. Other architectures.... who knows? Yes.
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| From | Dave Hansen <dave.hansen@intel.com> |
|---|---|
| Date | 2016-12-16 02:20 +0100 |
| Subject | Re: [Qemu-devel] [PATCH kernel v5 0/5] Extend virtio-balloon for fast (de)inflating & fast live migration |
| Message-ID | <sOPlM-4TI-9@gated-at.bofh.it> |
| In reply to | #1543149 |
On 12/15/2016 04:48 PM, Li, Liang Z wrote: >>> It seems we leave too many bit for the pfn, and the bits leave for >>> length is not enough, How about keep 45 bits for the pfn and 19 bits >>> for length, 45 bits for pfn can cover 57 bits physical address, that should be >> enough in the near feature. >>> What's your opinion? >> I still think 'order' makes a lot of sense. But, as you say, 57 bits is enough for >> x86 for a while. Other architectures.... who knows? Thinking about this some more... There are really only two cases that matter: 4k pages and "much bigger" ones. Squeezing each 4k page into 8 bytes of metadata helps guarantee that this scheme won't regress over the old scheme in any cases. For bigger ranges, 8 vs 16 bytes means *nothing*. And 16 bytes will be as good or better than the old scheme for everything which is >4k. How about this: * 52 bits of 'pfn', 5 bits of 'order', 7 bits of 'length' * One special 'length' value to mean "actual length in next 8 bytes" That should be pretty simple to produce and decode. We have two record sizes, but I think it is manageable.
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| From | "Li, Liang Z" <liang.z.li@intel.com> |
|---|---|
| Date | 2016-12-16 02:40 +0100 |
| Message-ID | <sOPF7-50D-3@gated-at.bofh.it> |
| In reply to | #1543160 |
> On 12/15/2016 04:48 PM, Li, Liang Z wrote: > >>> It seems we leave too many bit for the pfn, and the bits leave for > >>> length is not enough, How about keep 45 bits for the pfn and 19 bits > >>> for length, 45 bits for pfn can cover 57 bits physical address, that > >>> should be > >> enough in the near feature. > >>> What's your opinion? > >> I still think 'order' makes a lot of sense. But, as you say, 57 bits > >> is enough for > >> x86 for a while. Other architectures.... who knows? > > Thinking about this some more... There are really only two cases that > matter: 4k pages and "much bigger" ones. > > Squeezing each 4k page into 8 bytes of metadata helps guarantee that this > scheme won't regress over the old scheme in any cases. For bigger ranges, 8 > vs 16 bytes means *nothing*. And 16 bytes will be as good or better than > the old scheme for everything which is >4k. > > How about this: > * 52 bits of 'pfn', 5 bits of 'order', 7 bits of 'length' > * One special 'length' value to mean "actual length in next 8 bytes" > > That should be pretty simple to produce and decode. We have two record > sizes, but I think it is manageable. It works, Now that we intend to use another 8 bytes for length Why not: Use 52 bits for 'pfn', 12 bits for 'length', when the 12 bits is not long enough for the 'length' Set the 'length' to a special value to indicate the "actual length in next 8 bytes". That will be much more simple. Right? Liang
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| From | "Li, Liang Z" <liang.z.li@intel.com> |
|---|---|
| Date | 2016-12-16 02:50 +0100 |
| Message-ID | <sOPON-53T-1@gated-at.bofh.it> |
| In reply to | #1543163 |
> On 12/15/2016 05:38 PM, Li, Liang Z wrote: > > > > Use 52 bits for 'pfn', 12 bits for 'length', when the 12 bits is not long enough > for the 'length' > > Set the 'length' to a special value to indicate the "actual length in next 8 > bytes". > > > > That will be much more simple. Right? > > Sounds fine to me. Thanks for your inspiration! Liang
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| From | Dave Hansen <dave.hansen@intel.com> |
|---|---|
| Date | 2016-12-16 02:50 +0100 |
| Subject | Re: [Qemu-devel] [PATCH kernel v5 0/5] Extend virtio-balloon for fast (de)inflating & fast live migration |
| Message-ID | <sOPON-53T-3@gated-at.bofh.it> |
| In reply to | #1543163 |
On 12/15/2016 05:38 PM, Li, Liang Z wrote: > > Use 52 bits for 'pfn', 12 bits for 'length', when the 12 bits is not long enough for the 'length' > Set the 'length' to a special value to indicate the "actual length in next 8 bytes". > > That will be much more simple. Right? Sounds fine to me.
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| From | Andrea Arcangeli <aarcange@redhat.com> |
|---|---|
| Date | 2016-12-16 17:10 +0100 |
| Message-ID | <sP3f3-5TP-9@gated-at.bofh.it> |
| In reply to | #1543168 |
On Thu, Dec 15, 2016 at 05:40:45PM -0800, Dave Hansen wrote: > On 12/15/2016 05:38 PM, Li, Liang Z wrote: > > > > Use 52 bits for 'pfn', 12 bits for 'length', when the 12 bits is not long enough for the 'length' > > Set the 'length' to a special value to indicate the "actual length in next 8 bytes". > > > > That will be much more simple. Right? > > Sounds fine to me. > Sounds fine to me too indeed. I'm only wondering what is the major point for compressing gpfn+len in 8 bytes in the common case, you already use sg_init_table to send down two pages, we could send three as well and avoid all math and bit shifts and ors, or not? I agree with the above because from a performance prospective I tend to think the above proposal will run at least theoretically faster because the other way is to waste double amount of CPU cache, and bit mangling in the encoding and the later decoding on qemu side should be faster than accessing an array of double size, but then I'm not sure if it's measurable optimization. So I'd be curious to know the exact motivation and if it is to reduce the CPU cache usage or if there's some other fundamental reason to compress it. The header already tells qemu how big is the array payload, couldn't we just add more pages if one isn't enough? Thanks, Andrea
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| From | "Li, Liang Z" <liang.z.li@intel.com> |
|---|---|
| Date | 2016-12-17 13:40 +0100 |
| Message-ID | <sPmrn-1aF-7@gated-at.bofh.it> |
| In reply to | #1543554 |
> Subject: Re: [Qemu-devel] [PATCH kernel v5 0/5] Extend virtio-balloon for > fast (de)inflating & fast live migration > > On Thu, Dec 15, 2016 at 05:40:45PM -0800, Dave Hansen wrote: > > On 12/15/2016 05:38 PM, Li, Liang Z wrote: > > > > > > Use 52 bits for 'pfn', 12 bits for 'length', when the 12 bits is not long > enough for the 'length' > > > Set the 'length' to a special value to indicate the "actual length in next 8 > bytes". > > > > > > That will be much more simple. Right? > > > > Sounds fine to me. > > > > Sounds fine to me too indeed. > > I'm only wondering what is the major point for compressing gpfn+len in > 8 bytes in the common case, you already use sg_init_table to send down two > pages, we could send three as well and avoid all math and bit shifts and ors, > or not? > Yes, we can use more pages for that. > I agree with the above because from a performance prospective I tend to > think the above proposal will run at least theoretically faster because the > other way is to waste double amount of CPU cache, and bit mangling in the > encoding and the later decoding on qemu side should be faster than > accessing an array of double size, but then I'm not sure if it's measurable > optimization. So I'd be curious to know the exact motivation and if it is to > reduce the CPU cache usage or if there's some other fundamental reason to > compress it. > The header already tells qemu how big is the array payload, couldn't we just > add more pages if one isn't enough? > The original intention to compress the PFN and length it's to reduce the memory required. Even the code was changed a lot from the previous versions, I think this is still true. Now we allocate a specified buffer size to save the 'PFN|length', when the buffer is not big enough to save all the page info for a specified order. A double size buffer will be allocated. This is what we want to avoid because the allocation may fail and allocation takes some time, for fast live migration, time is a critical factor we have to consider, more time takes means more unnecessary pages are sent, because live migration starts before the request for unused pages get response. Thanks Liang > Thanks, > Andrea
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