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[PATCH 1/3] ARM: dts: at91: add dma1 definition to sama5d2

Started byNicolas Ferre <nicolas.ferre@atmel.com>
First post2016-12-01 12:00 +0100
Last post2016-12-07 10:00 +0100
Articles 4 — 2 participants

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  [PATCH 1/3] ARM: dts: at91: add dma1 definition to sama5d2 Nicolas Ferre <nicolas.ferre@atmel.com> - 2016-12-01 12:00 +0100
    [PATCH 2/3] ARM: dts: at91: sama5d2: move UART3 to DMA1 Nicolas Ferre <nicolas.ferre@atmel.com> - 2016-12-01 12:00 +0100
    Re: [PATCH 1/3] ARM: dts: at91: add dma1 definition to sama5d2 Alexandre Belloni <alexandre.belloni@free-electrons.com> - 2016-12-02 12:30 +0100
    Re: [PATCH 1/3] ARM: dts: at91: add dma1 definition to sama5d2 Alexandre Belloni <alexandre.belloni@free-electrons.com> - 2016-12-07 10:00 +0100

#1533964 — [PATCH 1/3] ARM: dts: at91: add dma1 definition to sama5d2

FromNicolas Ferre <nicolas.ferre@atmel.com>
Date2016-12-01 12:00 +0100
Subject[PATCH 1/3] ARM: dts: at91: add dma1 definition to sama5d2
Message-ID<sJxfP-2MX-3@gated-at.bofh.it>
The sama5d2 SoC has a second DMA controller and can be used just like DMA0.
By default both DMA controllers are configured as "Secure" in
MATRIX_SPSELR so we can use whichever we want in a "single Secure World"
configuration.
Surprisingly the DMA1 has a lower address than DMA0. To avoid confusion
place it after DMA0 node anyway.

Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
---
 arch/arm/boot/dts/sama5d2.dtsi | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi
index ceb9783ff7e1..c791ce9c750c 100644
--- a/arch/arm/boot/dts/sama5d2.dtsi
+++ b/arch/arm/boot/dts/sama5d2.dtsi
@@ -395,6 +395,16 @@
 				clock-names = "dma_clk";
 			};
 
+			/* Place dma1 here despite its address */
+			dma1: dma-controller@f0004000 {
+				compatible = "atmel,sama5d4-dma";
+				reg = <0xf0004000 0x1000>;
+				interrupts = <7 IRQ_TYPE_LEVEL_HIGH 0>;
+				#dma-cells = <1>;
+				clocks = <&dma1_clk>;
+				clock-names = "dma_clk";
+			};
+
 			pmc: pmc@f0014000 {
 				compatible = "atmel,sama5d2-pmc", "syscon";
 				reg = <0xf0014000 0x160>;
-- 
2.9.0

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#1533965 — [PATCH 2/3] ARM: dts: at91: sama5d2: move UART3 to DMA1

FromNicolas Ferre <nicolas.ferre@atmel.com>
Date2016-12-01 12:00 +0100
Subject[PATCH 2/3] ARM: dts: at91: sama5d2: move UART3 to DMA1
Message-ID<sJxfP-2MX-13@gated-at.bofh.it>
In reply to#1533964
Now that DMA1 is defined, use it to distribute channel usage among the two
controllers.

Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
---
 arch/arm/boot/dts/sama5d2.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi
index c791ce9c750c..5b69eff523d9 100644
--- a/arch/arm/boot/dts/sama5d2.dtsi
+++ b/arch/arm/boot/dts/sama5d2.dtsi
@@ -1151,10 +1151,10 @@
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xfc008000 0x100>;
 				interrupts = <27 IRQ_TYPE_LEVEL_HIGH 7>;
-				dmas = <&dma0
+				dmas = <&dma1
 					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
 					 AT91_XDMAC_DT_PERID(41))>,
-				       <&dma0
+				       <&dma1
 					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
 					 AT91_XDMAC_DT_PERID(42))>;
 				dma-names = "tx", "rx";
-- 
2.9.0

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#1534852

FromAlexandre Belloni <alexandre.belloni@free-electrons.com>
Date2016-12-02 12:30 +0100
Message-ID<sJUcq-3bc-17@gated-at.bofh.it>
In reply to#1533964
On 01/12/2016 at 11:49:47 +0100, Nicolas Ferre wrote :
> The sama5d2 SoC has a second DMA controller and can be used just like DMA0.
> By default both DMA controllers are configured as "Secure" in
> MATRIX_SPSELR so we can use whichever we want in a "single Secure World"
> configuration.
> Surprisingly the DMA1 has a lower address than DMA0. To avoid confusion
> place it after DMA0 node anyway.
> 

sama5d2.dtsi is probably the only one that is properly ordered and I
feel like we should keep it this way.

If one of the nodes is not ordered properly, other ones will follow...
We don't care about the name, it is just an alias. We only care about
the address.


> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
> ---
>  arch/arm/boot/dts/sama5d2.dtsi | 10 ++++++++++
>  1 file changed, 10 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi
> index ceb9783ff7e1..c791ce9c750c 100644
> --- a/arch/arm/boot/dts/sama5d2.dtsi
> +++ b/arch/arm/boot/dts/sama5d2.dtsi
> @@ -395,6 +395,16 @@
>  				clock-names = "dma_clk";
>  			};
>  
> +			/* Place dma1 here despite its address */
> +			dma1: dma-controller@f0004000 {
> +				compatible = "atmel,sama5d4-dma";
> +				reg = <0xf0004000 0x1000>;
> +				interrupts = <7 IRQ_TYPE_LEVEL_HIGH 0>;
> +				#dma-cells = <1>;
> +				clocks = <&dma1_clk>;
> +				clock-names = "dma_clk";
> +			};
> +
>  			pmc: pmc@f0014000 {
>  				compatible = "atmel,sama5d2-pmc", "syscon";
>  				reg = <0xf0014000 0x160>;
> -- 
> 2.9.0
> 

-- 
Alexandre Belloni, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

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#1537614

FromAlexandre Belloni <alexandre.belloni@free-electrons.com>
Date2016-12-07 10:00 +0100
Message-ID<sLGf0-6eS-11@gated-at.bofh.it>
In reply to#1533964
On 01/12/2016 at 11:49:47 +0100, Nicolas Ferre wrote :
> The sama5d2 SoC has a second DMA controller and can be used just like DMA0.
> By default both DMA controllers are configured as "Secure" in
> MATRIX_SPSELR so we can use whichever we want in a "single Secure World"
> configuration.
> Surprisingly the DMA1 has a lower address than DMA0. To avoid confusion
> place it after DMA0 node anyway.
> 
> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
> ---
>  arch/arm/boot/dts/sama5d2.dtsi | 10 ++++++++++
>  1 file changed, 10 insertions(+)
> 

All applied, thanks.

-- 
Alexandre Belloni, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

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