Groups | Search | Server Info | Keyboard shortcuts | Login | Register [http] [https] [nntp] [nntps]
Groups > linux.kernel > #1533964
| From | Nicolas Ferre <nicolas.ferre@atmel.com> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | [PATCH 1/3] ARM: dts: at91: add dma1 definition to sama5d2 |
| Date | 2016-12-01 12:00 +0100 |
| Message-ID | <sJxfP-2MX-3@gated-at.bofh.it> (permalink) |
| Organization | linux.* mail to news gateway |
The sama5d2 SoC has a second DMA controller and can be used just like DMA0.
By default both DMA controllers are configured as "Secure" in
MATRIX_SPSELR so we can use whichever we want in a "single Secure World"
configuration.
Surprisingly the DMA1 has a lower address than DMA0. To avoid confusion
place it after DMA0 node anyway.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
---
arch/arm/boot/dts/sama5d2.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi
index ceb9783ff7e1..c791ce9c750c 100644
--- a/arch/arm/boot/dts/sama5d2.dtsi
+++ b/arch/arm/boot/dts/sama5d2.dtsi
@@ -395,6 +395,16 @@
clock-names = "dma_clk";
};
+ /* Place dma1 here despite its address */
+ dma1: dma-controller@f0004000 {
+ compatible = "atmel,sama5d4-dma";
+ reg = <0xf0004000 0x1000>;
+ interrupts = <7 IRQ_TYPE_LEVEL_HIGH 0>;
+ #dma-cells = <1>;
+ clocks = <&dma1_clk>;
+ clock-names = "dma_clk";
+ };
+
pmc: pmc@f0014000 {
compatible = "atmel,sama5d2-pmc", "syscon";
reg = <0xf0014000 0x160>;
--
2.9.0
Back to linux.kernel | Previous | Next — Next in thread | Find similar | Unroll thread
[PATCH 1/3] ARM: dts: at91: add dma1 definition to sama5d2 Nicolas Ferre <nicolas.ferre@atmel.com> - 2016-12-01 12:00 +0100 [PATCH 2/3] ARM: dts: at91: sama5d2: move UART3 to DMA1 Nicolas Ferre <nicolas.ferre@atmel.com> - 2016-12-01 12:00 +0100 Re: [PATCH 1/3] ARM: dts: at91: add dma1 definition to sama5d2 Alexandre Belloni <alexandre.belloni@free-electrons.com> - 2016-12-02 12:30 +0100 Re: [PATCH 1/3] ARM: dts: at91: add dma1 definition to sama5d2 Alexandre Belloni <alexandre.belloni@free-electrons.com> - 2016-12-07 10:00 +0100
csiph-web