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| Started by | Baoyou Xie <baoyou.xie@linaro.org> |
|---|---|
| First post | 2016-12-02 07:00 +0100 |
| Last post | 2016-12-05 03:50 +0100 |
| Articles | 4 — 4 participants |
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[PATCH v2] arm64: dts: zx: support cpu-freq for zx296718 Baoyou Xie <baoyou.xie@linaro.org> - 2016-12-02 07:00 +0100
Re: [PATCH v2] arm64: dts: zx: support cpu-freq for zx296718 Viresh Kumar <viresh.kumar@linaro.org> - 2016-12-02 07:10 +0100
Re: [PATCH v2] arm64: dts: zx: support cpu-freq for zx296718 Jun Nie <jun.nie@linaro.org> - 2016-12-05 03:40 +0100
Re: [PATCH v2] arm64: dts: zx: support cpu-freq for zx296718 Shawn Guo <shawnguo@kernel.org> - 2016-12-05 03:50 +0100
| From | Baoyou Xie <baoyou.xie@linaro.org> |
|---|---|
| Date | 2016-12-02 07:00 +0100 |
| Subject | [PATCH v2] arm64: dts: zx: support cpu-freq for zx296718 |
| Message-ID | <sJP33-7Rd-3@gated-at.bofh.it> |
This patch adds the CPU clock phandle in CPU's node
and uses operating-points-v2 to register operating points.
So it can be used by cpufreq-dt driver.
Signed-off-by: Baoyou Xie <baoyou.xie@linaro.org>
---
arch/arm64/boot/dts/zte/zx296718.dtsi | 39 +++++++++++++++++++++++++++++++++++
1 file changed, 39 insertions(+)
diff --git a/arch/arm64/boot/dts/zte/zx296718.dtsi b/arch/arm64/boot/dts/zte/zx296718.dtsi
index 7a1aed7..b44d1d1 100644
--- a/arch/arm64/boot/dts/zte/zx296718.dtsi
+++ b/arch/arm64/boot/dts/zte/zx296718.dtsi
@@ -44,6 +44,7 @@
#include <dt-bindings/input/input.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/clock/zx296718-clock.h>
/ {
compatible = "zte,zx296718";
@@ -81,6 +82,8 @@
compatible = "arm,cortex-a53","arm,armv8";
reg = <0x0 0x0>;
enable-method = "psci";
+ clocks = <&topcrm A53_GATE>;
+ operating-points-v2 = <&cluster0_opp>;
};
cpu1: cpu@1 {
@@ -88,6 +91,8 @@
compatible = "arm,cortex-a53","arm,armv8";
reg = <0x0 0x1>;
enable-method = "psci";
+ clocks = <&topcrm A53_GATE>;
+ operating-points-v2 = <&cluster0_opp>;
};
cpu2: cpu@2 {
@@ -95,6 +100,8 @@
compatible = "arm,cortex-a53","arm,armv8";
reg = <0x0 0x2>;
enable-method = "psci";
+ clocks = <&topcrm A53_GATE>;
+ operating-points-v2 = <&cluster0_opp>;
};
cpu3: cpu@3 {
@@ -102,6 +109,38 @@
compatible = "arm,cortex-a53","arm,armv8";
reg = <0x0 0x3>;
enable-method = "psci";
+ clocks = <&topcrm A53_GATE>;
+ operating-points-v2 = <&cluster0_opp>;
+ };
+ };
+
+ cluster0_opp: opp-table0 {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ opp@500000000 {
+ opp-hz = /bits/ 64 <500000000>;
+ clock-latency-ns = <500000>;
+ };
+
+ opp@648000000 {
+ opp-hz = /bits/ 64 <648000000>;
+ clock-latency-ns = <500000>;
+ };
+
+ opp@800000000 {
+ opp-hz = /bits/ 64 <800000000>;
+ clock-latency-ns = <500000>;
+ };
+
+ opp@1000000000 {
+ opp-hz = /bits/ 64 <1000000000>;
+ clock-latency-ns = <500000>;
+ };
+
+ opp@1188000000 {
+ opp-hz = /bits/ 64 <1188000000>;
+ clock-latency-ns = <500000>;
};
};
--
2.7.4
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| From | Viresh Kumar <viresh.kumar@linaro.org> |
|---|---|
| Date | 2016-12-02 07:10 +0100 |
| Message-ID | <sJPcJ-8fP-7@gated-at.bofh.it> |
| In reply to | #1534679 |
On 02-12-16, 13:58, Baoyou Xie wrote: > + Viresh, the author of the bindings. > > On 2 December 2016 at 13:52, Baoyou Xie <baoyou.xie@linaro.org> wrote: > > > This patch adds the CPU clock phandle in CPU's node > > and uses operating-points-v2 to register operating points. > > > > So it can be used by cpufreq-dt driver. > > > > Signed-off-by: Baoyou Xie <baoyou.xie@linaro.org> > > --- > > arch/arm64/boot/dts/zte/zx296718.dtsi | 39 ++++++++++++++++++++++++++++++ > > +++++ > > 1 file changed, 39 insertions(+) Acked-by: Viresh Kumar <viresh.kumar@linaro.org> -- viresh
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| From | Jun Nie <jun.nie@linaro.org> |
|---|---|
| Date | 2016-12-05 03:40 +0100 |
| Message-ID | <sKRm9-6Su-3@gated-at.bofh.it> |
| In reply to | #1534683 |
2016-12-02 14:00 GMT+08:00 Viresh Kumar <viresh.kumar@linaro.org>: > On 02-12-16, 13:58, Baoyou Xie wrote: >> + Viresh, the author of the bindings. >> >> On 2 December 2016 at 13:52, Baoyou Xie <baoyou.xie@linaro.org> wrote: >> >> > This patch adds the CPU clock phandle in CPU's node >> > and uses operating-points-v2 to register operating points. >> > >> > So it can be used by cpufreq-dt driver. >> > >> > Signed-off-by: Baoyou Xie <baoyou.xie@linaro.org> >> > --- >> > arch/arm64/boot/dts/zte/zx296718.dtsi | 39 ++++++++++++++++++++++++++++++ >> > +++++ >> > 1 file changed, 39 insertions(+) Reviewed-by: Jun Nie <jun.nie@linaro.org> > > Acked-by: Viresh Kumar <viresh.kumar@linaro.org> > > -- > viresh
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| From | Shawn Guo <shawnguo@kernel.org> |
|---|---|
| Date | 2016-12-05 03:50 +0100 |
| Message-ID | <sKRvP-6VS-3@gated-at.bofh.it> |
| In reply to | #1534679 |
On Fri, Dec 02, 2016 at 01:52:36PM +0800, Baoyou Xie wrote: > This patch adds the CPU clock phandle in CPU's node > and uses operating-points-v2 to register operating points. > > So it can be used by cpufreq-dt driver. > > Signed-off-by: Baoyou Xie <baoyou.xie@linaro.org> Applied, thanks.
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