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[PATCH v8 2/3] Documentation: Add binding document for Lattice iCE40 FPGA manager

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  [PATCH v8 2/3] Documentation: Add binding document for Lattice iCE40 FPGA manager Joel Holdsworth <joel@airwebreathe.org.uk> - 2016-11-07 04:00 +0100
    Re: [PATCH v8 2/3] Documentation: Add binding document for Lattice  iCE40 FPGA manager Marek Vasut <marex@denx.de> - 2016-11-07 19:30 +0100
      Re: [PATCH v8 2/3] Documentation: Add binding document for Lattice  iCE40 FPGA manager Joel Holdsworth <joel@airwebreathe.org.uk> - 2016-11-07 20:10 +0100

#1515830 — [PATCH v8 2/3] Documentation: Add binding document for Lattice iCE40 FPGA manager

This adds documentation of the device tree bindings of the Lattice iCE40
FPGA driver for the FPGA manager framework.

Signed-off-by: Joel Holdsworth <joel@airwebreathe.org.uk>
---
 .../bindings/fpga/lattice-ice40-fpga-mgr.txt        | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/fpga/lattice-ice40-fpga-mgr.txt

diff --git a/Documentation/devicetree/bindings/fpga/lattice-ice40-fpga-mgr.txt b/Documentation/devicetree/bindings/fpga/lattice-ice40-fpga-mgr.txt
new file mode 100644
index 0000000..7e7a78b
--- /dev/null
+++ b/Documentation/devicetree/bindings/fpga/lattice-ice40-fpga-mgr.txt
@@ -0,0 +1,21 @@
+Lattice iCE40 FPGA Manager
+
+Required properties:
+- compatible:		Should contain "lattice,ice40-fpga-mgr"
+- reg:			SPI chip select
+- spi-max-frequency:	Maximum SPI frequency (>=1000000, <=25000000)
+- cdone-gpios:		GPIO input connected to CDONE pin
+- reset-gpios:		Active-low GPIO output connected to CRESET_B pin. Note
+			that unless the GPIO is held low during startup, the
+			FPGA will enter Master SPI mode and drive SCK with a
+			clock signal potentially jamming other devices on the
+			bus until the firmware is loaded.
+
+Example:
+	ice40: ice40@0 {
+		compatible = "lattice,ice40-fpga-mgr";
+		reg = <0>;
+		spi-max-frequency = <1000000>;
+		cdone-gpios = <&gpio 24 GPIO_ACTIVE_HIGH>;
+		reset-gpios = <&gpio 22 GPIO_ACTIVE_LOW>;
+	};
-- 
2.7.4

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#1516438 — Re: [PATCH v8 2/3] Documentation: Add binding document for Lattice iCE40 FPGA manager

On 11/07/2016 03:49 AM, Joel Holdsworth wrote:
> This adds documentation of the device tree bindings of the Lattice iCE40
> FPGA driver for the FPGA manager framework.
> 
> Signed-off-by: Joel Holdsworth <joel@airwebreathe.org.uk>
> ---
>  .../bindings/fpga/lattice-ice40-fpga-mgr.txt        | 21 +++++++++++++++++++++
>  1 file changed, 21 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/fpga/lattice-ice40-fpga-mgr.txt
> 
> diff --git a/Documentation/devicetree/bindings/fpga/lattice-ice40-fpga-mgr.txt b/Documentation/devicetree/bindings/fpga/lattice-ice40-fpga-mgr.txt
> new file mode 100644
> index 0000000..7e7a78b
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/fpga/lattice-ice40-fpga-mgr.txt
> @@ -0,0 +1,21 @@
> +Lattice iCE40 FPGA Manager
> +
> +Required properties:
> +- compatible:		Should contain "lattice,ice40-fpga-mgr"
> +- reg:			SPI chip select
> +- spi-max-frequency:	Maximum SPI frequency (>=1000000, <=25000000)
> +- cdone-gpios:		GPIO input connected to CDONE pin
> +- reset-gpios:		Active-low GPIO output connected to CRESET_B pin. Note
> +			that unless the GPIO is held low during startup, the
> +			FPGA will enter Master SPI mode and drive SCK with a
> +			clock signal potentially jamming other devices on the
> +			bus until the firmware is loaded.
> +
> +Example:
> +	ice40: ice40@0 {
> +		compatible = "lattice,ice40-fpga-mgr";
> +		reg = <0>;
> +		spi-max-frequency = <1000000>;
> +		cdone-gpios = <&gpio 24 GPIO_ACTIVE_HIGH>;
> +		reset-gpios = <&gpio 22 GPIO_ACTIVE_LOW>;

Wouldn't it make more sense to have "gpios" and "gpio-names" ? That
scales better imo, although in this case we cannot really talk about
scaling.

> +	};
> 


-- 
Best regards,
Marek Vasut

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#1516501 — Re: [PATCH v8 2/3] Documentation: Add binding document for Lattice iCE40 FPGA manager

>> +		cdone-gpios = <&gpio 24 GPIO_ACTIVE_HIGH>;
>> +		reset-gpios = <&gpio 22 GPIO_ACTIVE_LOW>;
>
> Wouldn't it make more sense to have "gpios" and "gpio-names" ? That
> scales better imo, although in this case we cannot really talk about
> scaling.
>

I don't believe that would be conventional. '-gpios' seems to be the 
standard over '-gpio' even for a single GPIO.

Having multiple GPIOs in that field is only relevant when it could be an 
array e.g. multiple chip-select GPIO lines. Not for multiple GPIOs with 
differing functions.

Also it doesn't fit with the way devm_gpiod_get works where you select 
GPIO(s) from the device-tree, and specify whether it's an input or an 
output. In this case one is an output, one is an input.

Joel

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