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Groups > linux.kernel > #1460284 > unrolled thread
| Started by | Rajendra Nayak <rnayak@codeaurora.org> |
|---|---|
| First post | 2016-08-11 10:50 +0200 |
| Last post | 2016-08-25 11:20 +0200 |
| Articles | 3 — 2 participants |
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[PATCH v2 00/10] clk: qcom: PLL updates Rajendra Nayak <rnayak@codeaurora.org> - 2016-08-11 10:50 +0200
Re: [PATCH v2 00/10] clk: qcom: PLL updates Stephen Boyd <sboyd@codeaurora.org> - 2016-08-24 08:20 +0200
Re: [PATCH v2 00/10] clk: qcom: PLL updates Rajendra Nayak <rnayak@codeaurora.org> - 2016-08-25 11:20 +0200
| From | Rajendra Nayak <rnayak@codeaurora.org> |
|---|---|
| Date | 2016-08-11 10:50 +0200 |
| Subject | [PATCH v2 00/10] clk: qcom: PLL updates |
| Message-ID | <s4TQB-1tP-7@gated-at.bofh.it> |
Hi, This series adds some additional support to the clk-alpha-pll and the clk-pll drivers in preperation to add the CPU clock driver support on msm8996 Changes in v2: * Patch 1 to 6 are same as v1 post, added patches 7 to 10 Rajendra Nayak (8): clk: Fix inconsistencies in usage of data types clk: qcom: Add support for alpha pll hwfsm ops clk: qcom: Add support to initialize alpha plls clk: qcom: Add support for PLLs with alpha mode clk: qcom: Add support for PLLs with early output clk: qcom: Add support for PLLs supporting dynamic reprogramming clk: qcom: Add support to enable FSM mode for votable alpha PLLs clk: qcom: Add .is_enabled ops for clk-alpha-pll Taniya Das (2): clk: qcom: Cleanup some macro defs clk: qcom: Fix .set_rate to handle alpha PLLs w/wo dynamic update drivers/clk/clk.c | 4 +- drivers/clk/qcom/clk-alpha-pll.c | 235 ++++++++++++++++++++++++++++++++++----- drivers/clk/qcom/clk-alpha-pll.h | 17 +++ drivers/clk/qcom/clk-pll.c | 123 +++++++++++++++++--- drivers/clk/qcom/clk-pll.h | 12 +- drivers/clk/qcom/common.c | 29 +++++ drivers/clk/qcom/common.h | 2 + include/linux/clk-provider.h | 5 +- 8 files changed, 378 insertions(+), 49 deletions(-) -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
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| From | Stephen Boyd <sboyd@codeaurora.org> |
|---|---|
| Date | 2016-08-24 08:20 +0200 |
| Message-ID | <s9zHz-6Ku-23@gated-at.bofh.it> |
| In reply to | #1460284 |
On 08/11, Rajendra Nayak wrote: > Hi, > > This series adds some additional support to the clk-alpha-pll and the > clk-pll drivers in preperation to add the CPU clock driver support > on msm8996 It would be nice to see the users of this new code. Can that also be posted, even if it's just RFC and not for merging at this time? -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project
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| From | Rajendra Nayak <rnayak@codeaurora.org> |
|---|---|
| Date | 2016-08-25 11:20 +0200 |
| Message-ID | <s9YZj-7vE-1@gated-at.bofh.it> |
| In reply to | #1469098 |
On 08/24/2016 11:47 AM, Stephen Boyd wrote: > On 08/11, Rajendra Nayak wrote: >> Hi, >> >> This series adds some additional support to the clk-alpha-pll and the >> clk-pll drivers in preperation to add the CPU clock driver support >> on msm8996 > > It would be nice to see the users of this new code. Can that also > be posted, even if it's just RFC and not for merging at this > time? Sure, will do that when I do a respin of this series. Thanks for the review. > -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
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