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Groups > linux.kernel > #1373074 > unrolled thread
| Started by | Yong Li <yong.b.li@intel.com> |
|---|---|
| First post | 2016-04-07 07:10 +0200 |
| Last post | 2016-04-14 14:10 +0200 |
| Articles | 5 — 4 participants |
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[PATCH v2] gpio: pca953x: add PCAL9535 interrupt support for Galileo Gen2 Yong Li <yong.b.li@intel.com> - 2016-04-07 07:10 +0200
Re: [PATCH v2] gpio: pca953x: add PCAL9535 interrupt support for Galileo Gen2 Andy Shevchenko <andriy.shevchenko@linux.intel.com> - 2016-04-07 13:10 +0200
Re: [PATCH v2] gpio: pca953x: add PCAL9535 interrupt support for Galileo Gen2 Linus Walleij <linus.walleij@linaro.org> - 2016-04-08 15:30 +0200
RE: [PATCH v2] gpio: pca953x: add PCAL9535 interrupt support for Galileo Gen2 "Li, Yong B" <yong.b.li@intel.com> - 2016-04-10 05:10 +0200
Re: [PATCH v2] gpio: pca953x: add PCAL9535 interrupt support for Galileo Gen2 Linus Walleij <linus.walleij@linaro.org> - 2016-04-14 14:10 +0200
| From | Yong Li <yong.b.li@intel.com> |
|---|---|
| Date | 2016-04-07 07:10 +0200 |
| Subject | [PATCH v2] gpio: pca953x: add PCAL9535 interrupt support for Galileo Gen2 |
| Message-ID | <rlamC-7mz-13@gated-at.bofh.it> |
Galileo Gen2 board uses the PCAL9535 as the GPIO expansion,
it is different from PCA9535 and includes interrupt mask/status registers,
The current driver does not support the interrupt registers configuration,
it causes some gpio pins cannot trigger interrupt events,
this patch fix this issue. The original patch was submitted by
Josef Ahmad <josef.ahmad@linux.intel.com>
http://git.yoctoproject.org/cgit/cgit.cgi/meta-intel-quark/tree/recipes-kernel/linux/files/0015-Quark-GPIO-1-2-quark.patch
Signed-off-by: Yong Li <yong.b.li@intel.com>
---
drivers/gpio/gpio-pca953x.c | 42 +++++++++++++++++++++++++++++++++++++++++-
1 file changed, 41 insertions(+), 1 deletion(-)
diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c
index e66084c..5e3be32 100644
--- a/drivers/gpio/gpio-pca953x.c
+++ b/drivers/gpio/gpio-pca953x.c
@@ -38,8 +38,13 @@
#define PCA957X_MSK 6
#define PCA957X_INTS 7
+#define PCAL953X_IN_LATCH 34
+#define PCAL953X_INT_MASK 37
+#define PCAL953X_INT_STAT 38
+
#define PCA_GPIO_MASK 0x00FF
#define PCA_INT 0x0100
+#define PCA_PCAL 0x0200
#define PCA953X_TYPE 0x1000
#define PCA957X_TYPE 0x2000
#define PCA_TYPE_MASK 0xF000
@@ -77,7 +82,7 @@ static const struct i2c_device_id pca953x_id[] = {
MODULE_DEVICE_TABLE(i2c, pca953x_id);
static const struct acpi_device_id pca953x_acpi_ids[] = {
- { "INT3491", 16 | PCA953X_TYPE | PCA_INT, },
+ { "INT3491", 16 | PCA953X_TYPE | PCA_INT | PCA_PCAL, },
{ }
};
MODULE_DEVICE_TABLE(acpi, pca953x_acpi_ids);
@@ -437,6 +442,18 @@ static void pca953x_irq_bus_sync_unlock(struct irq_data *d)
struct pca953x_chip *chip = gpiochip_get_data(gc);
u8 new_irqs;
int level, i;
+ u8 invert_irq_mask[MAX_BANK];
+
+ if (chip->driver_data & PCA_PCAL) {
+ /* Enable latch on interrupt-enabled inputs */
+ pca953x_write_regs(chip, PCAL953X_IN_LATCH, chip->irq_mask);
+
+ for (i = 0; i < NBANK(chip); i++)
+ invert_irq_mask[i] = ~chip->irq_mask[i];
+
+ /* Unmask enabled interrupts */
+ pca953x_write_regs(chip, PCAL953X_INT_MASK, invert_irq_mask);
+ }
/* Look for any newly setup interrupt */
for (i = 0; i < NBANK(chip); i++) {
@@ -498,6 +515,29 @@ static bool pca953x_irq_pending(struct pca953x_chip *chip, u8 *pending)
u8 trigger[MAX_BANK];
int ret, i, offset = 0;
+ if (chip->driver_data & PCA_PCAL) {
+ /* Read the current interrupt status from the device */
+ ret = pca953x_read_regs(chip, PCAL953X_INT_STAT, trigger);
+ if (ret)
+ return false;
+
+ /* Check latched inputs and clear interrupt status */
+ ret = pca953x_read_regs(chip, PCA953X_INPUT, cur_stat);
+ if (ret)
+ return false;
+
+ for (i = 0; i < NBANK(chip); i++) {
+ /* Apply filter for rising/falling edge selection */
+ pending[i] = (~cur_stat[i] & chip->irq_trig_fall[i]) |
+ (cur_stat[i] & chip->irq_trig_raise[i]);
+ pending[i] &= trigger[i];
+ if (pending[i])
+ pending_seen = true;
+ }
+
+ return pending_seen;
+ }
+
switch (chip->chip_type) {
case PCA953X_TYPE:
offset = PCA953X_INPUT;
--
2.1.4
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| From | Andy Shevchenko <andriy.shevchenko@linux.intel.com> |
|---|---|
| Date | 2016-04-07 13:10 +0200 |
| Subject | Re: [PATCH v2] gpio: pca953x: add PCAL9535 interrupt support for Galileo Gen2 |
| Message-ID | <rlfZ0-2UP-31@gated-at.bofh.it> |
| In reply to | #1373074 |
On Thu, 2016-04-07 at 12:56 +0800, Yong Li wrote:
> Galileo Gen2 board uses the PCAL9535 as the GPIO expansion,
> it is different from PCA9535 and includes interrupt mask/status
> registers,
> The current driver does not support the interrupt registers
> configuration,
> it causes some gpio pins cannot trigger interrupt events,
> this patch fix this issue. The original patch was submitted by
> Josef Ahmad <josef.ahmad@linux.intel.com>
> http://git.yoctoproject.org/cgit/cgit.cgi/meta-intel-quark/tree/recipe
> s-kernel/linux/files/0015-Quark-GPIO-1-2-quark.patch
>
FWIW:
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
> Signed-off-by: Yong Li <yong.b.li@intel.com>
> ---
> drivers/gpio/gpio-pca953x.c | 42
> +++++++++++++++++++++++++++++++++++++++++-
> 1 file changed, 41 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c
> index e66084c..5e3be32 100644
> --- a/drivers/gpio/gpio-pca953x.c
> +++ b/drivers/gpio/gpio-pca953x.c
> @@ -38,8 +38,13 @@
> #define PCA957X_MSK 6
> #define PCA957X_INTS 7
>
> +#define PCAL953X_IN_LATCH 34
> +#define PCAL953X_INT_MASK 37
> +#define PCAL953X_INT_STAT 38
> +
> #define PCA_GPIO_MASK 0x00FF
> #define PCA_INT 0x0100
> +#define PCA_PCAL 0x0200
> #define PCA953X_TYPE 0x1000
> #define PCA957X_TYPE 0x2000
> #define PCA_TYPE_MASK 0xF000
> @@ -77,7 +82,7 @@ static const struct i2c_device_id pca953x_id[] = {
> MODULE_DEVICE_TABLE(i2c, pca953x_id);
>
> static const struct acpi_device_id pca953x_acpi_ids[] = {
> - { "INT3491", 16 | PCA953X_TYPE | PCA_INT, },
> + { "INT3491", 16 | PCA953X_TYPE | PCA_INT | PCA_PCAL, },
> { }
> };
> MODULE_DEVICE_TABLE(acpi, pca953x_acpi_ids);
> @@ -437,6 +442,18 @@ static void pca953x_irq_bus_sync_unlock(struct
> irq_data *d)
> struct pca953x_chip *chip = gpiochip_get_data(gc);
> u8 new_irqs;
> int level, i;
> + u8 invert_irq_mask[MAX_BANK];
> +
> + if (chip->driver_data & PCA_PCAL) {
> + /* Enable latch on interrupt-enabled inputs */
> + pca953x_write_regs(chip, PCAL953X_IN_LATCH, chip-
> >irq_mask);
> +
> + for (i = 0; i < NBANK(chip); i++)
> + invert_irq_mask[i] = ~chip->irq_mask[i];
> +
> + /* Unmask enabled interrupts */
> + pca953x_write_regs(chip, PCAL953X_INT_MASK,
> invert_irq_mask);
> + }
>
> /* Look for any newly setup interrupt */
> for (i = 0; i < NBANK(chip); i++) {
> @@ -498,6 +515,29 @@ static bool pca953x_irq_pending(struct
> pca953x_chip *chip, u8 *pending)
> u8 trigger[MAX_BANK];
> int ret, i, offset = 0;
>
> + if (chip->driver_data & PCA_PCAL) {
> + /* Read the current interrupt status from the device
> */
> + ret = pca953x_read_regs(chip, PCAL953X_INT_STAT,
> trigger);
> + if (ret)
> + return false;
> +
> + /* Check latched inputs and clear interrupt status */
> + ret = pca953x_read_regs(chip, PCA953X_INPUT,
> cur_stat);
> + if (ret)
> + return false;
> +
> + for (i = 0; i < NBANK(chip); i++) {
> + /* Apply filter for rising/falling edge
> selection */
> + pending[i] = (~cur_stat[i] & chip-
> >irq_trig_fall[i]) |
> + (cur_stat[i] & chip-
> >irq_trig_raise[i]);
> + pending[i] &= trigger[i];
> + if (pending[i])
> + pending_seen = true;
> + }
> +
> + return pending_seen;
> + }
> +
> switch (chip->chip_type) {
> case PCA953X_TYPE:
> offset = PCA953X_INPUT;
--
Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Intel Finland Oy
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| From | Linus Walleij <linus.walleij@linaro.org> |
|---|---|
| Date | 2016-04-08 15:30 +0200 |
| Subject | Re: [PATCH v2] gpio: pca953x: add PCAL9535 interrupt support for Galileo Gen2 |
| Message-ID | <rlEE2-4mP-9@gated-at.bofh.it> |
| In reply to | #1373074 |
n Thu, Apr 7, 2016 at 6:56 AM, Yong Li <yong.b.li@intel.com> wrote: > Galileo Gen2 board uses the PCAL9535 as the GPIO expansion, > it is different from PCA9535 and includes interrupt mask/status registers, > The current driver does not support the interrupt registers configuration, > it causes some gpio pins cannot trigger interrupt events, > this patch fix this issue. The original patch was submitted by > Josef Ahmad <josef.ahmad@linux.intel.com> > http://git.yoctoproject.org/cgit/cgit.cgi/meta-intel-quark/tree/recipes-kernel/linux/files/0015-Quark-GPIO-1-2-quark.patch > > Signed-off-by: Yong Li <yong.b.li@intel.com> Patch applied with Andy's review tag. Yours, Linus Walleij
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| From | "Li, Yong B" <yong.b.li@intel.com> |
|---|---|
| Date | 2016-04-10 05:10 +0200 |
| Subject | RE: [PATCH v2] gpio: pca953x: add PCAL9535 interrupt support for Galileo Gen2 |
| Message-ID | <rmdV7-75p-3@gated-at.bofh.it> |
| In reply to | #1374236 |
Thanks Linus. I think the below patch(in fixes branch) should be merged into devel branch too, since the below patch is depended by this one in devel branch.
commit 9b8e3ec34318663affced3c14d960e78d760dd9a
Author: Yong Li <sdliyong@gmail.com>
Date: Wed Mar 30 14:49:14 2016 +0800
gpio: pca953x: Use correct u16 value for register word write
The current implementation only uses the first byte in val,
the second byte is always 0. Change it to use cpu_to_le16
to write the two bytes into the register
Cc: stable@vger.kernel.org
Signed-off-by: Yong Li <sdliyong@gmail.com>
Reviewed-by: Phil Reid <preid@electromag.com.au>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Yong
> -----Original Message-----
> From: Linus Walleij [mailto:linus.walleij@linaro.org]
> Sent: Friday, April 08, 2016 21:21
> To: Li, Yong B <yong.b.li@intel.com>
> Cc: linux-gpio@vger.kernel.org; linux-kernel@vger.kernel.org; Alexandre
> Courbot <gnurou@gmail.com>; Andy Shevchenko
> <andriy.shevchenko@linux.intel.com>; Puustinen, Ismo
> <ismo.puustinen@intel.com>; Phil Reid <preid@electromag.com.au>
> Subject: Re: [PATCH v2] gpio: pca953x: add PCAL9535 interrupt support for
> Galileo Gen2
>
> n Thu, Apr 7, 2016 at 6:56 AM, Yong Li <yong.b.li@intel.com> wrote:
>
> > Galileo Gen2 board uses the PCAL9535 as the GPIO expansion, it is
> > different from PCA9535 and includes interrupt mask/status registers,
> > The current driver does not support the interrupt registers
> > configuration, it causes some gpio pins cannot trigger interrupt
> > events, this patch fix this issue. The original patch was submitted by
> > Josef Ahmad <josef.ahmad@linux.intel.com>
> > http://git.yoctoproject.org/cgit/cgit.cgi/meta-intel-quark/tree/recipe
> > s-kernel/linux/files/0015-Quark-GPIO-1-2-quark.patch
> >
> > Signed-off-by: Yong Li <yong.b.li@intel.com>
>
> Patch applied with Andy's review tag.
>
> Yours,
> Linus Walleij
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| From | Linus Walleij <linus.walleij@linaro.org> |
|---|---|
| Date | 2016-04-14 14:10 +0200 |
| Subject | Re: [PATCH v2] gpio: pca953x: add PCAL9535 interrupt support for Galileo Gen2 |
| Message-ID | <rnOfW-1oW-63@gated-at.bofh.it> |
| In reply to | #1374709 |
On Sun, Apr 10, 2016 at 5:02 AM, Li, Yong B <yong.b.li@intel.com> wrote: > Thanks Linus. I think the below patch(in fixes branch) should be merged into devel branch too, since the below patch is depended by this one in devel branch. > > commit 9b8e3ec34318663affced3c14d960e78d760dd9a > Author: Yong Li <sdliyong@gmail.com> > Date: Wed Mar 30 14:49:14 2016 +0800 > > gpio: pca953x: Use correct u16 value for register word write This patch is already upstream so no need to worry about that. Yours, Linus Walleij
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