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Groups > linux.kernel > #1362754 > unrolled thread
| Started by | Lijun Ou <oulijun@huawei.com> |
|---|---|
| First post | 2016-03-22 15:00 +0100 |
| Last post | 2016-03-23 13:30 +0100 |
| Articles | 4 — 3 participants |
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[PATCH v4 0/3] IB/hns: Add HiSilicon RoCE driver Lijun Ou <oulijun@huawei.com> - 2016-03-22 15:00 +0100
[PATCH v4 3/3] IB/hns: Add binding document for HiSilicon RoCE driver Lijun Ou <oulijun@huawei.com> - 2016-03-22 15:00 +0100
Re: [PATCH v4 2/3] IB/hns: Add HiSilicon RoCE driver support Christoph Hellwig <hch@infradead.org> - 2016-03-22 20:00 +0100
Re: [PATCH v4 2/3] IB/hns: Add HiSilicon RoCE driver support oulijun <oulijun@huawei.com> - 2016-03-23 13:30 +0100
| From | Lijun Ou <oulijun@huawei.com> |
|---|---|
| Date | 2016-03-22 15:00 +0100 |
| Subject | [PATCH v4 0/3] IB/hns: Add HiSilicon RoCE driver |
| Message-ID | <rfv0J-5cK-7@gated-at.bofh.it> |
The HiSilicon Network Substem is a long term evolution IP which is supposed to be used in HiSilicon ICT SoC. RoCE is a feature of hns. The driver for HiSilicon RoCE engine is a platform driver. The driver will support mulitple versions of hns. Currently only "v1" for hip06 SoC is supported. Changes v3 -> v4: 1. modify roce.o into hns-roce.o in Makefile and Kconfig file. Changes v2 -> v3: 1. modify the formats of RoCE driver code base v2 by the experts reviewing. also, it used kmalloc_array instead of kmalloc, used kcalloc instead of kzalloc, when refer to memory allocation for array 2. remove some functions without use and unconnected macros 3. modify the binding document with RoCE DT base v2 which added interrupt-names 4. redesign the port_map and si_map in hns_dsaf_roce_reset 5. add HiSilicon RoCE driver maintainers introduction in MAINTAINERS document Changes v1 -> v2: 1. modify the formats of roce driver code by the experts reviewing 2. modify the bindings file with roce dts. add the attribute named interrput-names. 3. modify the way of defining port mode in hns_dsaf_main.c 4. move the Kconfig file into the hns directory and send it with roce Lijun Ou (3): net: hns: Add reset function support for RoCE driver IB/hns: Add HiSilicon RoCE driver support IB/hns: Add binding document for HiSilicon RoCE driver .../bindings/infiniband/hisilicon-hns-roce.txt | 107 + MAINTAINERS | 8 + drivers/infiniband/Kconfig | 1 + drivers/infiniband/hw/Makefile | 1 + drivers/infiniband/hw/hisilicon/hns/Kconfig | 10 + drivers/infiniband/hw/hisilicon/hns/Makefile | 9 + drivers/infiniband/hw/hisilicon/hns/hns_roce_ah.c | 110 + .../infiniband/hw/hisilicon/hns/hns_roce_alloc.c | 239 ++ drivers/infiniband/hw/hisilicon/hns/hns_roce_cmd.c | 338 +++ drivers/infiniband/hw/hisilicon/hns/hns_roce_cmd.h | 80 + .../infiniband/hw/hisilicon/hns/hns_roce_common.h | 308 +++ drivers/infiniband/hw/hisilicon/hns/hns_roce_cq.c | 436 +++ .../infiniband/hw/hisilicon/hns/hns_roce_device.h | 794 ++++++ drivers/infiniband/hw/hisilicon/hns/hns_roce_eq.c | 758 ++++++ drivers/infiniband/hw/hisilicon/hns/hns_roce_eq.h | 132 + drivers/infiniband/hw/hisilicon/hns/hns_roce_icm.c | 578 ++++ drivers/infiniband/hw/hisilicon/hns/hns_roce_icm.h | 112 + .../infiniband/hw/hisilicon/hns/hns_roce_main.c | 1097 ++++++++ drivers/infiniband/hw/hisilicon/hns/hns_roce_mr.c | 605 +++++ drivers/infiniband/hw/hisilicon/hns/hns_roce_pd.c | 124 + drivers/infiniband/hw/hisilicon/hns/hns_roce_qp.c | 841 ++++++ .../infiniband/hw/hisilicon/hns/hns_roce_user.h | 31 + .../infiniband/hw/hisilicon/hns/hns_roce_v1_hw.c | 2832 ++++++++++++++++++++ .../infiniband/hw/hisilicon/hns/hns_roce_v1_hw.h | 985 +++++++ drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.c | 84 + drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.h | 30 + drivers/net/ethernet/hisilicon/hns/hns_dsaf_misc.c | 62 +- drivers/net/ethernet/hisilicon/hns/hns_dsaf_reg.h | 13 + 28 files changed, 10715 insertions(+), 10 deletions(-) create mode 100644 Documentation/devicetree/bindings/infiniband/hisilicon-hns-roce.txt create mode 100644 drivers/infiniband/hw/hisilicon/hns/Kconfig create mode 100644 drivers/infiniband/hw/hisilicon/hns/Makefile create mode 100644 drivers/infiniband/hw/hisilicon/hns/hns_roce_ah.c create mode 100644 drivers/infiniband/hw/hisilicon/hns/hns_roce_alloc.c create mode 100644 drivers/infiniband/hw/hisilicon/hns/hns_roce_cmd.c create mode 100644 drivers/infiniband/hw/hisilicon/hns/hns_roce_cmd.h create mode 100644 drivers/infiniband/hw/hisilicon/hns/hns_roce_common.h create mode 100644 drivers/infiniband/hw/hisilicon/hns/hns_roce_cq.c create mode 100644 drivers/infiniband/hw/hisilicon/hns/hns_roce_device.h create mode 100644 drivers/infiniband/hw/hisilicon/hns/hns_roce_eq.c create mode 100644 drivers/infiniband/hw/hisilicon/hns/hns_roce_eq.h create mode 100644 drivers/infiniband/hw/hisilicon/hns/hns_roce_icm.c create mode 100644 drivers/infiniband/hw/hisilicon/hns/hns_roce_icm.h create mode 100644 drivers/infiniband/hw/hisilicon/hns/hns_roce_main.c create mode 100644 drivers/infiniband/hw/hisilicon/hns/hns_roce_mr.c create mode 100644 drivers/infiniband/hw/hisilicon/hns/hns_roce_pd.c create mode 100644 drivers/infiniband/hw/hisilicon/hns/hns_roce_qp.c create mode 100644 drivers/infiniband/hw/hisilicon/hns/hns_roce_user.h create mode 100644 drivers/infiniband/hw/hisilicon/hns/hns_roce_v1_hw.c create mode 100644 drivers/infiniband/hw/hisilicon/hns/hns_roce_v1_hw.h -- 1.9.1
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| From | Lijun Ou <oulijun@huawei.com> |
|---|---|
| Date | 2016-03-22 15:00 +0100 |
| Subject | [PATCH v4 3/3] IB/hns: Add binding document for HiSilicon RoCE driver |
| Message-ID | <rfv0L-5cK-21@gated-at.bofh.it> |
| In reply to | #1362754 |
This patch adds related DTS binding document for HiSilicon RoCE driver.
Signed-off-by: Lijun Ou <oulijun@huawei.com>
Signed-off-by: Wei Hu(Xavier) <xavier.huwei@huawei.com>
---
.../bindings/infiniband/hisilicon-hns-roce.txt | 107 +++++++++++++++++++++
1 file changed, 107 insertions(+)
create mode 100644 Documentation/devicetree/bindings/infiniband/hisilicon-hns-roce.txt
diff --git a/Documentation/devicetree/bindings/infiniband/hisilicon-hns-roce.txt b/Documentation/devicetree/bindings/infiniband/hisilicon-hns-roce.txt
new file mode 100644
index 0000000..5180fef
--- /dev/null
+++ b/Documentation/devicetree/bindings/infiniband/hisilicon-hns-roce.txt
@@ -0,0 +1,107 @@
+HiSilicon RoCE DT description
+
+HiSilicon RoCE engine is a part of network subsystem.
+It works depending on other part of network wubsytem, such as, gmac and
+dsa fabric.
+
+Additional properties are described here:
+
+Required properties:
+- compatible: Should contain "hisilicon,hns-roce-v1".
+- reg: Physical base address of the roce driver and
+length of memory mapped region.
+- eth-handle: phandle, specifies a reference to a node
+representing a ethernet device.
+- dsaf-handle: phandle, specifies a reference to a node
+representing a dsaf device.
+- #address-cells: must be 2
+- #size-cells: must be 2
+Optional properties:
+- dma-coherent: Present if DMA operations are coherent.
+- interrupt-parent: the interrupt parent of this device.
+- interrupts: should contain 32 completion event irq,1 async event irq
+and 1 event overflow irq.
+- interrupt-names:should be one of 34 irqs for roce device
+ - roce_ce0_irq ~ roce_ce31_irq: 32 complete event irq
+ - roce_ae_irq: 1 async event irq
+ - roce_common_irq: named common exception warning irq
+Example:
+ infiniband@c4000000 {
+ compatible = "hisilicon,hns-roce-v1";
+ reg = <0x0 0xc4000000 0x0 0x100000>;
+ dma-coherent;
+ eth-handle = <ð2 ð3 ð4 ð5 ð6 ð7>;
+ dsaf-handle = <&soc0_dsa>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ interrupt-parent = <&mbigen_dsa>;
+ interrupts = <722 1>,
+ <723 1>,
+ <724 1>,
+ <725 1>,
+ <726 1>,
+ <727 1>,
+ <728 1>,
+ <729 1>,
+ <730 1>,
+ <731 1>,
+ <732 1>,
+ <733 1>,
+ <734 1>,
+ <735 1>,
+ <736 1>,
+ <737 1>,
+ <738 1>,
+ <739 1>,
+ <740 1>,
+ <741 1>,
+ <742 1>,
+ <743 1>,
+ <744 1>,
+ <745 1>,
+ <746 1>,
+ <747 1>,
+ <748 1>,
+ <749 1>,
+ <750 1>,
+ <751 1>,
+ <752 1>,
+ <753 1>,
+ <785 1>,
+ <754 4>;
+
+ interrupt-names = "roce_ce0_irq",
+ "roce_ce1_irq",
+ "roce_ce2_irq",
+ "roce_ce3_irq",
+ "roce_ce4_irq",
+ "roce_ce5_irq",
+ "roce_ce6_irq",
+ "roce_ce7_irq",
+ "roce_ce8_irq",
+ "roce_ce9_irq",
+ "roce_ce10_irq",
+ "roce_ce11_irq",
+ "roce_ce12_irq",
+ "roce_ce13_irq",
+ "roce_ce14_irq",
+ "roce_ce15_irq",
+ "roce_ce16_irq",
+ "roce_ce17_irq",
+ "roce_ce18_irq",
+ "roce_ce19_irq",
+ "roce_ce20_irq",
+ "roce_ce21_irq",
+ "roce_ce22_irq",
+ "roce_ce23_irq",
+ "roce_ce24_irq",
+ "roce_ce25_irq",
+ "roce_ce26_irq",
+ "roce_ce27_irq",
+ "roce_ce28_irq",
+ "roce_ce29_irq",
+ "roce_ce30_irq",
+ "roce_ce31_irq",
+ "roce_ae_irq",
+ "roce_common_irq";
+ };
--
1.9.1
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| From | Christoph Hellwig <hch@infradead.org> |
|---|---|
| Date | 2016-03-22 20:00 +0100 |
| Subject | Re: [PATCH v4 2/3] IB/hns: Add HiSilicon RoCE driver support |
| Message-ID | <rfzH4-h4-7@gated-at.bofh.it> |
| In reply to | #1362754 |
> drivers/infiniband/Kconfig | 1 + > drivers/infiniband/hw/Makefile | 1 + > drivers/infiniband/hw/hisilicon/hns/Kconfig | 10 + To fit in with the other drivers drop the hisilicon level of the directory hierarchy. Haven't had time to look at the actual driver yet so far, though.
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| From | oulijun <oulijun@huawei.com> |
|---|---|
| Date | 2016-03-23 13:30 +0100 |
| Subject | Re: [PATCH v4 2/3] IB/hns: Add HiSilicon RoCE driver support |
| Message-ID | <rfQ5c-3jc-3@gated-at.bofh.it> |
| In reply to | #1362915 |
On 2016/3/23 2:54, Christoph Hellwig wrote: >> drivers/infiniband/Kconfig | 1 + >> drivers/infiniband/hw/Makefile | 1 + >> drivers/infiniband/hw/hisilicon/hns/Kconfig | 10 + > > To fit in with the other drivers drop the hisilicon level > of the directory hierarchy. > > Haven't had time to look at the actual driver yet so far, though. > > . > Hi Christoph Hellwig, surely, I considered that other drivers will be put into the hisilicon level of the directory hierarchy. These drivers will support RDMA function which will be developed for a series of hisilicon chip. Because of the consideration, I drop the level. In additon that, i thought that the patch of RoCE driver which supported the base function of RDMA is huge. However, It is not splitted into patches in form of patchset. I don't put a better strategy that it neither make mistakes of building and running nor huge. thanks Lijun Ou
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