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[PATCH v2 00/18] Add Initial support for PLX Technology OX810SE

Started byNeil Armstrong <narmstrong@baylibre.com>
First post2016-03-09 11:30 +0100
Last post2016-03-09 11:30 +0100
Articles 20 on this page of 24 — 5 participants

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  [PATCH v2 00/18] Add Initial support for PLX Technology OX810SE Neil Armstrong <narmstrong@baylibre.com> - 2016-03-09 11:30 +0100
    [PATCH v2 03/18] irqchip: versatile-fpga: add new arm,rps-irq compatible Neil Armstrong <narmstrong@baylibre.com> - 2016-03-09 11:30 +0100
      Re: [PATCH v2 03/18] irqchip: versatile-fpga: add new arm,rps-irq  compatible Marc Zyngier <marc.zyngier@arm.com> - 2016-03-15 12:50 +0100
    [PATCH v2 18/18] arm: boot: dts: Add Western Digital My Book World Edition device tree Neil Armstrong <narmstrong@baylibre.com> - 2016-03-09 11:30 +0100
    [PATCH v2 08/18] dt-bindings: Add PLX Technology Reset Controller bindings Neil Armstrong <narmstrong@baylibre.com> - 2016-03-09 11:30 +0100
      Re: [PATCH v2 08/18] dt-bindings: Add PLX Technology Reset  Controller bindings Rob Herring <robh@kernel.org> - 2016-03-17 18:20 +0100
    [PATCH v2 13/18] arm: Add new mach-oxnas Neil Armstrong <narmstrong@baylibre.com> - 2016-03-09 11:30 +0100
    [PATCH v2 07/18] reset: Add PLX Technology Reset Controller driver Neil Armstrong <narmstrong@baylibre.com> - 2016-03-09 11:30 +0100
    [PATCH v2 02/18] dt-bindings: timer: sp804: add timer-width property Neil Armstrong <narmstrong@baylibre.com> - 2016-03-09 11:30 +0100
      Re: [PATCH v2 02/18] dt-bindings: timer: sp804: add timer-width  property Rob Herring <robh@kernel.org> - 2016-03-17 18:10 +0100
        Re: [PATCH v2 02/18] dt-bindings: timer: sp804: add timer-width  property Robin Murphy <robin.murphy@arm.com> - 2016-03-17 19:10 +0100
          Re: [PATCH v2 02/18] dt-bindings: timer: sp804: add timer-width property Rob Herring <robh@kernel.org> - 2016-03-17 20:10 +0100
            Re: [PATCH v2 02/18] dt-bindings: timer: sp804: add timer-width  property Robin Murphy <robin.murphy@arm.com> - 2016-03-17 20:30 +0100
              Re: [PATCH v2 02/18] dt-bindings: timer: sp804: add timer-width  property Neil Armstrong <narmstrong@baylibre.com> - 2016-03-22 10:30 +0100
                Re: [PATCH v2 02/18] dt-bindings: timer: sp804: add timer-width  property Robin Murphy <robin.murphy@arm.com> - 2016-03-22 13:10 +0100
                  Re: [PATCH v2 02/18] dt-bindings: timer: sp804: add timer-width  property Neil Armstrong <narmstrong@baylibre.com> - 2016-03-22 15:40 +0100
    [PATCH v2 14/18] arm: Add build support for mach-oxnas Neil Armstrong <narmstrong@baylibre.com> - 2016-03-09 11:30 +0100
    [PATCH v2 06/18] dt-bindings: Add Oxford Semiconductors to vendor prefixes Neil Armstrong <narmstrong@baylibre.com> - 2016-03-09 11:30 +0100
      Re: [PATCH v2 06/18] dt-bindings: Add Oxford Semiconductors to  vendor prefixes Rob Herring <robh@kernel.org> - 2016-03-17 18:20 +0100
    [PATCH v2 04/18] dt-bindings: irq: arm,versatile-fpga: add arm,rps-irq compatible string Neil Armstrong <narmstrong@baylibre.com> - 2016-03-09 11:30 +0100
      Re: [PATCH v2 04/18] dt-bindings: irq: arm,versatile-fpga: add  arm,rps-irq compatible string Rob Herring <robh@kernel.org> - 2016-03-17 18:20 +0100
    [PATCH v2 01/18] clocksource: sp804: Add support for non-32bit width counter Neil Armstrong <narmstrong@baylibre.com> - 2016-03-09 11:30 +0100
      Re: [PATCH v2 01/18] clocksource: sp804: Add support for non-32bit  width counter Daniel Lezcano <daniel.lezcano@linaro.org> - 2016-03-17 17:50 +0100
    [PATCH v2 17/18] dt-bindings: Add Western Digital to vendor prefixes Neil Armstrong <narmstrong@baylibre.com> - 2016-03-09 11:30 +0100

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#1353954 — [PATCH v2 00/18] Add Initial support for PLX Technology OX810SE

FromNeil Armstrong <narmstrong@baylibre.com>
Date2016-03-09 11:30 +0100
Subject[PATCH v2 00/18] Add Initial support for PLX Technology OX810SE
Message-ID<raJxn-6vl-5@gated-at.bofh.it>
This serie adds initial support (IRQ, Timer, GPIO, Reset, Serial, Clocks) for
the PLX Technology OX810SE used in the well-known Western Digital My Book
World Edition Network Attached Storage device.

Extended support for SATA, DMA and Ethernet will come in further patches.

Upstream support for following devices like the OX820SE is welcome !

v2 changes :
- switch all compatible string to oxsemi,ox820se
- add oxsemi to prefixes
- switch to versatile-fpga interrupt controller with new compatible
- switch to sp804 timer with new timer width property
- cleanup of mach-oxnas (removal of generic oxnas.c)
- cleanup of standard clock to a platform driver

v1 : http://lkml.kernel.org/r/1457005210-18485-1-git-send-email-narmstrong@baylibre.com

Neil Armstrong (18):
  clocksource: sp804: Add support for non-32bit width counter
  dt-bindings: timer: sp804: add timer-width property
  irqchip: versatile-fpga: add new arm,rps-irq compatible
  dt-bindings: irq: arm,versatile-fpga: add arm,rps-irq compatible
    string
  dt-bindings: vendor-prefixes: Add PLX Technology
  dt-bindings: Add Oxford Semiconductors to vendor prefixes
  reset: Add PLX Technology Reset Controller driver
  dt-bindings: Add PLX Technology Reset Controller bindings
  clk: Add PLX Technology OXNAS Standard Clocks
  dt-bindings: Add PLX Technology OXNAS Standard Clocks bindings
  pinctrl: Add PLX Technology OXNAS pinctrl and gpio driver
  dt-bindings: Add PLX Technology OXNAS pinctrl and gpio bindings
  arm: Add new mach-oxnas
  arm: Add build support for mach-oxnas
  arm: boot: dts: Add PLX Technology OX810SE dtsi
  dt-bindings: Add OXNAS bindings
  dt-bindings: Add Western Digital to vendor prefixes
  arm: boot: dts: Add Western Digital My Book World Edition device tree

 Documentation/devicetree/bindings/arm/oxnas.txt    |    9 +
 .../devicetree/bindings/clock/plxtech,stdclk.txt   |   35 +
 .../devicetree/bindings/gpio/gpio_oxnas.txt        |   27 +
 .../arm,versatile-fpga-irq.txt                     |    2 +-
 .../bindings/pinctrl/plxtech,pinctrl.txt           |  100 ++
 .../devicetree/bindings/reset/plxtech,reset.txt    |   58 +
 .../devicetree/bindings/timer/arm,sp804.txt        |    2 +
 .../devicetree/bindings/vendor-prefixes.txt        |    5 +-
 arch/arm/Kconfig                                   |    2 +
 arch/arm/Makefile                                  |    1 +
 arch/arm/boot/dts/Makefile                         |    2 +
 arch/arm/boot/dts/ox810se.dtsi                     |  273 ++++
 arch/arm/boot/dts/wd-mbwe.dts                      |  112 ++
 arch/arm/mach-oxnas/Kconfig                        |   25 +
 arch/arm/mach-oxnas/Makefile                       |    1 +
 drivers/clk/Kconfig                                |    6 +
 drivers/clk/Makefile                               |    1 +
 drivers/clk/clk-oxnas.c                            |  202 +++
 drivers/clocksource/timer-sp804.c                  |   38 +-
 drivers/irqchip/irq-versatile-fpga.c               |    1 +
 drivers/pinctrl/Kconfig                            |    9 +
 drivers/pinctrl/Makefile                           |    1 +
 drivers/pinctrl/pinctrl-oxnas.c                    | 1392 ++++++++++++++++++++
 drivers/reset/Kconfig                              |    3 +
 drivers/reset/Makefile                             |    1 +
 drivers/reset/reset-oxnas.c                        |  136 ++
 include/clocksource/timer-sp804.h                  |   11 +-
 27 files changed, 2437 insertions(+), 18 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/arm/oxnas.txt
 create mode 100644 Documentation/devicetree/bindings/clock/plxtech,stdclk.txt
 create mode 100644 Documentation/devicetree/bindings/gpio/gpio_oxnas.txt
 create mode 100644 Documentation/devicetree/bindings/pinctrl/plxtech,pinctrl.txt
 create mode 100644 Documentation/devicetree/bindings/reset/plxtech,reset.txt
 create mode 100644 arch/arm/boot/dts/ox810se.dtsi
 create mode 100644 arch/arm/boot/dts/wd-mbwe.dts
 create mode 100644 arch/arm/mach-oxnas/Kconfig
 create mode 100644 arch/arm/mach-oxnas/Makefile
 create mode 100644 drivers/clk/clk-oxnas.c
 create mode 100644 drivers/pinctrl/pinctrl-oxnas.c
 create mode 100644 drivers/reset/reset-oxnas.c

-- 
1.9.1

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#1353956 — [PATCH v2 03/18] irqchip: versatile-fpga: add new arm,rps-irq compatible

FromNeil Armstrong <narmstrong@baylibre.com>
Date2016-03-09 11:30 +0100
Subject[PATCH v2 03/18] irqchip: versatile-fpga: add new arm,rps-irq compatible
Message-ID<raJxo-6vl-23@gated-at.bofh.it>
In reply to#1353954
Under the OX810SE, this exact same interface is used as "Reference Peripheral
Specification" Interrupt Controller, so add a new compatible string.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
 drivers/irqchip/irq-versatile-fpga.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/irqchip/irq-versatile-fpga.c b/drivers/irqchip/irq-versatile-fpga.c
index 598ab3f..389b8e2 100644
--- a/drivers/irqchip/irq-versatile-fpga.c
+++ b/drivers/irqchip/irq-versatile-fpga.c
@@ -227,4 +227,5 @@ int __init fpga_irq_of_init(struct device_node *node,
 }
 IRQCHIP_DECLARE(arm_fpga, "arm,versatile-fpga-irq", fpga_irq_of_init);
 IRQCHIP_DECLARE(arm_fpga_sic, "arm,versatile-sic", fpga_irq_of_init);
+IRQCHIP_DECLARE(arm_rps, "arm,rps-irq", fpga_irq_of_init);
 #endif
-- 
1.9.1

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#1358004 — Re: [PATCH v2 03/18] irqchip: versatile-fpga: add new arm,rps-irq compatible

FromMarc Zyngier <marc.zyngier@arm.com>
Date2016-03-15 12:50 +0100
SubjectRe: [PATCH v2 03/18] irqchip: versatile-fpga: add new arm,rps-irq compatible
Message-ID<rcVE6-1th-3@gated-at.bofh.it>
In reply to#1353956
On 09/03/16 10:24, Neil Armstrong wrote:
> Under the OX810SE, this exact same interface is used as "Reference Peripheral
> Specification" Interrupt Controller, so add a new compatible string.
> 
> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>

Acked-by: Marc Zyngier <marc.zyngier@arm.com>

	M.
-- 
Jazz is not dead. It just smells funny...

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#1353957 — [PATCH v2 18/18] arm: boot: dts: Add Western Digital My Book World Edition device tree

FromNeil Armstrong <narmstrong@baylibre.com>
Date2016-03-09 11:30 +0100
Subject[PATCH v2 18/18] arm: boot: dts: Add Western Digital My Book World Edition device tree
Message-ID<raJxo-6vl-25@gated-at.bofh.it>
In reply to#1353954
Add Western Digital My Book World Edition device tree based on
PLX Technology OX810SE SoC.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
 arch/arm/boot/dts/Makefile    |   2 +
 arch/arm/boot/dts/wd-mbwe.dts | 112 ++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 114 insertions(+)
 create mode 100644 arch/arm/boot/dts/wd-mbwe.dts

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index a4a6d70..0395674 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -520,6 +520,8 @@ dtb-$(CONFIG_ARCH_ORION5X) += \
 	orion5x-rd88f5182-nas.dtb
 dtb-$(CONFIG_ARCH_PRIMA2) += \
 	prima2-evb.dtb
+dtb-$(CONFIG_ARCH_OXNAS) += \
+	wd-mbwe.dtb
 dtb-$(CONFIG_ARCH_QCOM) += \
 	qcom-apq8064-cm-qs600.dtb \
 	qcom-apq8064-ifc6410.dtb \
diff --git a/arch/arm/boot/dts/wd-mbwe.dts b/arch/arm/boot/dts/wd-mbwe.dts
new file mode 100644
index 0000000..ac3250a
--- /dev/null
+++ b/arch/arm/boot/dts/wd-mbwe.dts
@@ -0,0 +1,112 @@
+/*
+ * wd-mbwe.dtsi - Device tree file for Western Digital My Book World Edition
+ *
+ * Copyright (C) 2016 Neil Armstrong <narmstrong@baylibre.com>
+ *
+ * Licensed under GPLv2 or later
+ */
+
+/dts-v1/;
+#include "ox810se.dtsi"
+
+/ {
+	model = "Western Digital My Book World Edition";
+
+	compatible = "wd,mbwe", "oxsemi,ox810se";
+
+	chosen {
+		bootargs = "console=ttyS1,115200n8 earlyprintk=serial";
+	};
+
+	memory {
+		/* 128Mbytes DDR */
+		reg = <0x48000000 0x8000000>;
+	};
+
+	aliases {
+		serial1 = &uart1;
+		gpio0 = &gpio0;
+		gpio1 = &gpio1;
+	};
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <100>;
+
+		power {
+			label = "power";
+			gpios = <&gpio0 0 1>;
+			linux,code = <0x198>;
+		};
+
+		recovery {
+			label = "recovery";
+			gpios = <&gpio0 4 1>;
+			linux,code = <0xab>;
+		};
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		a0 {
+			label = "activity0";
+			gpios = <&gpio0 25 0>;
+			default-state = "keep";
+		};
+
+		a1 {
+			label = "activity1";
+			gpios = <&gpio0 26 0>;
+			default-state = "keep";
+		};
+
+		a2 {
+			label = "activity2";
+			gpios = <&gpio0 5 0>;
+			default-state = "keep";
+		};
+
+		a3 {
+			label = "activity3";
+			gpios = <&gpio0 6 0>;
+			default-state = "keep";
+		};
+
+		a4 {
+			label = "activity4";
+			gpios = <&gpio0 7 0>;
+			default-state = "keep";
+		};
+
+		a5 {
+			label = "activity5";
+			gpios = <&gpio1 2 0>;
+			default-state = "keep";
+		};
+	};
+
+	i2c-gpio {
+		compatible = "i2c-gpio";
+		gpios = <&gpio0 3 0 /* sda */
+			 &gpio0 2 0 /* scl */
+			 >;
+		i2c-gpio,delay-us = <2>;        /* ~100 kHz */
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		rtc0: rtc@48 {
+			compatible = "st,m41t00";
+			reg = <0x68>;
+		};
+	};
+};
+
+&uart1 {
+	status = "okay";
+
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_uart1>;
+};
-- 
1.9.1

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#1353958 — [PATCH v2 08/18] dt-bindings: Add PLX Technology Reset Controller bindings

FromNeil Armstrong <narmstrong@baylibre.com>
Date2016-03-09 11:30 +0100
Subject[PATCH v2 08/18] dt-bindings: Add PLX Technology Reset Controller bindings
Message-ID<raJxo-6vl-29@gated-at.bofh.it>
In reply to#1353954
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
 .../devicetree/bindings/reset/plxtech,reset.txt    | 58 ++++++++++++++++++++++
 1 file changed, 58 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/reset/plxtech,reset.txt

diff --git a/Documentation/devicetree/bindings/reset/plxtech,reset.txt b/Documentation/devicetree/bindings/reset/plxtech,reset.txt
new file mode 100644
index 0000000..581c974
--- /dev/null
+++ b/Documentation/devicetree/bindings/reset/plxtech,reset.txt
@@ -0,0 +1,58 @@
+PLX Technology OXNAS SoC Family RESET Controller
+================================================
+
+Please also refer to reset.txt in this directory for common reset
+controller binding usage.
+
+Required properties:
+- compatible: Should be "oxsemi,ox810se-reset"
+- #reset-cells: 1, see below
+
+Parent node should have the following properties :
+- compatible: Should be "oxsemi,ox810se-sys-ctrl", "syscon", "simple-mfd"
+
+For OX810SE, the indices are :
+ - 0 : ARM
+ - 1 : COPRO
+ - 2 : Reserved
+ - 3 : Reserved
+ - 4 : USBHS
+ - 5 : USBHSPHY
+ - 6 : MAC
+ - 7 : PCI
+ - 8 : DMA
+ - 9 : DPE
+ - 10 : DDR
+ - 11 : SATA
+ - 12 : SATA_LINK
+ - 13 : SATA_PHY
+ - 14 : Reserved
+ - 15 : NAND
+ - 16 : GPIO
+ - 17 : UART1
+ - 18 : UART2
+ - 19 : MISC
+ - 20 : I2S
+ - 21 : AHB_MON
+ - 22 : UART3
+ - 23 : UART4
+ - 24 : SGDMA
+ - 25 : Reserved
+ - 26 : Reserved
+ - 27 : Reserved
+ - 28 : Reserved
+ - 29 : Reserved
+ - 30 : Reserved
+ - 31 : BUS
+
+example:
+
+sys: sys-ctrl@000000 {
+	compatible = "oxsemi,ox810se-sys-ctrl", "syscon", "simple-mfd";
+	reg = <0x000000 0x100000>;
+
+	reset: reset-controller {
+		compatible = "oxsemi,ox810se-reset";
+		#reset-cells = <1>;
+	};
+};
-- 
1.9.1

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#1360064 — Re: [PATCH v2 08/18] dt-bindings: Add PLX Technology Reset Controller bindings

FromRob Herring <robh@kernel.org>
Date2016-03-17 18:20 +0100
SubjectRe: [PATCH v2 08/18] dt-bindings: Add PLX Technology Reset Controller bindings
Message-ID<rdJKy-1PB-13@gated-at.bofh.it>
In reply to#1353958
On Wed, Mar 09, 2016 at 11:24:10AM +0100, Neil Armstrong wrote:
> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
> ---
>  .../devicetree/bindings/reset/plxtech,reset.txt    | 58 ++++++++++++++++++++++
>  1 file changed, 58 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/reset/plxtech,reset.txt

Acked-by: Rob Herring <robh@kernel.org>

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#1353959 — [PATCH v2 13/18] arm: Add new mach-oxnas

FromNeil Armstrong <narmstrong@baylibre.com>
Date2016-03-09 11:30 +0100
Subject[PATCH v2 13/18] arm: Add new mach-oxnas
Message-ID<raJxo-6vl-27@gated-at.bofh.it>
In reply to#1353954
Add mach-oxnas directory containing Kconfig.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
 arch/arm/mach-oxnas/Kconfig  | 25 +++++++++++++++++++++++++
 arch/arm/mach-oxnas/Makefile |  1 +
 2 files changed, 26 insertions(+)
 create mode 100644 arch/arm/mach-oxnas/Kconfig
 create mode 100644 arch/arm/mach-oxnas/Makefile

diff --git a/arch/arm/mach-oxnas/Kconfig b/arch/arm/mach-oxnas/Kconfig
new file mode 100644
index 0000000..63cba044
--- /dev/null
+++ b/arch/arm/mach-oxnas/Kconfig
@@ -0,0 +1,25 @@
+menuconfig ARCH_OXNAS
+	bool "PLX Technology OXNAS Family SoCs"
+	select ARCH_REQUIRE_GPIOLIB
+	select ARCH_HAS_RESET_CONTROLLER
+	select PINCTRL
+	depends on ARCH_MULTI_V5
+	help
+	  Support for OxNas SoC family developed by PLX Technology.
+	  (Formely Oxford Semiconductor)
+
+if ARCH_OXNAS
+
+config MACH_OX810SE
+	bool "Support OX810SE Based Products"
+	select ARM_TIMER_SP804
+	select COMMON_CLK_OXNAS
+	select CPU_ARM926T
+	select MFD_SYSCON
+	select PINCTRL_OXNAS
+	select RESET_OXNAS
+	select VERSATILE_FPGA_IRQ
+	help
+	  Include Support for the Oxford Semiconductor OX810SE SoC Based Products.
+
+endif
diff --git a/arch/arm/mach-oxnas/Makefile b/arch/arm/mach-oxnas/Makefile
new file mode 100644
index 0000000..d98d860
--- /dev/null
+++ b/arch/arm/mach-oxnas/Makefile
@@ -0,0 +1 @@
+# Nothing Yet
-- 
1.9.1

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#1353960 — [PATCH v2 07/18] reset: Add PLX Technology Reset Controller driver

FromNeil Armstrong <narmstrong@baylibre.com>
Date2016-03-09 11:30 +0100
Subject[PATCH v2 07/18] reset: Add PLX Technology Reset Controller driver
Message-ID<raJxp-6vl-33@gated-at.bofh.it>
In reply to#1353954
Add System reset controller driver for PLX Technology OXNAS SoC Family.

CC: Ma Haijun <mahaijuns@gmail.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
 drivers/reset/Kconfig       |   3 +
 drivers/reset/Makefile      |   1 +
 drivers/reset/reset-oxnas.c | 136 ++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 140 insertions(+)
 create mode 100644 drivers/reset/reset-oxnas.c

diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
index df37212..0b2733d 100644
--- a/drivers/reset/Kconfig
+++ b/drivers/reset/Kconfig
@@ -12,5 +12,8 @@ menuconfig RESET_CONTROLLER
 
 	  If unsure, say no.
 
+config RESET_OXNAS
+	bool
+
 source "drivers/reset/sti/Kconfig"
 source "drivers/reset/hisilicon/Kconfig"
diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile
index 4d7178e..97e04c5 100644
--- a/drivers/reset/Makefile
+++ b/drivers/reset/Makefile
@@ -7,3 +7,4 @@ obj-$(CONFIG_ARCH_STI) += sti/
 obj-$(CONFIG_ARCH_HISI) += hisilicon/
 obj-$(CONFIG_ARCH_ZYNQ) += reset-zynq.o
 obj-$(CONFIG_ATH79) += reset-ath79.o
+obj-$(CONFIG_RESET_OXNAS) += reset-oxnas.o
diff --git a/drivers/reset/reset-oxnas.c b/drivers/reset/reset-oxnas.c
new file mode 100644
index 0000000..9cce026
--- /dev/null
+++ b/drivers/reset/reset-oxnas.c
@@ -0,0 +1,136 @@
+/*
+ * drivers/reset/reset-oxnas.c
+ *
+ * Copyright (C) 2016 Neil Armstrong <narmstrong@baylibre.com>
+ * Copyright (C) 2014 Ma Haijun <mahaijuns@gmail.com>
+ * Copyright (C) 2009 Oxford Semiconductor Ltd
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+#include <linux/err.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+#include <linux/reset-controller.h>
+#include <linux/slab.h>
+#include <linux/delay.h>
+#include <linux/types.h>
+#include <linux/regmap.h>
+#include <linux/mfd/syscon.h>
+
+/* Regmap offsets */
+#define RST_SET_REGOFFSET	0x34
+#define RST_CLR_REGOFFSET	0x38
+
+struct oxnas_reset {
+	struct regmap *regmap;
+	struct reset_controller_dev rcdev;
+};
+
+static int oxnas_reset_reset(struct reset_controller_dev *rcdev,
+			      unsigned long id)
+{
+	struct oxnas_reset *data =
+		container_of(rcdev, struct oxnas_reset, rcdev);
+
+	regmap_write(data->regmap, RST_SET_REGOFFSET, BIT(id));
+	msleep(50);
+	regmap_write(data->regmap, RST_CLR_REGOFFSET, BIT(id));
+
+	return 0;
+}
+
+static int oxnas_reset_assert(struct reset_controller_dev *rcdev,
+			      unsigned long id)
+{
+	struct oxnas_reset *data =
+		container_of(rcdev, struct oxnas_reset, rcdev);
+
+	regmap_write(data->regmap, RST_SET_REGOFFSET, BIT(id));
+
+	return 0;
+}
+
+static int oxnas_reset_deassert(struct reset_controller_dev *rcdev,
+				unsigned long id)
+{
+	struct oxnas_reset *data =
+		container_of(rcdev, struct oxnas_reset, rcdev);
+
+	regmap_write(data->regmap, RST_CLR_REGOFFSET, BIT(id));
+
+	return 0;
+}
+
+static const struct reset_control_ops oxnas_reset_ops = {
+	.reset		= oxnas_reset_reset,
+	.assert		= oxnas_reset_assert,
+	.deassert	= oxnas_reset_deassert,
+};
+
+static const struct of_device_id oxnas_reset_dt_ids[] = {
+	 { .compatible = "oxsemi,ox810se-reset", },
+	 { /* sentinel */ },
+};
+MODULE_DEVICE_TABLE(of, oxnas_reset_dt_ids);
+
+static int oxnas_reset_probe(struct platform_device *pdev)
+{
+	struct oxnas_reset *data;
+	struct device *parent;
+
+	parent = pdev->dev.parent;
+	if (!parent) {
+		dev_err(&pdev->dev, "no parent\n");
+		return -ENODEV;
+	}
+
+	data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
+	if (!data)
+		return -ENOMEM;
+
+	data->regmap = syscon_node_to_regmap(parent->of_node);
+	if (IS_ERR(data->regmap)) {
+		dev_err(&pdev->dev, "failed to get parent regmap\n");
+		return PTR_ERR(data->regmap);
+	}
+
+	platform_set_drvdata(pdev, data);
+
+	data->rcdev.owner = THIS_MODULE;
+	data->rcdev.nr_resets = 32;
+	data->rcdev.ops = &oxnas_reset_ops;
+	data->rcdev.of_node = pdev->dev.of_node;
+
+	return reset_controller_register(&data->rcdev);
+}
+
+static int oxnas_reset_remove(struct platform_device *pdev)
+{
+	struct oxnas_reset *data = platform_get_drvdata(pdev);
+
+	reset_controller_unregister(&data->rcdev);
+
+	return 0;
+}
+
+static struct platform_driver oxnas_reset_driver = {
+	.probe	= oxnas_reset_probe,
+	.remove	= oxnas_reset_remove,
+	.driver = {
+		.name		= "oxnas-reset",
+		.of_match_table	= oxnas_reset_dt_ids,
+	},
+};
+
+module_platform_driver(oxnas_reset_driver);
-- 
1.9.1

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#1353962 — [PATCH v2 02/18] dt-bindings: timer: sp804: add timer-width property

FromNeil Armstrong <narmstrong@baylibre.com>
Date2016-03-09 11:30 +0100
Subject[PATCH v2 02/18] dt-bindings: timer: sp804: add timer-width property
Message-ID<raJxo-6vl-31@gated-at.bofh.it>
In reply to#1353954
Add timer-width optional property to specify a different vendor
specific timer counter bit-width.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
 Documentation/devicetree/bindings/timer/arm,sp804.txt | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/timer/arm,sp804.txt b/Documentation/devicetree/bindings/timer/arm,sp804.txt
index 5cd8eee7..141e143 100644
--- a/Documentation/devicetree/bindings/timer/arm,sp804.txt
+++ b/Documentation/devicetree/bindings/timer/arm,sp804.txt
@@ -17,6 +17,8 @@ Optional properties:
 - arm,sp804-has-irq = <#>: In the case of only 1 timer irq line connected, this
 	specifies if the irq connection is for timer 1 or timer 2. A value of 1
 	or 2 should be used.
+- arm,timer-width: Should contain the width in number of bits of the counter,
+	is considered by default 32 but can be changed for vendor variants.
 
 Example:
 
-- 
1.9.1

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#1360050 — Re: [PATCH v2 02/18] dt-bindings: timer: sp804: add timer-width property

FromRob Herring <robh@kernel.org>
Date2016-03-17 18:10 +0100
SubjectRe: [PATCH v2 02/18] dt-bindings: timer: sp804: add timer-width property
Message-ID<rdJAS-1Mf-7@gated-at.bofh.it>
In reply to#1353962
On Wed, Mar 09, 2016 at 11:24:04AM +0100, Neil Armstrong wrote:
> Add timer-width optional property to specify a different vendor
> specific timer counter bit-width.
> 
> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
> ---
>  Documentation/devicetree/bindings/timer/arm,sp804.txt | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/timer/arm,sp804.txt b/Documentation/devicetree/bindings/timer/arm,sp804.txt
> index 5cd8eee7..141e143 100644
> --- a/Documentation/devicetree/bindings/timer/arm,sp804.txt
> +++ b/Documentation/devicetree/bindings/timer/arm,sp804.txt
> @@ -17,6 +17,8 @@ Optional properties:
>  - arm,sp804-has-irq = <#>: In the case of only 1 timer irq line connected, this
>  	specifies if the irq connection is for timer 1 or timer 2. A value of 1
>  	or 2 should be used.
> +- arm,timer-width: Should contain the width in number of bits of the counter,
> +	is considered by default 32 but can be changed for vendor variants.

That would not be an SP804 nor would the vendor be ARM in that case. So 
add a new compatible string for the vendor that decided to hack up ARM's 
IP block.

Rob

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#1360116 — Re: [PATCH v2 02/18] dt-bindings: timer: sp804: add timer-width property

FromRobin Murphy <robin.murphy@arm.com>
Date2016-03-17 19:10 +0100
SubjectRe: [PATCH v2 02/18] dt-bindings: timer: sp804: add timer-width property
Message-ID<rdKwY-2ml-45@gated-at.bofh.it>
In reply to#1360050
Hi Rob,

On 17/03/16 17:09, Rob Herring wrote:
> On Wed, Mar 09, 2016 at 11:24:04AM +0100, Neil Armstrong wrote:
>> Add timer-width optional property to specify a different vendor
>> specific timer counter bit-width.
>>
>> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
>> ---
>>   Documentation/devicetree/bindings/timer/arm,sp804.txt | 2 ++
>>   1 file changed, 2 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/timer/arm,sp804.txt b/Documentation/devicetree/bindings/timer/arm,sp804.txt
>> index 5cd8eee7..141e143 100644
>> --- a/Documentation/devicetree/bindings/timer/arm,sp804.txt
>> +++ b/Documentation/devicetree/bindings/timer/arm,sp804.txt
>> @@ -17,6 +17,8 @@ Optional properties:
>>   - arm,sp804-has-irq = <#>: In the case of only 1 timer irq line connected, this
>>   	specifies if the irq connection is for timer 1 or timer 2. A value of 1
>>   	or 2 should be used.
>> +- arm,timer-width: Should contain the width in number of bits of the counter,
>> +	is considered by default 32 but can be changed for vendor variants.
>
> That would not be an SP804 nor would the vendor be ARM in that case. So
> add a new compatible string for the vendor that decided to hack up ARM's
> IP block.

By all accounts this is some ancient reference design[1] which later 
evolved _into_ the SP804, so that vendor would probably still be ARM ;)

A separate compatible string would indeed make more sense, though. Both 
semantically and in terms of letting the driver account for the 
differences automatically.

Robin.

[1]:http://infocenter.arm.com/help/topic/com.arm.doc.ddi0170a/I350250.html

>
> Rob
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>

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#1360140 — Re: [PATCH v2 02/18] dt-bindings: timer: sp804: add timer-width property

FromRob Herring <robh@kernel.org>
Date2016-03-17 20:10 +0100
SubjectRe: [PATCH v2 02/18] dt-bindings: timer: sp804: add timer-width property
Message-ID<rdLt0-2VH-17@gated-at.bofh.it>
In reply to#1360116
On Thu, Mar 17, 2016 at 1:06 PM, Robin Murphy <robin.murphy@arm.com> wrote:
> Hi Rob,
>
> On 17/03/16 17:09, Rob Herring wrote:
>>
>> On Wed, Mar 09, 2016 at 11:24:04AM +0100, Neil Armstrong wrote:
>>>
>>> Add timer-width optional property to specify a different vendor
>>> specific timer counter bit-width.
>>>
>>> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
>>> ---
>>>   Documentation/devicetree/bindings/timer/arm,sp804.txt | 2 ++
>>>   1 file changed, 2 insertions(+)
>>>
>>> diff --git a/Documentation/devicetree/bindings/timer/arm,sp804.txt
>>> b/Documentation/devicetree/bindings/timer/arm,sp804.txt
>>> index 5cd8eee7..141e143 100644
>>> --- a/Documentation/devicetree/bindings/timer/arm,sp804.txt
>>> +++ b/Documentation/devicetree/bindings/timer/arm,sp804.txt
>>> @@ -17,6 +17,8 @@ Optional properties:
>>>   - arm,sp804-has-irq = <#>: In the case of only 1 timer irq line
>>> connected, this
>>>         specifies if the irq connection is for timer 1 or timer 2. A
>>> value of 1
>>>         or 2 should be used.
>>> +- arm,timer-width: Should contain the width in number of bits of the
>>> counter,
>>> +       is considered by default 32 but can be changed for vendor
>>> variants.
>>
>>
>> That would not be an SP804 nor would the vendor be ARM in that case. So
>> add a new compatible string for the vendor that decided to hack up ARM's
>> IP block.
>
>
> By all accounts this is some ancient reference design[1] which later evolved
> _into_ the SP804, so that vendor would probably still be ARM ;)

Right.

> A separate compatible string would indeed make more sense, though. Both
> semantically and in terms of letting the driver account for the differences
> automatically.
>
> Robin.
>
> [1]:http://infocenter.arm.com/help/topic/com.arm.doc.ddi0170a/I350250.html

Humm, same as integrator timers perhaps?

Rob

>
>>
>> Rob
>>
>> _______________________________________________
>> linux-arm-kernel mailing list
>> linux-arm-kernel@lists.infradead.org
>> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>>
>

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#1360142 — Re: [PATCH v2 02/18] dt-bindings: timer: sp804: add timer-width property

FromRobin Murphy <robin.murphy@arm.com>
Date2016-03-17 20:30 +0100
SubjectRe: [PATCH v2 02/18] dt-bindings: timer: sp804: add timer-width property
Message-ID<rdLMm-32d-3@gated-at.bofh.it>
In reply to#1360140
On 17/03/16 19:00, Rob Herring wrote:
> On Thu, Mar 17, 2016 at 1:06 PM, Robin Murphy <robin.murphy@arm.com> wrote:
>> Hi Rob,
>>
>> On 17/03/16 17:09, Rob Herring wrote:
>>>
>>> On Wed, Mar 09, 2016 at 11:24:04AM +0100, Neil Armstrong wrote:
>>>>
>>>> Add timer-width optional property to specify a different vendor
>>>> specific timer counter bit-width.
>>>>
>>>> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
>>>> ---
>>>>    Documentation/devicetree/bindings/timer/arm,sp804.txt | 2 ++
>>>>    1 file changed, 2 insertions(+)
>>>>
>>>> diff --git a/Documentation/devicetree/bindings/timer/arm,sp804.txt
>>>> b/Documentation/devicetree/bindings/timer/arm,sp804.txt
>>>> index 5cd8eee7..141e143 100644
>>>> --- a/Documentation/devicetree/bindings/timer/arm,sp804.txt
>>>> +++ b/Documentation/devicetree/bindings/timer/arm,sp804.txt
>>>> @@ -17,6 +17,8 @@ Optional properties:
>>>>    - arm,sp804-has-irq = <#>: In the case of only 1 timer irq line
>>>> connected, this
>>>>          specifies if the irq connection is for timer 1 or timer 2. A
>>>> value of 1
>>>>          or 2 should be used.
>>>> +- arm,timer-width: Should contain the width in number of bits of the
>>>> counter,
>>>> +       is considered by default 32 but can be changed for vendor
>>>> variants.
>>>
>>>
>>> That would not be an SP804 nor would the vendor be ARM in that case. So
>>> add a new compatible string for the vendor that decided to hack up ARM's
>>> IP block.
>>
>>
>> By all accounts this is some ancient reference design[1] which later evolved
>> _into_ the SP804, so that vendor would probably still be ARM ;)
>
> Right.
>
>> A separate compatible string would indeed make more sense, though. Both
>> semantically and in terms of letting the driver account for the differences
>> automatically.
>>
>> Robin.
>>
>> [1]:http://infocenter.arm.com/help/topic/com.arm.doc.ddi0170a/I350250.html
>
> Humm, same as integrator timers perhaps?

Having had a quick look, what the Integrator/AP manual describes 
certainly smells like the same basic block as the "AMBA Timer" - 16 bit 
counters and the same control register layout - albeit in a mutant 
triple-timer version with a bigger offset between each register set. 
Integrator/CP, on the other hand, looks much more SP804-like.

Robin.

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#1362432 — Re: [PATCH v2 02/18] dt-bindings: timer: sp804: add timer-width property

FromNeil Armstrong <narmstrong@baylibre.com>
Date2016-03-22 10:30 +0100
SubjectRe: [PATCH v2 02/18] dt-bindings: timer: sp804: add timer-width property
Message-ID<rfqNs-2nj-17@gated-at.bofh.it>
In reply to#1360142
On 03/17/2016 08:21 PM, Robin Murphy wrote:
> On 17/03/16 19:00, Rob Herring wrote:
>> On Thu, Mar 17, 2016 at 1:06 PM, Robin Murphy <robin.murphy@arm.com> wrote:
>>> Hi Rob,
>>>
>>> On 17/03/16 17:09, Rob Herring wrote:
>>>> That would not be an SP804 nor would the vendor be ARM in that case. So
>>>> add a new compatible string for the vendor that decided to hack up ARM's
>>>> IP block.
>>>
>>>
>>> By all accounts this is some ancient reference design[1] which later evolved
>>> _into_ the SP804, so that vendor would probably still be ARM ;)
>>
>> Right.
>>
>>> A separate compatible string would indeed make more sense, though. Both
>>> semantically and in terms of letting the driver account for the differences
>>> automatically.
>>>
>>> Robin.
>>>
>>> [1]:http://infocenter.arm.com/help/topic/com.arm.doc.ddi0170a/I350250.html
>>
>> Humm, same as integrator timers perhaps?
> 
> Having had a quick look, what the Integrator/AP manual describes certainly smells like the same basic block as the "AMBA Timer" - 16 bit counters and the same control register layout - albeit in a mutant triple-timer version with a bigger offset between each register set. Integrator/CP, on the other hand, looks much more SP804-like.
> 
> Robin.
> 

Hi,

I will switch to oxsemi,ox810se-rps-timer since it need a specific register width that will be handled by the driver.

Thanks,
Neil

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#1362675 — Re: [PATCH v2 02/18] dt-bindings: timer: sp804: add timer-width property

FromRobin Murphy <robin.murphy@arm.com>
Date2016-03-22 13:10 +0100
SubjectRe: [PATCH v2 02/18] dt-bindings: timer: sp804: add timer-width property
Message-ID<rftih-49b-5@gated-at.bofh.it>
In reply to#1362432
Hi Neil,

On 22/03/16 09:21, Neil Armstrong wrote:
> On 03/17/2016 08:21 PM, Robin Murphy wrote:
>> On 17/03/16 19:00, Rob Herring wrote:
>>> On Thu, Mar 17, 2016 at 1:06 PM, Robin Murphy <robin.murphy@arm.com> wrote:
>>>> Hi Rob,
>>>>
>>>> On 17/03/16 17:09, Rob Herring wrote:
>>>>> That would not be an SP804 nor would the vendor be ARM in that case. So
>>>>> add a new compatible string for the vendor that decided to hack up ARM's
>>>>> IP block.
>>>>
>>>>
>>>> By all accounts this is some ancient reference design[1] which later evolved
>>>> _into_ the SP804, so that vendor would probably still be ARM ;)
>>>
>>> Right.
>>>
>>>> A separate compatible string would indeed make more sense, though. Both
>>>> semantically and in terms of letting the driver account for the differences
>>>> automatically.
>>>>
>>>> Robin.
>>>>
>>>> [1]:http://infocenter.arm.com/help/topic/com.arm.doc.ddi0170a/I350250.html
>>>
>>> Humm, same as integrator timers perhaps?
>>
>> Having had a quick look, what the Integrator/AP manual describes certainly smells like the same basic block as the "AMBA Timer" - 16 bit counters and the same control register layout - albeit in a mutant triple-timer version with a bigger offset between each register set. Integrator/CP, on the other hand, looks much more SP804-like.
>>
>> Robin.
>>
>
> Hi,
>
> I will switch to oxsemi,ox810se-rps-timer since it need a specific register width that will be handled by the driver.

By "needs a specific register width" do you mean the OxSemi 
implementation will give a bus error on a 32-bit access and requires 
16-bit accessors? If so, I'd expect to see patch 1 changing readl()s to 
readw()s at least somewhere. Otherwise, if it's merely that the 
clocksource API needs to know the upper 16 bits of a word it reads are 
undefined, then since that's the standard behaviour I'd be inclined to 
add it to the driver as a canonical "arm,amba-timer" implementation, 
then have your implementation-specific compatible on top of that just in 
case.

Robin.

>
> Thanks,
> Neil
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>

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#1362776 — Re: [PATCH v2 02/18] dt-bindings: timer: sp804: add timer-width property

FromNeil Armstrong <narmstrong@baylibre.com>
Date2016-03-22 15:40 +0100
SubjectRe: [PATCH v2 02/18] dt-bindings: timer: sp804: add timer-width property
Message-ID<rfvDs-5NV-19@gated-at.bofh.it>
In reply to#1362675
On 03/22/2016 01:02 PM, Robin Murphy wrote:
> Hi Neil,
>>>>
>>>> Humm, same as integrator timers perhaps?
>>>
>>> Having had a quick look, what the Integrator/AP manual describes certainly smells like the same basic block as the "AMBA Timer" - 16 bit counters and the same control register layout - albeit in a mutant triple-timer version with a bigger offset between each register set. Integrator/CP, on the other hand, looks much more SP804-like.
>>>
>>> Robin.
>>>
>>
>> Hi,
>>
>> I will switch to oxsemi,ox810se-rps-timer since it need a specific register width that will be handled by the driver.
> 
> By "needs a specific register width" do you mean the OxSemi implementation will give a bus error on a 32-bit access and requires 16-bit accessors? If so, I'd expect to see patch 1 changing readl()s to readw()s at least somewhere. Otherwise, if it's merely that the clocksource API needs to know the upper 16 bits of a word it reads are undefined, then since that's the standard behaviour I'd be inclined to add it to the driver as a canonical "arm,amba-timer" implementation, then have your implementation-specific compatible on top of that just in case.

No actually the bus access is 32bit but the counter is 24bit wide instead of 16bit, so the clocksource won't work and the system time will furiously drift. It's not the case of the clockevent since the delay fits in 24 bits.

It also seems is ignores the 32BIT config bit, so it seems based on the initial 16bit only reference design.

How do you think I should implement this ?

Neil

> Robin.
> 
>>
>> Thanks,
>> Neil
>>
>> _______________________________________________
>> linux-arm-kernel mailing list
>> linux-arm-kernel@lists.infradead.org
>> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>>
>

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#1353964 — [PATCH v2 14/18] arm: Add build support for mach-oxnas

FromNeil Armstrong <narmstrong@baylibre.com>
Date2016-03-09 11:30 +0100
Subject[PATCH v2 14/18] arm: Add build support for mach-oxnas
Message-ID<raJxp-6vl-79@gated-at.bofh.it>
In reply to#1353954
Add Kconfig and Makefile support for mach-oxnas.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
 arch/arm/Kconfig  | 2 ++
 arch/arm/Makefile | 1 +
 2 files changed, 3 insertions(+)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 4f799e5..2025fc9 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -801,6 +801,8 @@ source "arch/arm/plat-pxa/Kconfig"
 
 source "arch/arm/mach-mmp/Kconfig"
 
+source "arch/arm/mach-oxnas/Kconfig"
+
 source "arch/arm/mach-qcom/Kconfig"
 
 source "arch/arm/mach-realview/Kconfig"
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index fe25410..0e96c63 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -194,6 +194,7 @@ machine-$(CONFIG_ARCH_NSPIRE)		+= nspire
 machine-$(CONFIG_ARCH_OMAP1)		+= omap1
 machine-$(CONFIG_ARCH_OMAP2PLUS)	+= omap2
 machine-$(CONFIG_ARCH_ORION5X)		+= orion5x
+machine-$(CONFIG_ARCH_OXNAS)		+= oxnas
 machine-$(CONFIG_ARCH_PICOXCELL)	+= picoxcell
 machine-$(CONFIG_ARCH_PXA)		+= pxa
 machine-$(CONFIG_ARCH_QCOM)		+= qcom
-- 
1.9.1

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#1353965 — [PATCH v2 06/18] dt-bindings: Add Oxford Semiconductors to vendor prefixes

FromNeil Armstrong <narmstrong@baylibre.com>
Date2016-03-09 11:30 +0100
Subject[PATCH v2 06/18] dt-bindings: Add Oxford Semiconductors to vendor prefixes
Message-ID<raJxp-6vl-81@gated-at.bofh.it>
In reply to#1353954
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
 Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt
index 8c084c1..188671f 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.txt
+++ b/Documentation/devicetree/bindings/vendor-prefixes.txt
@@ -170,6 +170,7 @@ opencores	OpenCores.org
 option	Option NV
 ortustech	Ortus Technology Co., Ltd.
 ovti	OmniVision Technologies
+oxsemi	Oxford Semiconductors, Ltd.
 panasonic	Panasonic Corporation
 parade	Parade Technologies Inc.
 pericom	Pericom Technology Inc.
-- 
1.9.1

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#1360066 — Re: [PATCH v2 06/18] dt-bindings: Add Oxford Semiconductors to vendor prefixes

FromRob Herring <robh@kernel.org>
Date2016-03-17 18:20 +0100
SubjectRe: [PATCH v2 06/18] dt-bindings: Add Oxford Semiconductors to vendor prefixes
Message-ID<rdJKy-1PB-19@gated-at.bofh.it>
In reply to#1353965
On Wed, Mar 09, 2016 at 11:24:08AM +0100, Neil Armstrong wrote:
> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
> ---
>  Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
>  1 file changed, 1 insertion(+)

Acked-by: Rob Herring <robh@kernel.org>

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#1353967 — [PATCH v2 04/18] dt-bindings: irq: arm,versatile-fpga: add arm,rps-irq compatible string

FromNeil Armstrong <narmstrong@baylibre.com>
Date2016-03-09 11:30 +0100
Subject[PATCH v2 04/18] dt-bindings: irq: arm,versatile-fpga: add arm,rps-irq compatible string
Message-ID<raJxp-6vl-85@gated-at.bofh.it>
In reply to#1353954
Under the OX810SE, this same controller is used as "Reference Peripheral
Specification" Interrupt Controller, so add new compatible string.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
 .../devicetree/bindings/interrupt-controller/arm,versatile-fpga-irq.txt | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/interrupt-controller/arm,versatile-fpga-irq.txt b/Documentation/devicetree/bindings/interrupt-controller/arm,versatile-fpga-irq.txt
index c9cf605..2fe78d5 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/arm,versatile-fpga-irq.txt
+++ b/Documentation/devicetree/bindings/interrupt-controller/arm,versatile-fpga-irq.txt
@@ -6,7 +6,7 @@ controllers are OR:ed together and fed to the CPU tile's IRQ input. Each
 instance can handle up to 32 interrupts.
 
 Required properties:
-- compatible: "arm,versatile-fpga-irq"
+- compatible: "arm,versatile-fpga-irq" or "arm,rps-irq"
 - interrupt-controller: Identifies the node as an interrupt controller
 - #interrupt-cells: The number of cells to define the interrupts.  Must be 1
   as the FPGA IRQ controller has no configuration options for interrupt
-- 
1.9.1

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