Groups | Search | Server Info | Keyboard shortcuts | Login | Register [http] [https] [nntp] [nntps]
Groups > linux.kernel > #1353674 > unrolled thread
| Started by | Heiko Stuebner <heiko@sntech.de> |
|---|---|
| First post | 2016-03-09 02:20 +0100 |
| Last post | 2016-03-09 02:20 +0100 |
| Articles | 1 — 1 participant |
Back to article view | Back to linux.kernel
This discussion starts older than the indexed window; earlier articles aren't shown. The article labeled Started by
below is the oldest one visible, not the original post.
Re: [RESEND PATCH v2 1/5] clk: rockchip: add more mux parameters for new pll sources Heiko Stuebner <heiko@sntech.de> - 2016-03-09 02:20 +0100
| From | Heiko Stuebner <heiko@sntech.de> |
|---|---|
| Date | 2016-03-09 02:20 +0100 |
| Subject | Re: [RESEND PATCH v2 1/5] clk: rockchip: add more mux parameters for new pll sources |
| Message-ID | <raAX8-Er-21@gated-at.bofh.it> |
Am Dienstag, 1. März 2016, 18:14:31 schrieb Xing Zheng: > Thers are only two parent PLLs that APLL and GPLL for core on the > previous SoCs (RK3066/RK3188/RK3288/RK3368). Hence, we set fixed > GPLL as alternate parent when core is switching freq. > > Since RK3399 big.LITTLE architecture, we need to select and adapt > more PLLs (ALPLL/ABPLL/DPLL/GPLL) sources. > > Signed-off-by: Xing Zheng <zhengxing@rock-chips.com> note to self: looks good to go
Back to top | Article view | linux.kernel
csiph-web