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| Started by | Caesar Wang <wxt@rock-chips.com> |
|---|---|
| First post | 2016-07-26 08:20 +0200 |
| Last post | 2016-07-26 08:20 +0200 |
| Articles | 1 — 1 participant |
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[PATCH 3/4] arm64: dts: rockchip: add reset saradc node for rk3368 SoCs Caesar Wang <wxt@rock-chips.com> - 2016-07-26 08:20 +0200
| From | Caesar Wang <wxt@rock-chips.com> |
|---|---|
| Date | 2016-07-26 08:20 +0200 |
| Subject | [PATCH 3/4] arm64: dts: rockchip: add reset saradc node for rk3368 SoCs |
| Message-ID | <rZ3SF-6Uk-5@gated-at.bofh.it> |
SARADC controller needs to be reset before programming it, otherwise it will not function properly. Signed-off-by: Caesar Wang <wxt@rock-chips.com> --- arch/arm64/boot/dts/rockchip/rk3368.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi index d02a9003..4f44d11 100644 --- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi @@ -270,6 +270,8 @@ #io-channel-cells = <1>; clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>; clock-names = "saradc", "apb_pclk"; + resets = <&cru SRST_SARADC>; + reset-names = "saradc-apb"; status = "disabled"; }; -- 1.9.1
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