Groups | Search | Server Info | Keyboard shortcuts | Login | Register [http] [https] [nntp] [nntps]


Groups > linux.kernel > #1450391

[PATCH 3/4] arm64: dts: rockchip: add reset saradc node for rk3368 SoCs

From Caesar Wang <wxt@rock-chips.com>
Newsgroups linux.kernel
Subject [PATCH 3/4] arm64: dts: rockchip: add reset saradc node for rk3368 SoCs
Date 2016-07-26 08:20 +0200
Message-ID <rZ3SF-6Uk-5@gated-at.bofh.it> (permalink)
References <rZ3SF-6Uk-7@gated-at.bofh.it>
Organization linux.* mail to news gateway

Show all headers | View raw


SARADC controller needs to be reset before programming it, otherwise
it will not function properly.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
---

 arch/arm64/boot/dts/rockchip/rk3368.dtsi | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
index d02a9003..4f44d11 100644
--- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
@@ -270,6 +270,8 @@
 		#io-channel-cells = <1>;
 		clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>;
 		clock-names = "saradc", "apb_pclk";
+		resets = <&cru SRST_SARADC>;
+		reset-names = "saradc-apb";
 		status = "disabled";
 	};
 
-- 
1.9.1

Back to linux.kernel | Previous | Next | Find similar | Unroll thread


Thread

[PATCH 3/4] arm64: dts: rockchip: add reset saradc node for rk3368 SoCs Caesar Wang <wxt@rock-chips.com> - 2016-07-26 08:20 +0200

csiph-web