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Groups > linux.kernel > #1444852 > unrolled thread

[PATCH v0 00/10] Convert Netgear WNR854T to devicetree

Started byJamie Lentin <jm@lentin.co.uk>
First post2016-07-16 17:10 +0200
Last post2016-07-17 22:50 +0200
Articles 7 on this page of 27 — 6 participants

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Contents

  [PATCH v0 00/10] Convert Netgear WNR854T to devicetree Jamie Lentin <jm@lentin.co.uk> - 2016-07-16 17:10 +0200
    [PATCH v0 09/10] net: phy: Re-attempt custom DT configuration after configuration Jamie Lentin <jm@lentin.co.uk> - 2016-07-16 17:10 +0200
      Re: [PATCH v0 09/10] net: phy: Re-attempt custom DT configuration  after configuration Andrew Lunn <andrew@lunn.ch> - 2016-07-16 18:50 +0200
    [PATCH v0 03/10] arm: orion5x: Add clk support for mv88f5181 Jamie Lentin <jm@lentin.co.uk> - 2016-07-16 17:10 +0200
      Re: [PATCH v0 03/10] arm: orion5x: Add clk support for mv88f5181 Andrew Lunn <andrew@lunn.ch> - 2016-07-16 18:20 +0200
      Re: [PATCH v0 03/10] arm: orion5x: Add clk support for mv88f5181 Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> - 2016-07-16 19:40 +0200
      Re: [PATCH v0 03/10] arm: orion5x: Add clk support for mv88f5181 Rob Herring <robh@kernel.org> - 2016-07-17 22:40 +0200
    [PATCH v0 01/10] arm: orion5x: Add required properties for orion-wdt to DT node Jamie Lentin <jm@lentin.co.uk> - 2016-07-16 17:10 +0200
      Re: [PATCH v0 01/10] arm: orion5x: Add required properties for  orion-wdt to DT node Andrew Lunn <andrew@lunn.ch> - 2016-07-16 18:10 +0200
    [PATCH v0 10/10] arm: orion5x: Configure Netgear WNR854T network port LEDs Jamie Lentin <jm@lentin.co.uk> - 2016-07-16 17:10 +0200
    [PATCH v0 06/10] arm: orion5x: Add DT-based support for Netgear WNR854T Jamie Lentin <jm@lentin.co.uk> - 2016-07-16 17:10 +0200
      Re: [PATCH v0 06/10] arm: orion5x: Add DT-based support for Netgear  WNR854T Andrew Lunn <andrew@lunn.ch> - 2016-07-16 18:40 +0200
      Re: [PATCH v0 06/10] arm: orion5x: Add DT-based support for Netgear  WNR854T Andrew Lunn <andrew@lunn.ch> - 2016-07-16 18:40 +0200
      Re: [PATCH v0 06/10] arm: orion5x: Add DT-based support for Netgear WNR854T Arnd Bergmann <arnd@arndb.de> - 2016-07-16 21:20 +0200
        Re: [PATCH v0 06/10] arm: orion5x: Add DT-based support for Netgear  WNR854T Jamie Lentin <jm@lentin.co.uk> - 2016-07-17 12:10 +0200
          Re: [PATCH v0 06/10] arm: orion5x: Add DT-based support for Netgear WNR854T Arnd Bergmann <arnd@arndb.de> - 2016-07-17 22:50 +0200
            Re: [PATCH v0 06/10] arm: orion5x: Add DT-based support for Netgear  WNR854T Thomas Petazzoni <thomas.petazzoni@free-electrons.com> - 2016-07-18 11:50 +0200
              Re: [PATCH v0 06/10] arm: orion5x: Add DT-based support for Netgear WNR854T Arnd Bergmann <arnd@arndb.de> - 2016-07-18 12:10 +0200
                Re: [PATCH v0 06/10] arm: orion5x: Add DT-based support for Netgear WNR854T Arnd Bergmann <arnd@arndb.de> - 2016-07-19 11:50 +0200
                Re: [PATCH v0 06/10] arm: orion5x: Add DT-based support for Netgear  WNR854T Jamie Lentin <jm@lentin.co.uk> - 2016-07-19 12:10 +0200
      Re: [PATCH v0 06/10] arm: orion5x: Add DT-based support for Netgear  WNR854T Rob Herring <robh@kernel.org> - 2016-07-17 23:00 +0200
        Re: [PATCH v0 06/10] arm: orion5x: Add DT-based support for Netgear  WNR854T Jamie Lentin <jm@lentin.co.uk> - 2016-07-19 11:50 +0200
    [PATCH v0 07/10] arm: orion5x: Remove old non-DT-based WNR854T support Jamie Lentin <jm@lentin.co.uk> - 2016-07-16 17:10 +0200
      Re: [PATCH v0 07/10] arm: orion5x: Remove old non-DT-based WNR854T  support Andrew Lunn <andrew@lunn.ch> - 2016-07-16 18:40 +0200
    [PATCH v0 04/10] arm: orion5x: Generalise mv88f5181l pinctrl support for 88f5181 Jamie Lentin <jm@lentin.co.uk> - 2016-07-16 17:10 +0200
      Re: [PATCH v0 04/10] arm: orion5x: Generalise mv88f5181l pinctrl  support for 88f5181 Andrew Lunn <andrew@lunn.ch> - 2016-07-16 18:20 +0200
      Re: [PATCH v0 04/10] arm: orion5x: Generalise mv88f5181l pinctrl  support for 88f5181 Rob Herring <robh@kernel.org> - 2016-07-17 22:50 +0200

Page 2 of 2 — ← Prev page 1 [2]

#1445126 — Re: [PATCH v0 06/10] arm: orion5x: Add DT-based support for Netgear WNR854T

FromRob Herring <robh@kernel.org>
Date2016-07-17 23:00 +0200
SubjectRe: [PATCH v0 06/10] arm: orion5x: Add DT-based support for Netgear WNR854T
Message-ID<rW1kl-5q0-9@gated-at.bofh.it>
In reply to#1444860
On Sat, Jul 16, 2016 at 03:29:04PM +0100, Jamie Lentin wrote:
> This is a router based on the mv88f5181 chipset.
> 
> http://www.netgear.com/support/product/WNR854T.aspx
> http://wiki.openwrt.org/toh/netgear/wnr854t
> 
> Signed-off-by: Jamie Lentin <jm@lentin.co.uk>
> ---
>  .../bindings/arm/marvell/marvell,orion5x.txt       |   1 +
>  arch/arm/boot/dts/Makefile                         |   1 +
>  arch/arm/boot/dts/orion5x-netgear-wnr854t.dts      | 200 +++++++++++++++++++++
>  arch/arm/mach-orion5x/Kconfig                      |   6 +
>  arch/arm/mach-orion5x/Makefile                     |   1 +
>  arch/arm/mach-orion5x/board-wnr854t.c              |  78 ++++++++
>  6 files changed, 287 insertions(+)
>  create mode 100644 arch/arm/boot/dts/orion5x-netgear-wnr854t.dts
>  create mode 100644 arch/arm/mach-orion5x/board-wnr854t.c
> 
> diff --git a/Documentation/devicetree/bindings/arm/marvell/marvell,orion5x.txt b/Documentation/devicetree/bindings/arm/marvell/marvell,orion5x.txt
> index ff3c120..748a8f2 100644
> --- a/Documentation/devicetree/bindings/arm/marvell/marvell,orion5x.txt
> +++ b/Documentation/devicetree/bindings/arm/marvell/marvell,orion5x.txt
> @@ -22,3 +22,4 @@ board. Currently known boards are:
>  "lacie,d2-network"
>  "marvell,rd-88f5182-nas"
>  "maxtor,shared-storage-2"
> +"netgear,wnr854t"
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index 95c1923..63b9202 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -535,6 +535,7 @@ dtb-$(CONFIG_ARCH_ORION5X) += \
>  	orion5x-linkstation-lswtgl.dtb \
>  	orion5x-lswsgl.dtb \
>  	orion5x-maxtor-shared-storage-2.dtb \
> +	orion5x-netgear-wnr854t.dtb \
>  	orion5x-rd88f5182-nas.dtb
>  dtb-$(CONFIG_ARCH_PRIMA2) += \
>  	prima2-evb.dtb
> diff --git a/arch/arm/boot/dts/orion5x-netgear-wnr854t.dts b/arch/arm/boot/dts/orion5x-netgear-wnr854t.dts
> new file mode 100644
> index 0000000..a8e89d8
> --- /dev/null
> +++ b/arch/arm/boot/dts/orion5x-netgear-wnr854t.dts
> @@ -0,0 +1,200 @@
> +/*
> + * Copyright (C) 2014 Jamie Lentin <jm@lentin.co.uk>

It's 2016 now.

> + *
> + * This file is licensed under the terms of the GNU General Public
> + * License version 2. This program is licensed "as is" without any
> + * warranty of any kind, whether express or implied.
> + */
> +
> +/dts-v1/;
> +
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/input/input.h>
> +#include "orion5x-mv88f5181.dtsi"
> +
> +/ {
> +	model = "Netgear WNR854-t";
> +	compatible = "netgear,wnr854t", "marvell,orion5x-88f5181",
> +			"marvell,orion5x";
> +
> +	memory {
> +		reg = <0x00000000 0x2000000>; /* 32 MB */
> +	};
> +
> +	chosen {
> +		bootargs = "console=ttyS0,115200n8 earlyprintk";
> +		linux,stdout-path = &uart0;

As kind of mentioned, drop the linux prefix here.

> +	};
> +
> +	soc {
> +		ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000>,
> +			<MBUS_ID(0x09, 0x00) 0 0xf2200000 0x800>,
> +			<MBUS_ID(0x01, 0x0f) 0 0xf4000000 0x800000>;
> +	};
> +
> +	gpio-keys {
> +		compatible = "gpio-keys";
> +		pinctrl-0 = <&pmx_reset_switch>;
> +		pinctrl-names = "default";
> +
> +		reset {
> +			label = "Reset Button";
> +			linux,code = <KEY_RESTART>;
> +			gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
> +		};
> +	};
> +
> +	gpio-leds {
> +		compatible = "gpio-leds";
> +		pinctrl-0 = <&pmx_power_led &pmx_power_led_blink &pmx_wan_led>;
> +		pinctrl-names = "default";
> +
> +		led@0 {
> +			label = "power:green";
> +			gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
> +		};
> +
> +		led@1 {
> +			label = "power:blink";
> +			gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
> +		};
> +
> +		led@2 {
> +			label = "wan:green";
> +			gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
> +		};
> +	};
> +
> +	dsa@0 {
> +		compatible = "marvell,dsa";
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +
> +		dsa,ethernet = <&ethport>;
> +		dsa,mii-bus = <&mdio>;
> +
> +		switch@0 {
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +			reg = <0 0>;	/* MDIO address 0, switch 0 in tree */
> +
> +			port@0 {
> +				reg = <0>;
> +				label = "lan3";
> +			};
> +
> +			port@1 {
> +				reg = <1>;
> +				label = "lan4";
> +			};
> +
> +			port@2 {
> +				reg = <2>;
> +				label = "wan";
> +			};
> +
> +			port@3 {
> +				reg = <3>;
> +				label = "cpu";
> +			};
> +
> +			port@5 {
> +				reg = <5>;
> +				label = "lan1";
> +			};
> +
> +			port@7 {
> +				reg = <7>;
> +				label = "lan2";
> +			};
> +		};
> +	};
> +};
> +
> +&devbus_bootcs {
> +	status = "okay";
> +
> +	devbus,keep-config;
> +
> +	flash@0 {
> +		compatible = "cfi-flash";
> +		reg = <0 0x800000>;
> +		bank-width = <1>;
> +		#address-cells = <1>;
> +		#size-cells = <1>;
> +
> +		partition@0 {

The new recommended style adds a level here with a partitions node and 
the type of partitioning.

> +			label = "kernel";
> +			reg = <0x0 0x100000>;
> +		};
> +
> +		partition@100000 {
> +			label = "rootfs";
> +			reg = <0x100000 0x660000>;
> +		};
> +
> +		partition@760000 {
> +			label = "uboot_env";
> +			reg = <0x760000 0x20000>;
> +		};
> +
> +		partition@780000 {
> +			label = "uboot";
> +			reg = <0x780000 0x80000>;
> +			read-only;
> +		};
> +	};
> +};
> +
> +&mdio {
> +	status = "okay";
> +};
> +
> +&eth {
> +	status = "okay";
> +	ethernet-port@0 {
> +		speed = <1000>;
> +		duplex = <1>;
> +	};
> +};
> +
> +&pinctrl {
> +	pinctrl-0 = <&pmx_pci_gpios &pmx_ge>;
> +	pinctrl-names = "default";
> +
> +	pmx_power_led: pmx-power-led {
> +		marvell,pins = "mpp0";
> +		marvell,function = "gpio";
> +	};
> +
> +	pmx_reset_switch: pmx-reset-switch {
> +		marvell,pins = "mpp1";
> +		marvell,function = "gpio";
> +	};
> +
> +	pmx_power_led_blink: pmx-power-led-blink {
> +		marvell,pins = "mpp2";
> +		marvell,function = "gpio";
> +	};
> +
> +	pmx_wan_led: pmx-wan-led {
> +		marvell,pins = "mpp3";
> +		marvell,function = "gpio";
> +	};
> +
> +	pmx_pci_gpios: pmx-pci-gpios {
> +		marvell,pins = "mpp4";
> +		marvell,function = "gpio";
> +	};
> +
> +	pmx_ge: pmx-ge {
> +		marvell,pins = "mpp9", "mpp12",	"mpp13", "mpp14", "mpp15",
> +				"mpp16", "mpp17", "mpp18", "mpp19";
> +		marvell,function = "ge";
> +	};
> +};
> +
> +&uart0 {
> +	/* Pin 1: Tx, Pin 7: Rx, Pin 8: Gnd */
> +	status = "okay";
> +};
> diff --git a/arch/arm/mach-orion5x/Kconfig b/arch/arm/mach-orion5x/Kconfig
> index a2af158..1fdb95d 100644
> --- a/arch/arm/mach-orion5x/Kconfig
> +++ b/arch/arm/mach-orion5x/Kconfig
> @@ -151,6 +151,12 @@ config MACH_MSS2_DT
>  	  Say 'Y' here if you want your kernel to support the
>  	  Maxtor Shared Storage II platform.
>  
> +config MACH_WNR854T_DT

There should only be at most 1 kconfig entry for all orion5x DT based 
platforms.

> +	bool "Netgear WNR854T (Flattened Device Tree)"
> +	help
> +	  Say 'Y' here if you want your kernel to support the
> +	  Netgear WNR854T platform.
> +
>  config MACH_WNR854T
>  	bool "Netgear WNR854T"
>  	help

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#1446298 — Re: [PATCH v0 06/10] arm: orion5x: Add DT-based support for Netgear WNR854T

FromJamie Lentin <jm@lentin.co.uk>
Date2016-07-19 11:50 +0200
SubjectRe: [PATCH v0 06/10] arm: orion5x: Add DT-based support for Netgear WNR854T
Message-ID<rWzP3-2ko-15@gated-at.bofh.it>
In reply to#1445126
On Sun, 17 Jul 2016, Rob Herring wrote:

> On Sat, Jul 16, 2016 at 03:29:04PM +0100, Jamie Lentin wrote:
>> This is a router based on the mv88f5181 chipset.
>>
>> http://www.netgear.com/support/product/WNR854T.aspx
>> http://wiki.openwrt.org/toh/netgear/wnr854t
>>
>> Signed-off-by: Jamie Lentin <jm@lentin.co.uk>
>> ---
>>  .../bindings/arm/marvell/marvell,orion5x.txt       |   1 +
>>  arch/arm/boot/dts/Makefile                         |   1 +
>>  arch/arm/boot/dts/orion5x-netgear-wnr854t.dts      | 200 +++++++++++++++++++++
>>  arch/arm/mach-orion5x/Kconfig                      |   6 +
>>  arch/arm/mach-orion5x/Makefile                     |   1 +
>>  arch/arm/mach-orion5x/board-wnr854t.c              |  78 ++++++++
>>  6 files changed, 287 insertions(+)
>>  create mode 100644 arch/arm/boot/dts/orion5x-netgear-wnr854t.dts
>>  create mode 100644 arch/arm/mach-orion5x/board-wnr854t.c
>>
>> diff --git a/Documentation/devicetree/bindings/arm/marvell/marvell,orion5x.txt b/Documentation/devicetree/bindings/arm/marvell/marvell,orion5x.txt
>> index ff3c120..748a8f2 100644
>> --- a/Documentation/devicetree/bindings/arm/marvell/marvell,orion5x.txt
>> +++ b/Documentation/devicetree/bindings/arm/marvell/marvell,orion5x.txt
>> @@ -22,3 +22,4 @@ board. Currently known boards are:
>>  "lacie,d2-network"
>>  "marvell,rd-88f5182-nas"
>>  "maxtor,shared-storage-2"
>> +"netgear,wnr854t"
>> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
>> index 95c1923..63b9202 100644
>> --- a/arch/arm/boot/dts/Makefile
>> +++ b/arch/arm/boot/dts/Makefile
>> @@ -535,6 +535,7 @@ dtb-$(CONFIG_ARCH_ORION5X) += \
>>  	orion5x-linkstation-lswtgl.dtb \
>>  	orion5x-lswsgl.dtb \
>>  	orion5x-maxtor-shared-storage-2.dtb \
>> +	orion5x-netgear-wnr854t.dtb \
>>  	orion5x-rd88f5182-nas.dtb
>>  dtb-$(CONFIG_ARCH_PRIMA2) += \
>>  	prima2-evb.dtb
>> diff --git a/arch/arm/boot/dts/orion5x-netgear-wnr854t.dts b/arch/arm/boot/dts/orion5x-netgear-wnr854t.dts
>> new file mode 100644
>> index 0000000..a8e89d8
>> --- /dev/null
>> +++ b/arch/arm/boot/dts/orion5x-netgear-wnr854t.dts
>> @@ -0,0 +1,200 @@
>> +/*
>> + * Copyright (C) 2014 Jamie Lentin <jm@lentin.co.uk>
>
> It's 2016 now.
>
>> + *
>> + * This file is licensed under the terms of the GNU General Public
>> + * License version 2. This program is licensed "as is" without any
>> + * warranty of any kind, whether express or implied.
>> + */
>> +
>> +/dts-v1/;
>> +
>> +#include <dt-bindings/gpio/gpio.h>
>> +#include <dt-bindings/input/input.h>
>> +#include "orion5x-mv88f5181.dtsi"
>> +
>> +/ {
>> +	model = "Netgear WNR854-t";
>> +	compatible = "netgear,wnr854t", "marvell,orion5x-88f5181",
>> +			"marvell,orion5x";
>> +
>> +	memory {
>> +		reg = <0x00000000 0x2000000>; /* 32 MB */
>> +	};
>> +
>> +	chosen {
>> +		bootargs = "console=ttyS0,115200n8 earlyprintk";
>> +		linux,stdout-path = &uart0;
>
> As kind of mentioned, drop the linux prefix here.
>
>> +	};
>> +
>> +	soc {
>> +		ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000>,
>> +			<MBUS_ID(0x09, 0x00) 0 0xf2200000 0x800>,
>> +			<MBUS_ID(0x01, 0x0f) 0 0xf4000000 0x800000>;
>> +	};
>> +
>> +	gpio-keys {
>> +		compatible = "gpio-keys";
>> +		pinctrl-0 = <&pmx_reset_switch>;
>> +		pinctrl-names = "default";
>> +
>> +		reset {
>> +			label = "Reset Button";
>> +			linux,code = <KEY_RESTART>;
>> +			gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
>> +		};
>> +	};
>> +
>> +	gpio-leds {
>> +		compatible = "gpio-leds";
>> +		pinctrl-0 = <&pmx_power_led &pmx_power_led_blink &pmx_wan_led>;
>> +		pinctrl-names = "default";
>> +
>> +		led@0 {
>> +			label = "power:green";
>> +			gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
>> +		};
>> +
>> +		led@1 {
>> +			label = "power:blink";
>> +			gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
>> +		};
>> +
>> +		led@2 {
>> +			label = "wan:green";
>> +			gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
>> +		};
>> +	};
>> +
>> +	dsa@0 {
>> +		compatible = "marvell,dsa";
>> +		#address-cells = <1>;
>> +		#size-cells = <0>;
>> +
>> +		dsa,ethernet = <&ethport>;
>> +		dsa,mii-bus = <&mdio>;
>> +
>> +		switch@0 {
>> +			#address-cells = <1>;
>> +			#size-cells = <0>;
>> +			reg = <0 0>;	/* MDIO address 0, switch 0 in tree */
>> +
>> +			port@0 {
>> +				reg = <0>;
>> +				label = "lan3";
>> +			};
>> +
>> +			port@1 {
>> +				reg = <1>;
>> +				label = "lan4";
>> +			};
>> +
>> +			port@2 {
>> +				reg = <2>;
>> +				label = "wan";
>> +			};
>> +
>> +			port@3 {
>> +				reg = <3>;
>> +				label = "cpu";
>> +			};
>> +
>> +			port@5 {
>> +				reg = <5>;
>> +				label = "lan1";
>> +			};
>> +
>> +			port@7 {
>> +				reg = <7>;
>> +				label = "lan2";
>> +			};
>> +		};
>> +	};
>> +};
>> +
>> +&devbus_bootcs {
>> +	status = "okay";
>> +
>> +	devbus,keep-config;
>> +
>> +	flash@0 {
>> +		compatible = "cfi-flash";
>> +		reg = <0 0x800000>;
>> +		bank-width = <1>;
>> +		#address-cells = <1>;
>> +		#size-cells = <1>;
>> +
>> +		partition@0 {
>
> The new recommended style adds a level here with a partitions node and
> the type of partitioning.
>
>> +			label = "kernel";
>> +			reg = <0x0 0x100000>;
>> +		};
>> +
>> +		partition@100000 {
>> +			label = "rootfs";
>> +			reg = <0x100000 0x660000>;
>> +		};
>> +
>> +		partition@760000 {
>> +			label = "uboot_env";
>> +			reg = <0x760000 0x20000>;
>> +		};
>> +
>> +		partition@780000 {
>> +			label = "uboot";
>> +			reg = <0x780000 0x80000>;
>> +			read-only;
>> +		};
>> +	};
>> +};
>> +
>> +&mdio {
>> +	status = "okay";
>> +};
>> +
>> +&eth {
>> +	status = "okay";
>> +	ethernet-port@0 {
>> +		speed = <1000>;
>> +		duplex = <1>;
>> +	};
>> +};
>> +
>> +&pinctrl {
>> +	pinctrl-0 = <&pmx_pci_gpios &pmx_ge>;
>> +	pinctrl-names = "default";
>> +
>> +	pmx_power_led: pmx-power-led {
>> +		marvell,pins = "mpp0";
>> +		marvell,function = "gpio";
>> +	};
>> +
>> +	pmx_reset_switch: pmx-reset-switch {
>> +		marvell,pins = "mpp1";
>> +		marvell,function = "gpio";
>> +	};
>> +
>> +	pmx_power_led_blink: pmx-power-led-blink {
>> +		marvell,pins = "mpp2";
>> +		marvell,function = "gpio";
>> +	};
>> +
>> +	pmx_wan_led: pmx-wan-led {
>> +		marvell,pins = "mpp3";
>> +		marvell,function = "gpio";
>> +	};
>> +
>> +	pmx_pci_gpios: pmx-pci-gpios {
>> +		marvell,pins = "mpp4";
>> +		marvell,function = "gpio";
>> +	};
>> +
>> +	pmx_ge: pmx-ge {
>> +		marvell,pins = "mpp9", "mpp12",	"mpp13", "mpp14", "mpp15",
>> +				"mpp16", "mpp17", "mpp18", "mpp19";
>> +		marvell,function = "ge";
>> +	};
>> +};
>> +
>> +&uart0 {
>> +	/* Pin 1: Tx, Pin 7: Rx, Pin 8: Gnd */
>> +	status = "okay";
>> +};
>> diff --git a/arch/arm/mach-orion5x/Kconfig b/arch/arm/mach-orion5x/Kconfig
>> index a2af158..1fdb95d 100644
>> --- a/arch/arm/mach-orion5x/Kconfig
>> +++ b/arch/arm/mach-orion5x/Kconfig
>> @@ -151,6 +151,12 @@ config MACH_MSS2_DT
>>  	  Say 'Y' here if you want your kernel to support the
>>  	  Maxtor Shared Storage II platform.
>>
>> +config MACH_WNR854T_DT
>
> There should only be at most 1 kconfig entry for all orion5x DT based
> platforms.

Even though it needs arch/arm/mach-orion5x/board-wnr854t.c to init the 
PCI? orion5x currently has other board _DT options, I presumed for this 
reason.

>> +	bool "Netgear WNR854T (Flattened Device Tree)"
>> +	help
>> +	  Say 'Y' here if you want your kernel to support the
>> +	  Netgear WNR854T platform.
>> +
>>  config MACH_WNR854T
>>  	bool "Netgear WNR854T"
>>  	help
>

-- 
Jamie Lentin

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#1444862 — [PATCH v0 07/10] arm: orion5x: Remove old non-DT-based WNR854T support

FromJamie Lentin <jm@lentin.co.uk>
Date2016-07-16 17:10 +0200
Subject[PATCH v0 07/10] arm: orion5x: Remove old non-DT-based WNR854T support
Message-ID<rVzo6-5n4-37@gated-at.bofh.it>
In reply to#1444852
Signed-off-by: Jamie Lentin <jm@lentin.co.uk>
---
 arch/arm/mach-orion5x/Makefile        |   1 -
 arch/arm/mach-orion5x/wnr854t-setup.c | 185 ----------------------------------
 2 files changed, 186 deletions(-)
 delete mode 100644 arch/arm/mach-orion5x/wnr854t-setup.c

diff --git a/arch/arm/mach-orion5x/Makefile b/arch/arm/mach-orion5x/Makefile
index 9dff2d3..a2c9ebc 100644
--- a/arch/arm/mach-orion5x/Makefile
+++ b/arch/arm/mach-orion5x/Makefile
@@ -14,7 +14,6 @@ obj-$(CONFIG_MACH_WRT350N_V2)	+= wrt350n-v2-setup.o
 obj-$(CONFIG_MACH_TS78XX)	+= ts78xx-setup.o
 obj-$(CONFIG_MACH_MV2120)	+= mv2120-setup.o
 obj-$(CONFIG_MACH_NET2BIG)	+= net2big-setup.o
-obj-$(CONFIG_MACH_WNR854T)	+= wnr854t-setup.o
 obj-$(CONFIG_MACH_RD88F5181L_GE)	+= rd88f5181l-ge-setup.o
 obj-$(CONFIG_MACH_RD88F5181L_FXO)	+= rd88f5181l-fxo-setup.o
 obj-$(CONFIG_MACH_RD88F6183AP_GE)	+= rd88f6183ap-ge-setup.o
diff --git a/arch/arm/mach-orion5x/wnr854t-setup.c b/arch/arm/mach-orion5x/wnr854t-setup.c
deleted file mode 100644
index 4e1e5c8..0000000
--- a/arch/arm/mach-orion5x/wnr854t-setup.c
+++ /dev/null
@@ -1,185 +0,0 @@
-/*
- * arch/arm/mach-orion5x/wnr854t-setup.c
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2.  This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-#include <linux/gpio.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/platform_device.h>
-#include <linux/pci.h>
-#include <linux/irq.h>
-#include <linux/delay.h>
-#include <linux/mtd/physmap.h>
-#include <linux/mv643xx_eth.h>
-#include <linux/ethtool.h>
-#include <net/dsa.h>
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-#include <asm/mach/pci.h>
-#include "orion5x.h"
-#include "common.h"
-#include "mpp.h"
-
-static unsigned int wnr854t_mpp_modes[] __initdata = {
-	MPP0_GPIO,		/* Power LED green (0=on) */
-	MPP1_GPIO,		/* Reset Button (0=off) */
-	MPP2_GPIO,		/* Power LED blink (0=off) */
-	MPP3_GPIO,		/* WAN Status LED amber (0=off) */
-	MPP4_GPIO,		/* PCI int */
-	MPP5_GPIO,		/* ??? */
-	MPP6_GPIO,		/* ??? */
-	MPP7_GPIO,		/* ??? */
-	MPP8_UNUSED,		/* ??? */
-	MPP9_GIGE,		/* GE_RXERR */
-	MPP10_UNUSED,		/* ??? */
-	MPP11_UNUSED,		/* ??? */
-	MPP12_GIGE,		/* GE_TXD[4] */
-	MPP13_GIGE,		/* GE_TXD[5] */
-	MPP14_GIGE,		/* GE_TXD[6] */
-	MPP15_GIGE,		/* GE_TXD[7] */
-	MPP16_GIGE,		/* GE_RXD[4] */
-	MPP17_GIGE,		/* GE_RXD[5] */
-	MPP18_GIGE,		/* GE_RXD[6] */
-	MPP19_GIGE,		/* GE_RXD[7] */
-	0,
-};
-
-/*
- * 8M NOR flash Device bus boot chip select
- */
-#define WNR854T_NOR_BOOT_BASE	0xf4000000
-#define WNR854T_NOR_BOOT_SIZE	SZ_8M
-
-static struct mtd_partition wnr854t_nor_flash_partitions[] = {
-	{
-		.name		= "kernel",
-		.offset		= 0x00000000,
-		.size		= 0x00100000,
-	}, {
-		.name		= "rootfs",
-		.offset		= 0x00100000,
-		.size		= 0x00660000,
-	}, {
-		.name		= "uboot",
-		.offset		= 0x00760000,
-		.size		= 0x00040000,
-	},
-};
-
-static struct physmap_flash_data wnr854t_nor_flash_data = {
-	.width		= 2,
-	.parts		= wnr854t_nor_flash_partitions,
-	.nr_parts	= ARRAY_SIZE(wnr854t_nor_flash_partitions),
-};
-
-static struct resource wnr854t_nor_flash_resource = {
-	.flags		= IORESOURCE_MEM,
-	.start		= WNR854T_NOR_BOOT_BASE,
-	.end		= WNR854T_NOR_BOOT_BASE + WNR854T_NOR_BOOT_SIZE - 1,
-};
-
-static struct platform_device wnr854t_nor_flash = {
-	.name			= "physmap-flash",
-	.id			= 0,
-	.dev		= {
-		.platform_data	= &wnr854t_nor_flash_data,
-	},
-	.num_resources		= 1,
-	.resource		= &wnr854t_nor_flash_resource,
-};
-
-static struct mv643xx_eth_platform_data wnr854t_eth_data = {
-	.phy_addr	= MV643XX_ETH_PHY_NONE,
-	.speed		= SPEED_1000,
-	.duplex		= DUPLEX_FULL,
-};
-
-static struct dsa_chip_data wnr854t_switch_chip_data = {
-	.port_names[0] = "lan3",
-	.port_names[1] = "lan4",
-	.port_names[2] = "wan",
-	.port_names[3] = "cpu",
-	.port_names[5] = "lan1",
-	.port_names[7] = "lan2",
-};
-
-static struct dsa_platform_data wnr854t_switch_plat_data = {
-	.nr_chips	= 1,
-	.chip		= &wnr854t_switch_chip_data,
-};
-
-static void __init wnr854t_init(void)
-{
-	/*
-	 * Setup basic Orion functions. Need to be called early.
-	 */
-	orion5x_init();
-
-	orion5x_mpp_conf(wnr854t_mpp_modes);
-
-	/*
-	 * Configure peripherals.
-	 */
-	orion5x_eth_init(&wnr854t_eth_data);
-	orion5x_eth_switch_init(&wnr854t_switch_plat_data, NO_IRQ);
-	orion5x_uart0_init();
-
-	mvebu_mbus_add_window_by_id(ORION_MBUS_DEVBUS_BOOT_TARGET,
-				    ORION_MBUS_DEVBUS_BOOT_ATTR,
-				    WNR854T_NOR_BOOT_BASE,
-				    WNR854T_NOR_BOOT_SIZE);
-	platform_device_register(&wnr854t_nor_flash);
-}
-
-static int __init wnr854t_pci_map_irq(const struct pci_dev *dev, u8 slot,
-	u8 pin)
-{
-	int irq;
-
-	/*
-	 * Check for devices with hard-wired IRQs.
-	 */
-	irq = orion5x_pci_map_irq(dev, slot, pin);
-	if (irq != -1)
-		return irq;
-
-	/*
-	 * Mini-PCI slot.
-	 */
-	if (slot == 7)
-		return gpio_to_irq(4);
-
-	return -1;
-}
-
-static struct hw_pci wnr854t_pci __initdata = {
-	.nr_controllers	= 2,
-	.setup		= orion5x_pci_sys_setup,
-	.scan		= orion5x_pci_sys_scan_bus,
-	.map_irq	= wnr854t_pci_map_irq,
-};
-
-static int __init wnr854t_pci_init(void)
-{
-	if (machine_is_wnr854t())
-		pci_common_init(&wnr854t_pci);
-
-	return 0;
-}
-subsys_initcall(wnr854t_pci_init);
-
-MACHINE_START(WNR854T, "Netgear WNR854T")
-	/* Maintainer: Imre Kaloz <kaloz@openwrt.org> */
-	.atag_offset	= 0x100,
-	.nr_irqs	= ORION5X_NR_IRQS,
-	.init_machine	= wnr854t_init,
-	.map_io		= orion5x_map_io,
-	.init_early	= orion5x_init_early,
-	.init_irq	= orion5x_init_irq,
-	.init_time	= orion5x_timer_init,
-	.fixup		= tag_fixup_mem32,
-	.restart	= orion5x_restart,
-MACHINE_END
-- 
2.8.1

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#1444883 — Re: [PATCH v0 07/10] arm: orion5x: Remove old non-DT-based WNR854T support

FromAndrew Lunn <andrew@lunn.ch>
Date2016-07-16 18:40 +0200
SubjectRe: [PATCH v0 07/10] arm: orion5x: Remove old non-DT-based WNR854T support
Message-ID<rVANb-665-9@gated-at.bofh.it>
In reply to#1444862
On Sat, Jul 16, 2016 at 03:29:05PM +0100, Jamie Lentin wrote:

Again, you need a commit log. It could be something like:

The setup file for the wnr854t has bit rotted to such an extent it no
longer works. Replace it with a working device tree description.

       Andrew

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#1444863 — [PATCH v0 04/10] arm: orion5x: Generalise mv88f5181l pinctrl support for 88f5181

FromJamie Lentin <jm@lentin.co.uk>
Date2016-07-16 17:10 +0200
Subject[PATCH v0 04/10] arm: orion5x: Generalise mv88f5181l pinctrl support for 88f5181
Message-ID<rVzo6-5n4-31@gated-at.bofh.it>
In reply to#1444852
As far as I'm aware the mv88f5181-b1 and mv88f5181l are the same at the
pinctrl level, so re-use the definitions for both.

Signed-off-by: Jamie Lentin <jm@lentin.co.uk>
---
 .../bindings/pinctrl/marvell,orion-pinctrl.txt     |  4 ++--
 drivers/pinctrl/mvebu/pinctrl-orion.c              | 23 +++++++++++-----------
 2 files changed, 14 insertions(+), 13 deletions(-)

diff --git a/Documentation/devicetree/bindings/pinctrl/marvell,orion-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/marvell,orion-pinctrl.txt
index 27570a3..5a79bad 100644
--- a/Documentation/devicetree/bindings/pinctrl/marvell,orion-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/marvell,orion-pinctrl.txt
@@ -4,8 +4,8 @@ Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding
 part and usage.
 
 Required properties:
-- compatible: "marvell,88f5181l-pinctrl", "marvell,88f5182-pinctrl",
-              "marvell,88f5281-pinctrl"
+- compatible: "marvell,88f5181-pinctrl", "marvell,88f5181l-pinctrl",
+              "marvell,88f5182-pinctrl", "marvell,88f5281-pinctrl"
 
 - reg: two register areas, the first one describing the first two
   contiguous MPP registers, and the second one describing the single
diff --git a/drivers/pinctrl/mvebu/pinctrl-orion.c b/drivers/pinctrl/mvebu/pinctrl-orion.c
index 3b7122d..6f9c8ee 100644
--- a/drivers/pinctrl/mvebu/pinctrl-orion.c
+++ b/drivers/pinctrl/mvebu/pinctrl-orion.c
@@ -64,11 +64,11 @@ static int orion_mpp_ctrl_set(unsigned pid, unsigned long config)
 	return 0;
 }
 
-#define V(f5181l, f5182, f5281) \
-	((f5181l << 0) | (f5182 << 1) | (f5281 << 2))
+#define V(f5181, f5182, f5281) \
+	((f5181 << 0) | (f5182 << 1) | (f5281 << 2))
 
 enum orion_variant {
-	V_5181L = V(1, 0, 0),
+	V_5181  = V(1, 0, 0),
 	V_5182  = V(0, 1, 0),
 	V_5281  = V(0, 0, 1),
 	V_ALL   = V(1, 1, 1),
@@ -103,13 +103,13 @@ static struct mvebu_mpp_mode orion_mpp_modes[] = {
 		 MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_ALL),
 		 MPP_VAR_FUNCTION(0x2, "pci", "req5",       V_ALL),
 		 MPP_VAR_FUNCTION(0x4, "nand", "re0",       V_5182 | V_5281),
-		 MPP_VAR_FUNCTION(0x5, "pci-1", "clk",      V_5181L),
+		 MPP_VAR_FUNCTION(0x5, "pci-1", "clk",      V_5181),
 		 MPP_VAR_FUNCTION(0x5, "sata0", "act",      V_5182)),
 	MPP_MODE(7,
 		 MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_ALL),
 		 MPP_VAR_FUNCTION(0x2, "pci", "gnt5",       V_ALL),
 		 MPP_VAR_FUNCTION(0x4, "nand", "we0",       V_5182 | V_5281),
-		 MPP_VAR_FUNCTION(0x5, "pci-1", "clk",      V_5181L),
+		 MPP_VAR_FUNCTION(0x5, "pci-1", "clk",      V_5181),
 		 MPP_VAR_FUNCTION(0x5, "sata1", "act",      V_5182)),
 	MPP_MODE(8,
 		 MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_ALL),
@@ -165,7 +165,7 @@ static struct mvebu_mpp_ctrl orion_mpp_controls[] = {
 	MPP_FUNC_CTRL(0, 19, NULL, orion_mpp_ctrl),
 };
 
-static struct pinctrl_gpio_range mv88f5181l_gpio_ranges[] = {
+static struct pinctrl_gpio_range mv88f5181_gpio_ranges[] = {
 	MPP_GPIO_RANGE(0, 0, 0, 16),
 };
 
@@ -177,14 +177,14 @@ static struct pinctrl_gpio_range mv88f5281_gpio_ranges[] = {
 	MPP_GPIO_RANGE(0, 0, 0, 16),
 };
 
-static struct mvebu_pinctrl_soc_info mv88f5181l_info = {
-	.variant = V_5181L,
+static struct mvebu_pinctrl_soc_info mv88f5181_info = {
+	.variant = V_5181,
 	.controls = orion_mpp_controls,
 	.ncontrols = ARRAY_SIZE(orion_mpp_controls),
 	.modes = orion_mpp_modes,
 	.nmodes = ARRAY_SIZE(orion_mpp_modes),
-	.gpioranges = mv88f5181l_gpio_ranges,
-	.ngpioranges = ARRAY_SIZE(mv88f5181l_gpio_ranges),
+	.gpioranges = mv88f5181_gpio_ranges,
+	.ngpioranges = ARRAY_SIZE(mv88f5181_gpio_ranges),
 };
 
 static struct mvebu_pinctrl_soc_info mv88f5182_info = {
@@ -212,7 +212,8 @@ static struct mvebu_pinctrl_soc_info mv88f5281_info = {
  * muxing, they are identical.
  */
 static const struct of_device_id orion_pinctrl_of_match[] = {
-	{ .compatible = "marvell,88f5181l-pinctrl", .data = &mv88f5181l_info },
+	{ .compatible = "marvell,88f5181-pinctrl", .data = &mv88f5181_info },
+	{ .compatible = "marvell,88f5181l-pinctrl", .data = &mv88f5181_info },
 	{ .compatible = "marvell,88f5182-pinctrl", .data = &mv88f5182_info },
 	{ .compatible = "marvell,88f5281-pinctrl", .data = &mv88f5281_info },
 	{ }
-- 
2.8.1

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#1444875 — Re: [PATCH v0 04/10] arm: orion5x: Generalise mv88f5181l pinctrl support for 88f5181

FromAndrew Lunn <andrew@lunn.ch>
Date2016-07-16 18:20 +0200
SubjectRe: [PATCH v0 04/10] arm: orion5x: Generalise mv88f5181l pinctrl support for 88f5181
Message-ID<rVAtP-5ZD-19@gated-at.bofh.it>
In reply to#1444863
On Sat, Jul 16, 2016 at 03:29:02PM +0100, Jamie Lentin wrote:
> As far as I'm aware the mv88f5181-b1 and mv88f5181l are the same at the
> pinctrl level, so re-use the definitions for both.

Good, you add a new compatibile string. So it if turns out they are
not identical, we can fix it later without causing problems.

Reviewed-by: Andrew Lunn <andrew@lunn.ch>

    Andrew

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#1445121 — Re: [PATCH v0 04/10] arm: orion5x: Generalise mv88f5181l pinctrl support for 88f5181

FromRob Herring <robh@kernel.org>
Date2016-07-17 22:50 +0200
SubjectRe: [PATCH v0 04/10] arm: orion5x: Generalise mv88f5181l pinctrl support for 88f5181
Message-ID<rW1aF-5mY-5@gated-at.bofh.it>
In reply to#1444863
On Sat, Jul 16, 2016 at 03:29:02PM +0100, Jamie Lentin wrote:
> As far as I'm aware the mv88f5181-b1 and mv88f5181l are the same at the
> pinctrl level, so re-use the definitions for both.
> 
> Signed-off-by: Jamie Lentin <jm@lentin.co.uk>
> ---
>  .../bindings/pinctrl/marvell,orion-pinctrl.txt     |  4 ++--
>  drivers/pinctrl/mvebu/pinctrl-orion.c              | 23 +++++++++++-----------
>  2 files changed, 14 insertions(+), 13 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/pinctrl/marvell,orion-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/marvell,orion-pinctrl.txt
> index 27570a3..5a79bad 100644
> --- a/Documentation/devicetree/bindings/pinctrl/marvell,orion-pinctrl.txt
> +++ b/Documentation/devicetree/bindings/pinctrl/marvell,orion-pinctrl.txt
> @@ -4,8 +4,8 @@ Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding
>  part and usage.
>  
>  Required properties:
> -- compatible: "marvell,88f5181l-pinctrl", "marvell,88f5182-pinctrl",
> -              "marvell,88f5281-pinctrl"
> +- compatible: "marvell,88f5181-pinctrl", "marvell,88f5181l-pinctrl",
> +              "marvell,88f5182-pinctrl", "marvell,88f5281-pinctrl"

Please reformat to one per line. Otherwise,

Acked-by: Rob Herring <robh@kernel.org>


>  
>  - reg: two register areas, the first one describing the first two
>    contiguous MPP registers, and the second one describing the single

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