Groups | Search | Server Info | Keyboard shortcuts | Login | Register [http] [https] [nntp] [nntps]

Groups > linux.kernel > #1433601 > unrolled thread

[PATCH v4 0/11] Misc fixup and add RK3399 eDP support to Analogix DP driver

Started byYakir Yang <ykk@rock-chips.com>
First post2016-06-29 11:20 +0200
Last post2016-06-30 08:40 +0200
Articles 11 — 2 participants

Back to article view | Back to linux.kernel

Contents

  [PATCH v4 0/11] Misc fixup and add RK3399 eDP support to Analogix DP driver Yakir Yang <ykk@rock-chips.com> - 2016-06-29 11:20 +0200
    [PATCH v4 10/11] drm/rockchip: analogix_dp: introduce the pclk for grf Yakir Yang <ykk@rock-chips.com> - 2016-06-29 11:20 +0200
    [PATCH v4 11/11] dt-bindings: analogix_dp: rockchip: correct the wrong compatible name Yakir Yang <ykk@rock-chips.com> - 2016-06-29 11:20 +0200
    [PATCH v4 09/11] drm/bridge: analogix_dp: fix no drm hpd event when panel plug in Yakir Yang <ykk@rock-chips.com> - 2016-06-29 11:20 +0200
    [PATCH v4 05/11] drm/rockchip: analogix_dp: make panel detect to an optional action Yakir Yang <ykk@rock-chips.com> - 2016-06-29 11:20 +0200
    [PATCH v4 04/11] drm/rockchip: analogix_dp: add rk3399 eDP support Yakir Yang <ykk@rock-chips.com> - 2016-06-29 11:30 +0200
    [PATCH v4 08/11] drm/rockchip: analogix_dp: update the comments about why need to hardcode VOP output mode Yakir Yang <ykk@rock-chips.com> - 2016-06-29 11:30 +0200
      Re: [PATCH v4 08/11] drm/rockchip: analogix_dp: update the comments  about why need to hardcode VOP output mode Sean Paul <seanpaul@chromium.org> - 2016-06-29 16:00 +0200
    [PATCH v4 03/11] drm/bridge: analogix_dp: some rockchip chips need to flip REF_CLK bit setting Yakir Yang <ykk@rock-chips.com> - 2016-06-29 11:30 +0200
    Re: [PATCH v4 0/11] Misc fixup and add RK3399 eDP support to Analogix  DP driver Sean Paul <seanpaul@chromium.org> - 2016-06-29 16:40 +0200
      Re: [PATCH v4 0/11] Misc fixup and add RK3399 eDP support to Analogix  DP driver[Involving remittance information, please pay attention to the  safety of property] Yakir Yang <ykk@rock-chips.com> - 2016-06-30 08:40 +0200

#1433601 — [PATCH v4 0/11] Misc fixup and add RK3399 eDP support to Analogix DP driver

FromYakir Yang <ykk@rock-chips.com>
Date2016-06-29 11:20 +0200
Subject[PATCH v4 0/11] Misc fixup and add RK3399 eDP support to Analogix DP driver
Message-ID<rPjP3-2kI-7@gated-at.bofh.it>
RK3399 and RK3288 shared the same eDP IP controller, only some light
difference with VOP configure and GRF configure.

Also same misc fix to analogix_dp driver:
- Hotplug invalid which report by Dan Carpenter
- Make panel detect to an optional action
- correct the register bit define error in ANALOGIX_DP_PLL_REG_1

Changes in v4:
- Assigned the GRF setting magic numbers to a #define that corresponds to
  a TRM name. (Sean & Heiko)
- Pass the chip type to device type directly. (Sean)
- Add reviewed flag from Tomasz.
- Add reviewed flag from Sean
- Remove subdev_type number, and add 'is_rockchip(type)' helper function (Sean)
- Add reviewed flag from Tomasz.
- Improved the overly complicated .atomic_check function. (Sean)
- Add reviewed flag from Tomasz
- Move of_node_put(panel_node) directly below of_drm_find_panel (Sean)
- Add reviewed flag from Tomasz
- Add reviewed flag from Sean.
- Add reviewed flag from Tomasz.
- Using mask variable to collect the YUV video format. (Sean)
- Add reviewed flag from Tomasz.
- Correct the misspell of 'contoller'. (Sean)
- Add reviewed flag from Sean.
- Add reviewed flag from Tomasz.
- Add reviewed flag from Doug.
- Add reviewed flag from Tomasz.
- Fix compiled error, sorry.
  "dp->cgfclk"  -->  'dp->grfclk'
- Check the the error code properly, 'EPROBE_DEFER' should be returned,
  'ENOENT' should assign a NULL point to grfclk, other errors should be
  regarded as failed. (Tomasz, Doug, reviewed at Google Gerrit)
    [https://chromium-review.googlesource.com/#/c/351821/20/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c@249]
- Add the document about optional 'grf' clock (Tomasz, Doug, reviewed at Google Gerrit)
    [https://chromium-review.googlesource.com/#/c/351821/]
- Add reviewed flag from Doug.
- Add reviewed flag from Tomasz.

Changes in v3:
- Write a kerneldoc-style comment explaining the chips data fields (Tomasz, reviewed at Google Gerrit)
    [https://chromium-review.googlesource.com/#/c/346313/10/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c@39]
- Drop the '.lcdcsel_mask' number in chips data field (Tomasz, reviewed at Google Gerrit)
    [https://chromium-review.googlesource.com/#/c/346313/10/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c@382]
- Add acked flag from Mark.
- Add reviewed flag from Tomasz.
    [https://chromium-review.googlesource.com/#/c/346315/15]
- Add tested flag from Javier
- Make this hack code more clear (Tomasz, reviewed at Google Gerrit)
  reg = ~reg & REF_CLK_MASK;  --->  reg ^= REF_CLK_MASK;
    [https://chromium-review.googlesource.com/#/c/346852/7/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c@80]
- Add tested flag from Javier
- Give the "rk3399-edp" a separate line for clarity in document (Tomasz, reviewed at Google Gerrit)
    [https://chromium-review.googlesource.com/#/c/346314/10/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt@5]
- Move 'output_type' setting before the return statement (Tomasz, reviewed at Google Gerrit)
    [https://chromium-review.googlesource.com/#/c/346314/10/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c@154]
- Add the acked flag from Mark.
- Add the acked flag from Mark.
- Avoid to change any internal driver state in .mode_valid interface. (Tomasz, reviewed at Google Gerrit)
    [https://chromium-review.googlesource.com/#/c/346318/10/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c@113]
- Hook the connector's color_formats in .get_modes directly. (Tomasz, reviewed at Google Gerrit)
    [https://chromium-review.googlesource.com/#/c/346317/15]
- Add the acked flag from Mark.
- Add the reviewed flag from Tomasz.
    [https://chromium-review.googlesource.com/#/c/346853/12]
- Add the acked flag from Mark.
- Add reviewed flag from Stéphane.
    [https://chromium-review.googlesource.com/#/c/346319/15]
- Add tested flag from Javier
- Add this patch in v3
- Add this patch in v3

Yakir Yang (11):
  drm/rockchip: analogix_dp: split the lcdc select setting into device
    data
  drm/bridge: analogix_dp: correct the register bit define error in
    ANALOGIX_DP_PLL_REG_1
  drm/bridge: analogix_dp: some rockchip chips need to flip REF_CLK bit
    setting
  drm/rockchip: analogix_dp: add rk3399 eDP support
  drm/rockchip: analogix_dp: make panel detect to an optional action
  drm/bridge: analogix_dp: passing the connector as an argument in
    .get_modes()
  drm/rockchip: analogix_dp: correct the connector display color format
    and bpc
  drm/rockchip: analogix_dp: update the comments about why need to
    hardcode VOP output mode
  drm/bridge: analogix_dp: fix no drm hpd event when panel plug in
  drm/rockchip: analogix_dp: introduce the pclk for grf
  dt-bindings: analogix_dp: rockchip: correct the wrong compatible name

 .../bindings/display/bridge/analogix_dp.txt        |   1 +
 .../display/rockchip/analogix_dp-rockchip.txt      |   9 +-
 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c |   2 +-
 drivers/gpu/drm/bridge/analogix/analogix_dp_core.h |   8 +-
 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c  |  12 +-
 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h  |   5 +-
 drivers/gpu/drm/exynos/exynos_dp.c                 |   4 +-
 drivers/gpu/drm/rockchip/analogix_dp-rockchip.c    | 174 +++++++++++++++------
 include/drm/bridge/analogix_dp.h                   |   9 +-
 9 files changed, 160 insertions(+), 64 deletions(-)

-- 
1.9.1

[toc] | [next] | [standalone]

#1433602 — [PATCH v4 10/11] drm/rockchip: analogix_dp: introduce the pclk for grf

FromYakir Yang <ykk@rock-chips.com>
Date2016-06-29 11:20 +0200
Subject[PATCH v4 10/11] drm/rockchip: analogix_dp: introduce the pclk for grf
Message-ID<rPjP3-2kI-27@gated-at.bofh.it>
In reply to#1433601
For RK3399's GRF module, if we want to operate the graphic related grf
registers, we need to enable the pclk_vio_grf which supply power for VIO
GRF IOs, so it's better to introduce an optional grf clock in driver.

Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Tomasz Figa <tomasz.figa@chromium.com>
---
Changes in v4:
- Add reviewed flag from Doug.
- Add reviewed flag from Tomasz.
- Fix compiled error, sorry.
  "dp->cgfclk"  -->  'dp->grfclk'
- Check the the error code properly, 'EPROBE_DEFER' should be returned,
  'ENOENT' should assign a NULL point to grfclk, other errors should be
  regarded as failed. (Tomasz, Doug, reviewed at Google Gerrit)
    [https://chromium-review.googlesource.com/#/c/351821/20/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c@249]
- Add the document about optional 'grf' clock (Tomasz, Doug, reviewed at Google Gerrit)
    [https://chromium-review.googlesource.com/#/c/351821/]

Changes in v3:
- Add this patch in v3

 .../display/rockchip/analogix_dp-rockchip.txt      |  6 ++++++
 drivers/gpu/drm/rockchip/analogix_dp-rockchip.c    | 23 +++++++++++++++++++---
 2 files changed, 26 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt b/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt
index 726c945..0b39256 100644
--- a/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt
+++ b/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt
@@ -28,6 +28,12 @@ Required properties:
     Port 0: contained 2 endpoints, connecting to the output of vop.
     Port 1: contained 1 endpoint, connecting to the input of panel.
 
+Optional property for different chips:
+- clocks: from common clock binding: handle to grf_vio clock.
+
+- clock-names: from common clock binding:
+	       Required elements: "grf"
+
 For the below properties, please refer to Analogix DP binding document:
  * Documentation/devicetree/bindings/drm/bridge/analogix_dp.txt
 - phys (required)
diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
index 850edc4..e81e19a 100644
--- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
+++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
@@ -64,6 +64,7 @@ struct rockchip_dp_device {
 	struct drm_display_mode  mode;
 
 	struct clk               *pclk;
+	struct clk               *grfclk;
 	struct regmap            *grf;
 	struct reset_control     *rst;
 
@@ -160,11 +161,17 @@ static void rockchip_dp_drm_encoder_enable(struct drm_encoder *encoder)
 
 	dev_dbg(dp->dev, "vop %s output to dp\n", (ret) ? "LIT" : "BIG");
 
-	ret = regmap_write(dp->grf, dp->data->lcdsel_grf_reg, val);
-	if (ret != 0) {
-		dev_err(dp->dev, "Could not write to GRF: %d\n", ret);
+	ret = clk_prepare_enable(dp->grfclk);
+	if (ret < 0) {
+		dev_err(dp->dev, "failed to enable grfclk %d\n", ret);
 		return;
 	}
+
+	ret = regmap_write(dp->grf, dp->data->lcdsel_grf_reg, val);
+	if (ret != 0)
+		dev_err(dp->dev, "Could not write to GRF: %d\n", ret);
+
+	clk_disable_unprepare(dp->grfclk);
 }
 
 static void rockchip_dp_drm_encoder_nop(struct drm_encoder *encoder)
@@ -234,6 +241,16 @@ static int rockchip_dp_init(struct rockchip_dp_device *dp)
 		return PTR_ERR(dp->grf);
 	}
 
+	dp->grfclk = devm_clk_get(dev, "grf");
+	if (PTR_ERR(dp->grfclk) == -ENOENT) {
+		dp->grfclk = NULL;
+	} else if (PTR_ERR(dp->grfclk) == -EPROBE_DEFER) {
+		return -EPROBE_DEFER;
+	} else if (IS_ERR(dp->grfclk)) {
+		dev_err(dev, "failed to get grf clock\n");
+		return PTR_ERR(dp->grfclk);
+	}
+
 	dp->pclk = devm_clk_get(dev, "pclk");
 	if (IS_ERR(dp->pclk)) {
 		dev_err(dev, "failed to get pclk property\n");
-- 
1.9.1

[toc] | [prev] | [next] | [standalone]

#1433603 — [PATCH v4 11/11] dt-bindings: analogix_dp: rockchip: correct the wrong compatible name

FromYakir Yang <ykk@rock-chips.com>
Date2016-06-29 11:20 +0200
Subject[PATCH v4 11/11] dt-bindings: analogix_dp: rockchip: correct the wrong compatible name
Message-ID<rPjP4-2kI-33@gated-at.bofh.it>
In reply to#1433601
The document about rockchip platform make a mistaken in available
compatible name of "rk3288-edp", we should correct it to "rk3288-dp"
which correspond to the compatible name in driver.

This mistaken was introduced in commit be91c36247089 ("dt-bindings:
add document for rockchip variant of analogix_dp").

Reported-by: Tomasz Figa <tfiga@chromium.com>
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Tomasz Figa <tomasz.figa@chromium.com>
---
Changes in v4:
- Add reviewed flag from Doug.
- Add reviewed flag from Tomasz.

Changes in v3:
- Add this patch in v3

 .../devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt       | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt b/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt
index 0b39256..01cced1 100644
--- a/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt
+++ b/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt
@@ -2,7 +2,7 @@ Rockchip RK3288 specific extensions to the Analogix Display Port
 ================================
 
 Required properties:
-- compatible: "rockchip,rk3288-edp",
+- compatible: "rockchip,rk3288-dp",
 	      "rockchip,rk3399-edp";
 
 - reg: physical base address of the controller and length
-- 
1.9.1

[toc] | [prev] | [next] | [standalone]

#1433604 — [PATCH v4 09/11] drm/bridge: analogix_dp: fix no drm hpd event when panel plug in

FromYakir Yang <ykk@rock-chips.com>
Date2016-06-29 11:20 +0200
Subject[PATCH v4 09/11] drm/bridge: analogix_dp: fix no drm hpd event when panel plug in
Message-ID<rPjP4-2kI-35@gated-at.bofh.it>
In reply to#1433601
The enum value of DP_IRQ_TYPE_HP_CABLE_IN is zero, but driver only
send drm hp event when the irq_type and the enum value is true.

if (irq_type & DP_IRQ_TYPE_HP_CABLE_IN || ...)
	drm_helper_hpd_irq_event(dp->drm_dev);

So there would no drm hpd event when cable plug in, to fix that
just need to assign all hotplug enum with no-zero values.

Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Reviewed-by: Stéphane Marchesin <marcheu@chromium.org>
Reviewed-by: Tomasz Figa <tomasz.figa@chromium.com>
Tested-by: Javier Martinez Canillas <javier@osg.samsung.com>
---
Changes in v4:
- Add reviewed flag from Sean.
- Add reviewed flag from Tomasz.

Changes in v3:
- Add reviewed flag from Stéphane.
    [https://chromium-review.googlesource.com/#/c/346319/15]
- Add tested flag from Javier

 drivers/gpu/drm/bridge/analogix/analogix_dp_core.h | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
index f09275d..b456380 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
@@ -127,10 +127,10 @@ enum analog_power_block {
 };
 
 enum dp_irq_type {
-	DP_IRQ_TYPE_HP_CABLE_IN,
-	DP_IRQ_TYPE_HP_CABLE_OUT,
-	DP_IRQ_TYPE_HP_CHANGE,
-	DP_IRQ_TYPE_UNKNOWN,
+	DP_IRQ_TYPE_HP_CABLE_IN  = BIT(0),
+	DP_IRQ_TYPE_HP_CABLE_OUT = BIT(1),
+	DP_IRQ_TYPE_HP_CHANGE    = BIT(2),
+	DP_IRQ_TYPE_UNKNOWN      = BIT(3),
 };
 
 struct video_info {
-- 
1.9.1

[toc] | [prev] | [next] | [standalone]

#1433605 — [PATCH v4 05/11] drm/rockchip: analogix_dp: make panel detect to an optional action

FromYakir Yang <ykk@rock-chips.com>
Date2016-06-29 11:20 +0200
Subject[PATCH v4 05/11] drm/rockchip: analogix_dp: make panel detect to an optional action
Message-ID<rPjP4-2kI-37@gated-at.bofh.it>
In reply to#1433601
Some boards don't need to declare a panel device node, like the
display interface is DP monitors, so it's necessary to make the
panel detect to an optional action.

Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Acked-by: Mark Yao <mark.yao@rock-chips.com>
Reviewed-by: Tomasz Figa <tomasz.figa@chromium.com>
---
Changes in v4:
- Move of_node_put(panel_node) directly below of_drm_find_panel (Sean)
- Add reviewed flag from Tomasz

Changes in v3:
- Add the acked flag from Mark.

 drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 47 +++++++++++--------------
 1 file changed, 21 insertions(+), 26 deletions(-)

diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
index 8557a08..0755573 100644
--- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
+++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
@@ -329,38 +329,33 @@ static int rockchip_dp_probe(struct platform_device *pdev)
 {
 	struct device *dev = &pdev->dev;
 	struct device_node *panel_node, *port, *endpoint;
+	struct drm_panel *panel = NULL;
 	struct rockchip_dp_device *dp;
-	struct drm_panel *panel;
 
 	port = of_graph_get_port_by_id(dev->of_node, 1);
-	if (!port) {
-		dev_err(dev, "can't find output port\n");
-		return -EINVAL;
-	}
-
-	endpoint = of_get_child_by_name(port, "endpoint");
-	of_node_put(port);
-	if (!endpoint) {
-		dev_err(dev, "no output endpoint found\n");
-		return -EINVAL;
-	}
-
-	panel_node = of_graph_get_remote_port_parent(endpoint);
-	of_node_put(endpoint);
-	if (!panel_node) {
-		dev_err(dev, "no output node found\n");
-		return -EINVAL;
-	}
-
-	panel = of_drm_find_panel(panel_node);
-	if (!panel) {
-		DRM_ERROR("failed to find panel\n");
+	if (port) {
+		endpoint = of_get_child_by_name(port, "endpoint");
+		of_node_put(port);
+		if (!endpoint) {
+			dev_err(dev, "no output endpoint found\n");
+			return -EINVAL;
+		}
+
+		panel_node = of_graph_get_remote_port_parent(endpoint);
+		of_node_put(endpoint);
+		if (!panel_node) {
+			dev_err(dev, "no output node found\n");
+			return -EINVAL;
+		}
+
+		panel = of_drm_find_panel(panel_node);
 		of_node_put(panel_node);
-		return -EPROBE_DEFER;
+		if (!panel) {
+			DRM_ERROR("failed to find panel\n");
+			return -EPROBE_DEFER;
+		}
 	}
 
-	of_node_put(panel_node);
-
 	dp = devm_kzalloc(dev, sizeof(*dp), GFP_KERNEL);
 	if (!dp)
 		return -ENOMEM;
-- 
1.9.1

[toc] | [prev] | [next] | [standalone]

#1433607 — [PATCH v4 04/11] drm/rockchip: analogix_dp: add rk3399 eDP support

FromYakir Yang <ykk@rock-chips.com>
Date2016-06-29 11:30 +0200
Subject[PATCH v4 04/11] drm/rockchip: analogix_dp: add rk3399 eDP support
Message-ID<rPjYJ-2o1-3@gated-at.bofh.it>
In reply to#1433601
RK3399 and RK3288 shared the same eDP IP controller, only some light
difference with VOP configure and GRF configure.

Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Acked-by: Mark Yao <mark.yao@rock-chips.com>
Reviewed-by: Tomasz Figa <tomasz.figa@chromium.com>
---
Changes in v4:
- Improved the overly complicated .atomic_check function. (Sean)
- Add reviewed flag from Tomasz

Changes in v3:
- Give the "rk3399-edp" a separate line for clarity in document (Tomasz, reviewed at Google Gerrit)
    [https://chromium-review.googlesource.com/#/c/346314/10/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt@5]
- Move 'output_type' setting before the return statement (Tomasz, reviewed at Google Gerrit)
    [https://chromium-review.googlesource.com/#/c/346314/10/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c@154]
- Add the acked flag from Mark.

 .../bindings/display/bridge/analogix_dp.txt        |  1 +
 .../display/rockchip/analogix_dp-rockchip.txt      |  3 ++-
 drivers/gpu/drm/rockchip/analogix_dp-rockchip.c    | 23 ++++++++++++++++++++++
 include/drm/bridge/analogix_dp.h                   |  3 ++-
 4 files changed, 28 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/display/bridge/analogix_dp.txt b/Documentation/devicetree/bindings/display/bridge/analogix_dp.txt
index 4f2ba8c..4a0f4f7 100644
--- a/Documentation/devicetree/bindings/display/bridge/analogix_dp.txt
+++ b/Documentation/devicetree/bindings/display/bridge/analogix_dp.txt
@@ -5,6 +5,7 @@ Required properties for dp-controller:
 		platform specific such as:
 		 * "samsung,exynos5-dp"
 		 * "rockchip,rk3288-dp"
+		 * "rockchip,rk3399-edp"
 	-reg:
 		physical base address of the controller and length
 		of memory mapped region.
diff --git a/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt b/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt
index e832ff9..726c945 100644
--- a/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt
+++ b/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt
@@ -2,7 +2,8 @@ Rockchip RK3288 specific extensions to the Analogix Display Port
 ================================
 
 Required properties:
-- compatible: "rockchip,rk3288-edp";
+- compatible: "rockchip,rk3288-edp",
+	      "rockchip,rk3399-edp";
 
 - reg: physical base address of the controller and length
 
diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
index 0a30931..8557a08 100644
--- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
+++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
@@ -36,6 +36,8 @@
 
 #define RK3288_GRF_SOC_CON6		0x25c
 #define RK3288_EDP_LCDC_SEL		BIT(5)
+#define RK3399_GRF_SOC_CON20		0x6250
+#define RK3399_EDP_LCDC_SEL		BIT(5)
 
 #define HIWORD_UPDATE(val, mask)	(val | (mask) << 16)
 
@@ -159,6 +161,8 @@ rockchip_dp_drm_encoder_atomic_check(struct drm_encoder *encoder,
 				      struct drm_connector_state *conn_state)
 {
 	struct rockchip_crtc_state *s = to_rockchip_crtc_state(crtc_state);
+	struct rockchip_dp_device *dp = to_dp(encoder);
+	int ret;
 
 	/*
 	 * FIXME(Yakir): driver should configure the CRTC output video
@@ -173,8 +177,19 @@ rockchip_dp_drm_encoder_atomic_check(struct drm_encoder *encoder,
 	 * But if I configure CTRC to RGBaaa, and eDP driver still keep
 	 * RGB666 input video mode, then screen would works prefect.
 	 */
+
 	s->output_mode = ROCKCHIP_OUT_MODE_AAAA;
 	s->output_type = DRM_MODE_CONNECTOR_eDP;
+	if (dp->data->chip_type == RK3399_EDP) {
+		/*
+		 * For RK3399, VOP Lit must code the out mode to RGB888,
+		 * VOP Big must code the out mode to RGB10.
+		 */
+		ret = drm_of_encoder_active_endpoint_id(dp->dev->of_node,
+							encoder);
+		if (ret > 0)
+			s->output_mode = ROCKCHIP_OUT_MODE_P888;
+	}
 
 	return 0;
 }
@@ -378,6 +393,13 @@ static const struct dev_pm_ops rockchip_dp_pm_ops = {
 #endif
 };
 
+static const struct rockchip_dp_chip_data rk3399_edp = {
+	.lcdsel_grf_reg = RK3399_GRF_SOC_CON20,
+	.lcdsel_big = HIWORD_UPDATE(0, RK3399_EDP_LCDC_SEL),
+	.lcdsel_lit = HIWORD_UPDATE(RK3399_EDP_LCDC_SEL, RK3399_EDP_LCDC_SEL),
+	.chip_type = RK3399_EDP,
+};
+
 static const struct rockchip_dp_chip_data rk3288_dp = {
 	.lcdsel_grf_reg = RK3288_GRF_SOC_CON6,
 	.lcdsel_big = HIWORD_UPDATE(0, RK3288_EDP_LCDC_SEL),
@@ -387,6 +409,7 @@ static const struct rockchip_dp_chip_data rk3288_dp = {
 
 static const struct of_device_id rockchip_dp_dt_ids[] = {
 	{.compatible = "rockchip,rk3288-dp", .data = &rk3288_dp },
+	{.compatible = "rockchip,rk3399-edp", .data = &rk3399_edp },
 	{}
 };
 MODULE_DEVICE_TABLE(of, rockchip_dp_dt_ids);
diff --git a/include/drm/bridge/analogix_dp.h b/include/drm/bridge/analogix_dp.h
index 790ab5d..fc4aea3 100644
--- a/include/drm/bridge/analogix_dp.h
+++ b/include/drm/bridge/analogix_dp.h
@@ -16,11 +16,12 @@
 enum analogix_dp_devtype {
 	EXYNOS_DP,
 	RK3288_DP,
+	RK3399_EDP,
 };
 
 static inline bool is_rockchip(enum analogix_dp_devtype type)
 {
-	return type == RK3288_DP;
+	return type == RK3288_DP || type == RK3399_EDP;
 }
 
 struct analogix_dp_plat_data {
-- 
1.9.1

[toc] | [prev] | [next] | [standalone]

#1433608 — [PATCH v4 08/11] drm/rockchip: analogix_dp: update the comments about why need to hardcode VOP output mode

FromYakir Yang <ykk@rock-chips.com>
Date2016-06-29 11:30 +0200
Subject[PATCH v4 08/11] drm/rockchip: analogix_dp: update the comments about why need to hardcode VOP output mode
Message-ID<rPjYJ-2o1-13@gated-at.bofh.it>
In reply to#1433601
The hardware IC designed that VOP must output the RGB10 video format to
eDP contoller, and if eDP panel only support RGB8, then eDP contoller
should cut down the video data, not via VOP contoller, that's why we need
to hardcode the VOP output mode to RGA10 here.

Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Acked-by: Mark Yao <mark.yao@rock-chips.com>
Reviewed-by: Tomasz Figa <tomasz.figa@chromium.com>
---
Changes in v4:
- Correct the misspell of 'contoller'. (Sean)

Changes in v3:
- Add the reviewed flag from Tomasz.
    [https://chromium-review.googlesource.com/#/c/346853/12]
- Add the acked flag from Mark.

 drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 16 +++++-----------
 1 file changed, 5 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
index 0a0fb3a..850edc4 100644
--- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
+++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
@@ -182,17 +182,11 @@ rockchip_dp_drm_encoder_atomic_check(struct drm_encoder *encoder,
 	int ret;
 
 	/*
-	 * FIXME(Yakir): driver should configure the CRTC output video
-	 * mode with the display information which indicated the monitor
-	 * support colorimetry.
-	 *
-	 * But don't know why the CRTC driver seems could only output the
-	 * RGBaaa rightly. For example, if connect the "innolux,n116bge"
-	 * eDP screen, EDID would indicated that screen only accepted the
-	 * 6bpc mode. But if I configure CRTC to RGB666 output, then eDP
-	 * screen would show a blue picture (RGB888 show a green picture).
-	 * But if I configure CTRC to RGBaaa, and eDP driver still keep
-	 * RGB666 input video mode, then screen would works prefect.
+	 * The hardware IC designed that VOP must output the RGB10 video
+	 * format to eDP controller, and if eDP panel only support RGB8,
+	 * then eDP controller should cut down the video data, not via VOP
+	 * controller, that's why we need to hardcode the VOP output mode
+	 * to RGA10 here.
 	 */
 
 	s->output_mode = ROCKCHIP_OUT_MODE_AAAA;
-- 
1.9.1

[toc] | [prev] | [next] | [standalone]

#1433763 — Re: [PATCH v4 08/11] drm/rockchip: analogix_dp: update the comments about why need to hardcode VOP output mode

FromSean Paul <seanpaul@chromium.org>
Date2016-06-29 16:00 +0200
SubjectRe: [PATCH v4 08/11] drm/rockchip: analogix_dp: update the comments about why need to hardcode VOP output mode
Message-ID<rPoc2-4RT-39@gated-at.bofh.it>
In reply to#1433608
On Wed, Jun 29, 2016 at 5:15 AM, Yakir Yang <ykk@rock-chips.com> wrote:
> The hardware IC designed that VOP must output the RGB10 video format to
> eDP contoller, and if eDP panel only support RGB8, then eDP contoller
> should cut down the video data, not via VOP contoller, that's why we need
> to hardcode the VOP output mode to RGA10 here.
>
> Signed-off-by: Yakir Yang <ykk@rock-chips.com>
> Acked-by: Mark Yao <mark.yao@rock-chips.com>
> Reviewed-by: Tomasz Figa <tomasz.figa@chromium.com>


Reviewed-by: Sean Paul <seanpaul@chromium.org>

> ---
> Changes in v4:
> - Correct the misspell of 'contoller'. (Sean)
>
> Changes in v3:
> - Add the reviewed flag from Tomasz.
>     [https://chromium-review.googlesource.com/#/c/346853/12]
> - Add the acked flag from Mark.
>
>  drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 16 +++++-----------
>  1 file changed, 5 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
> index 0a0fb3a..850edc4 100644
> --- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
> +++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
> @@ -182,17 +182,11 @@ rockchip_dp_drm_encoder_atomic_check(struct drm_encoder *encoder,
>         int ret;
>
>         /*
> -        * FIXME(Yakir): driver should configure the CRTC output video
> -        * mode with the display information which indicated the monitor
> -        * support colorimetry.
> -        *
> -        * But don't know why the CRTC driver seems could only output the
> -        * RGBaaa rightly. For example, if connect the "innolux,n116bge"
> -        * eDP screen, EDID would indicated that screen only accepted the
> -        * 6bpc mode. But if I configure CRTC to RGB666 output, then eDP
> -        * screen would show a blue picture (RGB888 show a green picture).
> -        * But if I configure CTRC to RGBaaa, and eDP driver still keep
> -        * RGB666 input video mode, then screen would works prefect.
> +        * The hardware IC designed that VOP must output the RGB10 video
> +        * format to eDP controller, and if eDP panel only support RGB8,
> +        * then eDP controller should cut down the video data, not via VOP
> +        * controller, that's why we need to hardcode the VOP output mode
> +        * to RGA10 here.
>          */
>
>         s->output_mode = ROCKCHIP_OUT_MODE_AAAA;
> --
> 1.9.1
>
>

[toc] | [prev] | [next] | [standalone]

#1433610 — [PATCH v4 03/11] drm/bridge: analogix_dp: some rockchip chips need to flip REF_CLK bit setting

FromYakir Yang <ykk@rock-chips.com>
Date2016-06-29 11:30 +0200
Subject[PATCH v4 03/11] drm/bridge: analogix_dp: some rockchip chips need to flip REF_CLK bit setting
Message-ID<rPjYJ-2o1-15@gated-at.bofh.it>
In reply to#1433601
As vendor document indicate, when REF_CLK bit set 0, then DP
phy's REF_CLK should switch to 24M source clock.

But due to IC PHY layout mistaken, some chips need to flip this
bit(like RK3288), and unfortunately they didn't indicate in the
DP version register. That's why we have to make this little hack.

Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Reviewed-by: Tomasz Figa <tomasz.figa@chromium.com>
Tested-by: Javier Martinez Canillas <javier@osg.samsung.com>
---
Changes in v4:
- Remove subdev_type number, and add 'is_rockchip(type)' helper function (Sean)
- Add reviewed flag from Tomasz.

Changes in v3:
- Make this hack code more clear (Tomasz, reviewed at Google Gerrit)
  reg = ~reg & REF_CLK_MASK;  --->  reg ^= REF_CLK_MASK;
    [https://chromium-review.googlesource.com/#/c/346852/7/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c@80]
- Add tested flag from Javier

 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c | 12 ++++++++----
 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h |  1 +
 include/drm/bridge/analogix_dp.h                  |  5 +++++
 3 files changed, 14 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
index 49205ef..48030f0 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
@@ -74,8 +74,12 @@ void analogix_dp_init_analog_param(struct analogix_dp_device *dp)
 	reg = SEL_24M | TX_DVDD_BIT_1_0625V;
 	writel(reg, dp->reg_base + ANALOGIX_DP_ANALOG_CTL_2);
 
-	if (dp->plat_data && (dp->plat_data->dev_type == RK3288_DP)) {
-		writel(REF_CLK_24M, dp->reg_base + ANALOGIX_DP_PLL_REG_1);
+	if (dp->plat_data && is_rockchip(dp->plat_data->dev_type)) {
+		reg = REF_CLK_24M;
+		if (dp->plat_data->dev_type == RK3288_DP)
+			reg ^= REF_CLK_MASK;
+
+		writel(reg, dp->reg_base + ANALOGIX_DP_PLL_REG_1);
 		writel(0x95, dp->reg_base + ANALOGIX_DP_PLL_REG_2);
 		writel(0x40, dp->reg_base + ANALOGIX_DP_PLL_REG_3);
 		writel(0x58, dp->reg_base + ANALOGIX_DP_PLL_REG_4);
@@ -244,7 +248,7 @@ void analogix_dp_set_analog_power_down(struct analogix_dp_device *dp,
 	u32 reg;
 	u32 phy_pd_addr = ANALOGIX_DP_PHY_PD;
 
-	if (dp->plat_data && (dp->plat_data->dev_type == RK3288_DP))
+	if (dp->plat_data && is_rockchip(dp->plat_data->dev_type))
 		phy_pd_addr = ANALOGIX_DP_PD;
 
 	switch (block) {
@@ -448,7 +452,7 @@ void analogix_dp_init_aux(struct analogix_dp_device *dp)
 	analogix_dp_reset_aux(dp);
 
 	/* Disable AUX transaction H/W retry */
-	if (dp->plat_data && (dp->plat_data->dev_type == RK3288_DP))
+	if (dp->plat_data && is_rockchip(dp->plat_data->dev_type))
 		reg = AUX_BIT_PERIOD_EXPECTED_DELAY(0) |
 		      AUX_HW_RETRY_COUNT_SEL(3) |
 		      AUX_HW_RETRY_INTERVAL_600_MICROSECONDS;
diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h
index 88d56ad..cdcc6c5 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h
@@ -165,6 +165,7 @@
 /* ANALOGIX_DP_PLL_REG_1 */
 #define REF_CLK_24M				(0x1 << 0)
 #define REF_CLK_27M				(0x0 << 0)
+#define REF_CLK_MASK				(0x1 << 0)
 
 /* ANALOGIX_DP_LANE_MAP */
 #define LANE3_MAP_LOGIC_LANE_0			(0x0 << 6)
diff --git a/include/drm/bridge/analogix_dp.h b/include/drm/bridge/analogix_dp.h
index 25afb31..790ab5d 100644
--- a/include/drm/bridge/analogix_dp.h
+++ b/include/drm/bridge/analogix_dp.h
@@ -18,6 +18,11 @@ enum analogix_dp_devtype {
 	RK3288_DP,
 };
 
+static inline bool is_rockchip(enum analogix_dp_devtype type)
+{
+	return type == RK3288_DP;
+}
+
 struct analogix_dp_plat_data {
 	enum analogix_dp_devtype dev_type;
 	struct drm_panel *panel;
-- 
1.9.1

[toc] | [prev] | [next] | [standalone]

#1433804 — Re: [PATCH v4 0/11] Misc fixup and add RK3399 eDP support to Analogix DP driver

FromSean Paul <seanpaul@chromium.org>
Date2016-06-29 16:40 +0200
SubjectRe: [PATCH v4 0/11] Misc fixup and add RK3399 eDP support to Analogix DP driver
Message-ID<rPoOK-5l8-35@gated-at.bofh.it>
In reply to#1433601
On Wed, Jun 29, 2016 at 5:14 AM, Yakir Yang <ykk@rock-chips.com> wrote:
>
> RK3399 and RK3288 shared the same eDP IP controller, only some light
> difference with VOP configure and GRF configure.
>

The whole set looks good to me. All patches should have my R-b now,
thanks for the update.

Sean



> Also same misc fix to analogix_dp driver:
> - Hotplug invalid which report by Dan Carpenter
> - Make panel detect to an optional action
> - correct the register bit define error in ANALOGIX_DP_PLL_REG_1
>
> Changes in v4:
> - Assigned the GRF setting magic numbers to a #define that corresponds to
>   a TRM name. (Sean & Heiko)
> - Pass the chip type to device type directly. (Sean)
> - Add reviewed flag from Tomasz.
> - Add reviewed flag from Sean
> - Remove subdev_type number, and add 'is_rockchip(type)' helper function (Sean)
> - Add reviewed flag from Tomasz.
> - Improved the overly complicated .atomic_check function. (Sean)
> - Add reviewed flag from Tomasz
> - Move of_node_put(panel_node) directly below of_drm_find_panel (Sean)
> - Add reviewed flag from Tomasz
> - Add reviewed flag from Sean.
> - Add reviewed flag from Tomasz.
> - Using mask variable to collect the YUV video format. (Sean)
> - Add reviewed flag from Tomasz.
> - Correct the misspell of 'contoller'. (Sean)
> - Add reviewed flag from Sean.
> - Add reviewed flag from Tomasz.
> - Add reviewed flag from Doug.
> - Add reviewed flag from Tomasz.
> - Fix compiled error, sorry.
>   "dp->cgfclk"  -->  'dp->grfclk'
> - Check the the error code properly, 'EPROBE_DEFER' should be returned,
>   'ENOENT' should assign a NULL point to grfclk, other errors should be
>   regarded as failed. (Tomasz, Doug, reviewed at Google Gerrit)
>     [https://chromium-review.googlesource.com/#/c/351821/20/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c@249]
> - Add the document about optional 'grf' clock (Tomasz, Doug, reviewed at Google Gerrit)
>     [https://chromium-review.googlesource.com/#/c/351821/]
> - Add reviewed flag from Doug.
> - Add reviewed flag from Tomasz.
>
> Changes in v3:
> - Write a kerneldoc-style comment explaining the chips data fields (Tomasz, reviewed at Google Gerrit)
>     [https://chromium-review.googlesource.com/#/c/346313/10/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c@39]
> - Drop the '.lcdcsel_mask' number in chips data field (Tomasz, reviewed at Google Gerrit)
>     [https://chromium-review.googlesource.com/#/c/346313/10/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c@382]
> - Add acked flag from Mark.
> - Add reviewed flag from Tomasz.
>     [https://chromium-review.googlesource.com/#/c/346315/15]
> - Add tested flag from Javier
> - Make this hack code more clear (Tomasz, reviewed at Google Gerrit)
>   reg = ~reg & REF_CLK_MASK;  --->  reg ^= REF_CLK_MASK;
>     [https://chromium-review.googlesource.com/#/c/346852/7/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c@80]
> - Add tested flag from Javier
> - Give the "rk3399-edp" a separate line for clarity in document (Tomasz, reviewed at Google Gerrit)
>     [https://chromium-review.googlesource.com/#/c/346314/10/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt@5]
> - Move 'output_type' setting before the return statement (Tomasz, reviewed at Google Gerrit)
>     [https://chromium-review.googlesource.com/#/c/346314/10/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c@154]
> - Add the acked flag from Mark.
> - Add the acked flag from Mark.
> - Avoid to change any internal driver state in .mode_valid interface. (Tomasz, reviewed at Google Gerrit)
>     [https://chromium-review.googlesource.com/#/c/346318/10/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c@113]
> - Hook the connector's color_formats in .get_modes directly. (Tomasz, reviewed at Google Gerrit)
>     [https://chromium-review.googlesource.com/#/c/346317/15]
> - Add the acked flag from Mark.
> - Add the reviewed flag from Tomasz.
>     [https://chromium-review.googlesource.com/#/c/346853/12]
> - Add the acked flag from Mark.
> - Add reviewed flag from Stéphane.
>     [https://chromium-review.googlesource.com/#/c/346319/15]
> - Add tested flag from Javier
> - Add this patch in v3
> - Add this patch in v3
>
> Yakir Yang (11):
>   drm/rockchip: analogix_dp: split the lcdc select setting into device
>     data
>   drm/bridge: analogix_dp: correct the register bit define error in
>     ANALOGIX_DP_PLL_REG_1
>   drm/bridge: analogix_dp: some rockchip chips need to flip REF_CLK bit
>     setting
>   drm/rockchip: analogix_dp: add rk3399 eDP support
>   drm/rockchip: analogix_dp: make panel detect to an optional action
>   drm/bridge: analogix_dp: passing the connector as an argument in
>     .get_modes()
>   drm/rockchip: analogix_dp: correct the connector display color format
>     and bpc
>   drm/rockchip: analogix_dp: update the comments about why need to
>     hardcode VOP output mode
>   drm/bridge: analogix_dp: fix no drm hpd event when panel plug in
>   drm/rockchip: analogix_dp: introduce the pclk for grf
>   dt-bindings: analogix_dp: rockchip: correct the wrong compatible name
>
>  .../bindings/display/bridge/analogix_dp.txt        |   1 +
>  .../display/rockchip/analogix_dp-rockchip.txt      |   9 +-
>  drivers/gpu/drm/bridge/analogix/analogix_dp_core.c |   2 +-
>  drivers/gpu/drm/bridge/analogix/analogix_dp_core.h |   8 +-
>  drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c  |  12 +-
>  drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h  |   5 +-
>  drivers/gpu/drm/exynos/exynos_dp.c                 |   4 +-
>  drivers/gpu/drm/rockchip/analogix_dp-rockchip.c    | 174 +++++++++++++++------
>  include/drm/bridge/analogix_dp.h                   |   9 +-
>  9 files changed, 160 insertions(+), 64 deletions(-)
>
> --
> 1.9.1
>
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html

[toc] | [prev] | [next] | [standalone]

#1434248 — Re: [PATCH v4 0/11] Misc fixup and add RK3399 eDP support to Analogix DP driver[Involving remittance information, please pay attention to the safety of property]

FromYakir Yang <ykk@rock-chips.com>
Date2016-06-30 08:40 +0200
SubjectRe: [PATCH v4 0/11] Misc fixup and add RK3399 eDP support to Analogix DP driver[Involving remittance information, please pay attention to the safety of property]
Message-ID<rPDNM-6av-9@gated-at.bofh.it>
In reply to#1433804
Sean,

On 06/29/2016 10:01 PM, Sean Paul wrote:
> On Wed, Jun 29, 2016 at 5:14 AM, Yakir Yang <ykk@rock-chips.com> wrote:
>> RK3399 and RK3288 shared the same eDP IP controller, only some light
>> difference with VOP configure and GRF configure.
>>
> The whole set looks good to me. All patches should have my R-b now,
> thanks for the update.

Thanks  :-D

- Yakir

> Sean
>
>
>
>> Also same misc fix to analogix_dp driver:
>> - Hotplug invalid which report by Dan Carpenter
>> - Make panel detect to an optional action
>> - correct the register bit define error in ANALOGIX_DP_PLL_REG_1
>>
>> Changes in v4:
>> - Assigned the GRF setting magic numbers to a #define that corresponds to
>>    a TRM name. (Sean & Heiko)
>> - Pass the chip type to device type directly. (Sean)
>> - Add reviewed flag from Tomasz.
>> - Add reviewed flag from Sean
>> - Remove subdev_type number, and add 'is_rockchip(type)' helper function (Sean)
>> - Add reviewed flag from Tomasz.
>> - Improved the overly complicated .atomic_check function. (Sean)
>> - Add reviewed flag from Tomasz
>> - Move of_node_put(panel_node) directly below of_drm_find_panel (Sean)
>> - Add reviewed flag from Tomasz
>> - Add reviewed flag from Sean.
>> - Add reviewed flag from Tomasz.
>> - Using mask variable to collect the YUV video format. (Sean)
>> - Add reviewed flag from Tomasz.
>> - Correct the misspell of 'contoller'. (Sean)
>> - Add reviewed flag from Sean.
>> - Add reviewed flag from Tomasz.
>> - Add reviewed flag from Doug.
>> - Add reviewed flag from Tomasz.
>> - Fix compiled error, sorry.
>>    "dp->cgfclk"  -->  'dp->grfclk'
>> - Check the the error code properly, 'EPROBE_DEFER' should be returned,
>>    'ENOENT' should assign a NULL point to grfclk, other errors should be
>>    regarded as failed. (Tomasz, Doug, reviewed at Google Gerrit)
>>      [https://chromium-review.googlesource.com/#/c/351821/20/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c@249]
>> - Add the document about optional 'grf' clock (Tomasz, Doug, reviewed at Google Gerrit)
>>      [https://chromium-review.googlesource.com/#/c/351821/]
>> - Add reviewed flag from Doug.
>> - Add reviewed flag from Tomasz.
>>
>> Changes in v3:
>> - Write a kerneldoc-style comment explaining the chips data fields (Tomasz, reviewed at Google Gerrit)
>>      [https://chromium-review.googlesource.com/#/c/346313/10/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c@39]
>> - Drop the '.lcdcsel_mask' number in chips data field (Tomasz, reviewed at Google Gerrit)
>>      [https://chromium-review.googlesource.com/#/c/346313/10/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c@382]
>> - Add acked flag from Mark.
>> - Add reviewed flag from Tomasz.
>>      [https://chromium-review.googlesource.com/#/c/346315/15]
>> - Add tested flag from Javier
>> - Make this hack code more clear (Tomasz, reviewed at Google Gerrit)
>>    reg = ~reg & REF_CLK_MASK;  --->  reg ^= REF_CLK_MASK;
>>      [https://chromium-review.googlesource.com/#/c/346852/7/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c@80]
>> - Add tested flag from Javier
>> - Give the "rk3399-edp" a separate line for clarity in document (Tomasz, reviewed at Google Gerrit)
>>      [https://chromium-review.googlesource.com/#/c/346314/10/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt@5]
>> - Move 'output_type' setting before the return statement (Tomasz, reviewed at Google Gerrit)
>>      [https://chromium-review.googlesource.com/#/c/346314/10/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c@154]
>> - Add the acked flag from Mark.
>> - Add the acked flag from Mark.
>> - Avoid to change any internal driver state in .mode_valid interface. (Tomasz, reviewed at Google Gerrit)
>>      [https://chromium-review.googlesource.com/#/c/346318/10/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c@113]
>> - Hook the connector's color_formats in .get_modes directly. (Tomasz, reviewed at Google Gerrit)
>>      [https://chromium-review.googlesource.com/#/c/346317/15]
>> - Add the acked flag from Mark.
>> - Add the reviewed flag from Tomasz.
>>      [https://chromium-review.googlesource.com/#/c/346853/12]
>> - Add the acked flag from Mark.
>> - Add reviewed flag from Stéphane.
>>      [https://chromium-review.googlesource.com/#/c/346319/15]
>> - Add tested flag from Javier
>> - Add this patch in v3
>> - Add this patch in v3
>>
>> Yakir Yang (11):
>>    drm/rockchip: analogix_dp: split the lcdc select setting into device
>>      data
>>    drm/bridge: analogix_dp: correct the register bit define error in
>>      ANALOGIX_DP_PLL_REG_1
>>    drm/bridge: analogix_dp: some rockchip chips need to flip REF_CLK bit
>>      setting
>>    drm/rockchip: analogix_dp: add rk3399 eDP support
>>    drm/rockchip: analogix_dp: make panel detect to an optional action
>>    drm/bridge: analogix_dp: passing the connector as an argument in
>>      .get_modes()
>>    drm/rockchip: analogix_dp: correct the connector display color format
>>      and bpc
>>    drm/rockchip: analogix_dp: update the comments about why need to
>>      hardcode VOP output mode
>>    drm/bridge: analogix_dp: fix no drm hpd event when panel plug in
>>    drm/rockchip: analogix_dp: introduce the pclk for grf
>>    dt-bindings: analogix_dp: rockchip: correct the wrong compatible name
>>
>>   .../bindings/display/bridge/analogix_dp.txt        |   1 +
>>   .../display/rockchip/analogix_dp-rockchip.txt      |   9 +-
>>   drivers/gpu/drm/bridge/analogix/analogix_dp_core.c |   2 +-
>>   drivers/gpu/drm/bridge/analogix/analogix_dp_core.h |   8 +-
>>   drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c  |  12 +-
>>   drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h  |   5 +-
>>   drivers/gpu/drm/exynos/exynos_dp.c                 |   4 +-
>>   drivers/gpu/drm/rockchip/analogix_dp-rockchip.c    | 174 +++++++++++++++------
>>   include/drm/bridge/analogix_dp.h                   |   9 +-
>>   9 files changed, 160 insertions(+), 64 deletions(-)
>>
>> --
>> 1.9.1
>>
>>
>> --
>> To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in
>> the body of a message to majordomo@vger.kernel.org
>> More majordomo info at  http://vger.kernel.org/majordomo-info.html
>
>

[toc] | [prev] | [standalone]

Back to top | Article view | linux.kernel

csiph-web