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[PATCH 0/3] arm64: dts: uniphier: UniPhier DTS updates (64bit) for v4.8-rc1

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  [PATCH 0/3] arm64: dts: uniphier: UniPhier DTS updates (64bit) for v4.8-rc1 Masahiro Yamada <yamada.masahiro@socionext.com> - 2016-06-14 05:10 +0200
    [PATCH 3/3] arm64: dts: uniphier: add /memreserve/ for spin-table release address Masahiro Yamada <yamada.masahiro@socionext.com> - 2016-06-14 05:10 +0200
    [PATCH 1/3] arm64: dts: uniphier: add SoC-Glue node to UniPhier 64bit SoCs Masahiro Yamada <yamada.masahiro@socionext.com> - 2016-06-14 05:10 +0200
    Re: [PATCH 0/3] arm64: dts: uniphier: UniPhier DTS updates (64bit)  for v4.8-rc1 Olof Johansson <olof@lixom.net> - 2016-06-14 19:50 +0200

#1421546 — [PATCH 0/3] arm64: dts: uniphier: UniPhier DTS updates (64bit) for v4.8-rc1

Masahiro Yamada (3):
  arm64: dts: uniphier: add SoC-Glue node to UniPhier 64bit SoCs
  arm64: dts: uniphier: change cpu-release-address
  arm64: dts: uniphier: add /memreserve/ for spin-table release address

 arch/arm64/boot/dts/socionext/uniphier-ph1-ld20.dtsi | 20 +++++++++++++-------
 1 file changed, 13 insertions(+), 7 deletions(-)

-- 
1.9.1

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#1421547 — [PATCH 3/3] arm64: dts: uniphier: add /memreserve/ for spin-table release address

As Documentation/arm64/booting.txt says, the cpu-release-addr
location should be reserved.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Mark Rutland <mark.rutland@arm.com>
---

 arch/arm64/boot/dts/socionext/uniphier-ph1-ld20.dtsi | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm64/boot/dts/socionext/uniphier-ph1-ld20.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ph1-ld20.dtsi
index 644025c..c223915 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-ph1-ld20.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-ph1-ld20.dtsi
@@ -42,6 +42,8 @@
  *     OTHER DEALINGS IN THE SOFTWARE.
  */
 
+/memreserve/ 0x80000000 0x00000008;	/* cpu-release-addr */
+
 / {
 	compatible = "socionext,ph1-ld20";
 	#address-cells = <2>;
-- 
1.9.1

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#1421552 — [PATCH 1/3] arm64: dts: uniphier: add SoC-Glue node to UniPhier 64bit SoCs

This node consists of various system-level configuration registers.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
---

 arch/arm64/boot/dts/socionext/uniphier-ph1-ld20.dtsi | 10 +++++++---
 1 file changed, 7 insertions(+), 3 deletions(-)

diff --git a/arch/arm64/boot/dts/socionext/uniphier-ph1-ld20.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ph1-ld20.dtsi
index 9532880..31dc51b 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-ph1-ld20.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-ph1-ld20.dtsi
@@ -264,9 +264,13 @@
 			reg = <0x59801000 0x400>;
 		};
 
-		pinctrl: pinctrl@5f801000 {
-			compatible = "socionext,ph1-ld20-pinctrl", "syscon";
-			reg = <0x5f801000 0xe00>;
+		soc-glue@5f800000 {
+			compatible = "simple-mfd", "syscon";
+			reg = <0x5f800000 0x2000>;
+
+			pinctrl: pinctrl {
+				 compatible = "socionext,uniphier-ld20-pinctrl";
+			};
 		};
 
 		gic: interrupt-controller@5fe00000 {
-- 
1.9.1

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#1422137 — Re: [PATCH 0/3] arm64: dts: uniphier: UniPhier DTS updates (64bit) for v4.8-rc1

On Tue, Jun 14, 2016 at 12:01:40PM +0900, Masahiro Yamada wrote:
> 
> 
> Masahiro Yamada (3):
>   arm64: dts: uniphier: add SoC-Glue node to UniPhier 64bit SoCs
>   arm64: dts: uniphier: change cpu-release-address
>   arm64: dts: uniphier: add /memreserve/ for spin-table release address

Applied, thanks.


-Olof

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