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[PATCH v2 0/10] Add RK3399 eDP support and fix some bugs to analogix_dp driver.

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  [PATCH v2 0/10] Add RK3399 eDP support and fix some bugs to analogix_dp driver. Yakir Yang <ykk@rock-chips.com> - 2016-05-24 07:10 +0200
    [PATCH v2 09/10] drm/rockchip: analogix_dp: update the comments about why need to hardcode VOP output mode Yakir Yang <ykk@rock-chips.com> - 2016-05-24 07:10 +0200
    [PATCH v2 03/10] drm/bridge: analogix_dp: correct the register bit define error in ANALOGIX_DP_PLL_REG_1 Yakir Yang <ykk@rock-chips.com> - 2016-05-24 07:10 +0200
    [PATCH v2 06/10] drm/rockchip: analogix_dp: make panel detect to an optional action Yakir Yang <ykk@rock-chips.com> - 2016-05-24 07:10 +0200
    [PATCH v2 02/10] drm/rockchip: analogix_dp: split the lcdc select setting into device data Yakir Yang <ykk@rock-chips.com> - 2016-05-24 07:10 +0200
    [PATCH v2 08/10] drm/rockchip: analogix_dp: correct the connector display color format and bpc Yakir Yang <ykk@rock-chips.com> - 2016-05-24 07:10 +0200
    [PATCH v2 04/10] drm/bridge: analogix_dp: some rockchip chips need to flip REF_CLK bit setting Yakir Yang <ykk@rock-chips.com> - 2016-05-24 07:10 +0200
    [PATCH v2 07/10] drm/bridge: analogix_dp: introduce connector mode_valid callback to plat driver Yakir Yang <ykk@rock-chips.com> - 2016-05-24 07:10 +0200
    Re: [PATCH v2 0/10] Add RK3399 eDP support and fix some bugs to  analogix_dp driver. Yakir Yang <ykk@rock-chips.com> - 2016-05-26 11:40 +0200
      Re: [PATCH v2 0/10] Add RK3399 eDP support and fix some bugs to  analogix_dp driver. Javier Martinez Canillas <javier@osg.samsung.com> - 2016-05-26 14:50 +0200
        Re: [PATCH v2 0/10] Add RK3399 eDP support and fix some bugs to  analogix_dp driver. Yakir Yang <ykk@rock-chips.com> - 2016-05-27 08:20 +0200

#1405837 — [PATCH v2 0/10] Add RK3399 eDP support and fix some bugs to analogix_dp driver.

Hi all,

This series have been posted about one month, still no comments, help here :(

RK3399 and RK3288 shared the same eDP IP controller, only some light
difference with VOP configure and GRF configure.

Also same misc fix to analogix_dp driver:
- Hotplug invalid which report by Dan Carpenter
- Make panel detect to an optional action
- correct the register bit define error in ANALOGIX_DP_PLL_REG_1


Changes in v2:
- new patch in v2
- rebase with drm-next, fix some conflicts
- new patch in v2

Yakir Yang (10):
  drm/bridge: analogix_dp: rename RK3288_DP to ROCKCHIP_DP
  drm/rockchip: analogix_dp: split the lcdc select setting into device
    data
  drm/bridge: analogix_dp: correct the register bit define error in
    ANALOGIX_DP_PLL_REG_1
  drm/bridge: analogix_dp: some rockchip chips need to flip REF_CLK bit
    setting
  drm/rockchip: analogix_dp: add rk3399 eDP support
  drm/rockchip: analogix_dp: make panel detect to an optional action
  drm/bridge: analogix_dp: introduce connector mode_valid callback to
    plat driver
  drm/rockchip: analogix_dp: correct the connector display color format
    and bpc
  drm/rockchip: analogix_dp: update the comments about why need to
    hardcode VOP output mode
  drm/bridge: analogix_dp: fix no drm hpd event when panel plug in

 .../bindings/display/bridge/analogix_dp.txt        |   1 +
 .../display/rockchip/analogix_dp-rockchip.txt      |   2 +-
 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c |  19 ++-
 drivers/gpu/drm/bridge/analogix/analogix_dp_core.h |   8 +-
 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c  |  12 +-
 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h  |   5 +-
 drivers/gpu/drm/rockchip/analogix_dp-rockchip.c    | 157 ++++++++++++++-------
 include/drm/bridge/analogix_dp.h                   |  10 ++
 8 files changed, 152 insertions(+), 62 deletions(-)

-- 
1.9.1

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#1405838 — [PATCH v2 09/10] drm/rockchip: analogix_dp: update the comments about why need to hardcode VOP output mode

The hardware IC designed that VOP must output the RGB10 video format to
eDP contoller, and if eDP panel only support RGB8, then eDP contoller
should cut down the video data, not via VOP contoller, that's why we need
to hardcode the VOP output mode to RGA10 here.

Signed-off-by: Yakir Yang <ykk@rock-chips.com>
---
Changes in v2:
- new patch in v2

 drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 16 +++++-----------
 1 file changed, 5 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
index 910cceb..4b64964 100644
--- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
+++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
@@ -170,17 +170,11 @@ rockchip_dp_drm_encoder_atomic_check(struct drm_encoder *encoder,
 	s->output_type = DRM_MODE_CONNECTOR_eDP;
 
 	/*
-	 * FIXME(Yakir): driver should configure the CRTC output video
-	 * mode with the display information which indicated the monitor
-	 * support colorimetry.
-	 *
-	 * But don't know why the CRTC driver seems could only output the
-	 * RGBaaa rightly. For example, if connect the "innolux,n116bge"
-	 * eDP screen, EDID would indicated that screen only accepted the
-	 * 6bpc mode. But if I configure CRTC to RGB666 output, then eDP
-	 * screen would show a blue picture (RGB888 show a green picture).
-	 * But if I configure CTRC to RGBaaa, and eDP driver still keep
-	 * RGB666 input video mode, then screen would works prefect.
+	 * The hardware IC designed that VOP must output the RGB10 video
+	 * format to eDP contoller, and if eDP panel only support RGB8,
+	 * then eDP contoller should cut down the video data, not via VOP
+	 * contoller, that's why we need to hardcode the VOP output mode
+	 * to RGA10 here.
 	 */
 
 	ret = drm_of_encoder_active_endpoint_id(dp->dev->of_node, encoder);
-- 
1.9.1

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#1405839 — [PATCH v2 03/10] drm/bridge: analogix_dp: correct the register bit define error in ANALOGIX_DP_PLL_REG_1

There're an register define error in ANALOGIX_DP_PLL_REG_1 which introduced
by commit bcec20fd5ad6 ("drm: bridge: analogix/dp: add some rk3288 special
registers setting").

The PHY PLL input clock source is selected by ANALOGIX_DP_PLL_REG_1
BIT 0, not BIT 1.

Signed-off-by: Yakir Yang <ykk@rock-chips.com>
---
Changes in v2: None

 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h
index 337912b..88d56ad 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h
@@ -163,8 +163,8 @@
 #define HSYNC_POLARITY_CFG			(0x1 << 0)
 
 /* ANALOGIX_DP_PLL_REG_1 */
-#define REF_CLK_24M				(0x1 << 1)
-#define REF_CLK_27M				(0x0 << 1)
+#define REF_CLK_24M				(0x1 << 0)
+#define REF_CLK_27M				(0x0 << 0)
 
 /* ANALOGIX_DP_LANE_MAP */
 #define LANE3_MAP_LOGIC_LANE_0			(0x0 << 6)
-- 
1.9.1

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#1405840 — [PATCH v2 06/10] drm/rockchip: analogix_dp: make panel detect to an optional action

Some boards don't need to declare a panel device node, like the
display interface is DP monitors, so it's necessary to make the
panel detect to an optional action.

Signed-off-by: Yakir Yang <ykk@rock-chips.com>
---
Changes in v2: None

 drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 48 ++++++++++++-------------
 1 file changed, 22 insertions(+), 26 deletions(-)

diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
index d684c97..f29ca3d 100644
--- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
+++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
@@ -325,38 +325,34 @@ static int rockchip_dp_probe(struct platform_device *pdev)
 {
 	struct device *dev = &pdev->dev;
 	struct device_node *panel_node, *port, *endpoint;
+	struct drm_panel *panel = NULL;
 	struct rockchip_dp_device *dp;
-	struct drm_panel *panel;
 
 	port = of_graph_get_port_by_id(dev->of_node, 1);
-	if (!port) {
-		dev_err(dev, "can't find output port\n");
-		return -EINVAL;
-	}
-
-	endpoint = of_get_child_by_name(port, "endpoint");
-	of_node_put(port);
-	if (!endpoint) {
-		dev_err(dev, "no output endpoint found\n");
-		return -EINVAL;
-	}
-
-	panel_node = of_graph_get_remote_port_parent(endpoint);
-	of_node_put(endpoint);
-	if (!panel_node) {
-		dev_err(dev, "no output node found\n");
-		return -EINVAL;
-	}
-
-	panel = of_drm_find_panel(panel_node);
-	if (!panel) {
-		DRM_ERROR("failed to find panel\n");
+	if (port) {
+		endpoint = of_get_child_by_name(port, "endpoint");
+		of_node_put(port);
+		if (!endpoint) {
+			dev_err(dev, "no output endpoint found\n");
+			return -EINVAL;
+		}
+
+		panel_node = of_graph_get_remote_port_parent(endpoint);
+		of_node_put(endpoint);
+		if (!panel_node) {
+			dev_err(dev, "no output node found\n");
+			return -EINVAL;
+		}
+
+		panel = of_drm_find_panel(panel_node);
+		if (!panel) {
+			DRM_ERROR("failed to find panel\n");
+			of_node_put(panel_node);
+			return -EPROBE_DEFER;
+		}
 		of_node_put(panel_node);
-		return -EPROBE_DEFER;
 	}
 
-	of_node_put(panel_node);
-
 	dp = devm_kzalloc(dev, sizeof(*dp), GFP_KERNEL);
 	if (!dp)
 		return -ENOMEM;
-- 
1.9.1

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#1405841 — [PATCH v2 02/10] drm/rockchip: analogix_dp: split the lcdc select setting into device data

eDP controller need to declare which vop provide the video source,
and it's defined in GRF registers.

But different chips have different GRF register address, so we need to
create a device data to declare the GRF messages for each chips.

Signed-off-by: Yakir Yang <ykk@rock-chips.com>
---
Changes in v2: None

 drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 35 ++++++++++++++++++-------
 1 file changed, 26 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
index 2bc8a7e..260c43f 100644
--- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
+++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
@@ -14,6 +14,7 @@
 
 #include <linux/component.h>
 #include <linux/mfd/syscon.h>
+#include <linux/of_device.h>
 #include <linux/of_graph.h>
 #include <linux/regmap.h>
 #include <linux/reset.h>
@@ -35,11 +36,12 @@
 
 #define to_dp(nm)	container_of(nm, struct rockchip_dp_device, nm)
 
-/* dp grf register offset */
-#define GRF_SOC_CON6                            0x025c
-#define GRF_EDP_LCD_SEL_MASK                    BIT(5)
-#define GRF_EDP_SEL_VOP_LIT                     BIT(5)
-#define GRF_EDP_SEL_VOP_BIG                     0
+struct rockchip_dp_chip_data {
+	u32	lcdsel_grf_reg;
+	u32	lcdsel_big;
+	u32	lcdsel_lit;
+	u32	lcdsel_mask;
+};
 
 struct rockchip_dp_device {
 	struct drm_device        *drm_dev;
@@ -51,6 +53,8 @@ struct rockchip_dp_device {
 	struct regmap            *grf;
 	struct reset_control     *rst;
 
+	const struct rockchip_dp_chip_data *data;
+
 	struct analogix_dp_plat_data plat_data;
 };
 
@@ -119,13 +123,13 @@ static void rockchip_dp_drm_encoder_enable(struct drm_encoder *encoder)
 		return;
 
 	if (ret)
-		val = GRF_EDP_SEL_VOP_LIT | (GRF_EDP_LCD_SEL_MASK << 16);
+		val = dp->data->lcdsel_lit | dp->data->lcdsel_mask;
 	else
-		val = GRF_EDP_SEL_VOP_BIG | (GRF_EDP_LCD_SEL_MASK << 16);
+		val = dp->data->lcdsel_big | dp->data->lcdsel_mask;
 
 	dev_dbg(dp->dev, "vop %s output to dp\n", (ret) ? "LIT" : "BIG");
 
-	ret = regmap_write(dp->grf, GRF_SOC_CON6, val);
+	ret = regmap_write(dp->grf, dp->data->lcdsel_grf_reg, val);
 	if (ret != 0) {
 		dev_err(dp->dev, "Could not write to GRF: %d\n", ret);
 		return;
@@ -246,6 +250,7 @@ static int rockchip_dp_bind(struct device *dev, struct device *master,
 			    void *data)
 {
 	struct rockchip_dp_device *dp = dev_get_drvdata(dev);
+	const struct rockchip_dp_chip_data *dp_data;
 	struct drm_device *drm_dev = data;
 	int ret;
 
@@ -256,10 +261,15 @@ static int rockchip_dp_bind(struct device *dev, struct device *master,
 	 */
 	dev_set_drvdata(dev, NULL);
 
+	dp_data = of_device_get_match_data(dev);
+	if (!dp_data)
+		return -ENODEV;
+
 	ret = rockchip_dp_init(dp);
 	if (ret < 0)
 		return ret;
 
+	dp->data = dp_data;
 	dp->drm_dev = drm_dev;
 
 	ret = rockchip_dp_drm_create_encoder(dp);
@@ -365,8 +375,15 @@ static const struct dev_pm_ops rockchip_dp_pm_ops = {
 	SET_SYSTEM_SLEEP_PM_OPS(rockchip_dp_suspend, rockchip_dp_resume)
 };
 
+static const struct rockchip_dp_chip_data rk3288_dp = {
+	.lcdsel_grf_reg = 0x025c,
+	.lcdsel_big = 0,
+	.lcdsel_lit = BIT(5),
+	.lcdsel_mask = BIT(21),
+};
+
 static const struct of_device_id rockchip_dp_dt_ids[] = {
-	{.compatible = "rockchip,rk3288-dp",},
+	{.compatible = "rockchip,rk3288-dp", .data = &rk3288_dp },
 	{}
 };
 MODULE_DEVICE_TABLE(of, rockchip_dp_dt_ids);
-- 
1.9.1

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#1405842 — [PATCH v2 08/10] drm/rockchip: analogix_dp: correct the connector display color format and bpc

Rockchip VOP couldn't output YUV video format for eDP controller, so
when driver detect connector support YUV video format, we need to hack
it down to RGB888.

Signed-off-by: Yakir Yang <ykk@rock-chips.com>
---
Changes in v2: None

 drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
index f29ca3d..910cceb 100644
--- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
+++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
@@ -97,6 +97,24 @@ static int rockchip_dp_powerdown(struct analogix_dp_plat_data *plat_data)
 	return 0;
 }
 
+static enum drm_mode_status
+rockchip_dp_mode_valid(struct analogix_dp_plat_data *plat_data,
+		       struct drm_connector *connector,
+		       struct drm_display_mode *mode)
+{
+	struct drm_display_info *di = &connector->display_info;
+
+	if (di->color_formats & DRM_COLOR_FORMAT_YCRCB444 ||
+	    di->color_formats & DRM_COLOR_FORMAT_YCRCB422) {
+		di->color_formats &= ~(DRM_COLOR_FORMAT_YCRCB422 |
+				       DRM_COLOR_FORMAT_YCRCB444);
+		di->color_formats |= DRM_COLOR_FORMAT_RGB444;
+		di->bpc = 8;
+	}
+
+	return MODE_OK;
+}
+
 static bool
 rockchip_dp_drm_encoder_mode_fixup(struct drm_encoder *encoder,
 				   const struct drm_display_mode *mode,
@@ -306,6 +324,7 @@ static int rockchip_dp_bind(struct device *dev, struct device *master,
 	dp->plat_data.subdev_type = dp_data->chip_type;
 	dp->plat_data.power_on = rockchip_dp_poweron;
 	dp->plat_data.power_off = rockchip_dp_powerdown;
+	dp->plat_data.mode_valid = rockchip_dp_mode_valid;
 
 	return analogix_dp_bind(dev, dp->drm_dev, &dp->plat_data);
 }
-- 
1.9.1

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#1405843 — [PATCH v2 04/10] drm/bridge: analogix_dp: some rockchip chips need to flip REF_CLK bit setting

As vendor document indicate, when REF_CLK bit set 0, then DP
phy's REF_CLK should switch to 24M source clock.

But due to IC PHY layout mistaken, some chips need to flip this
bit(like RK3288), and unfortunately they didn't indicate in the
DP version register. That's why we have to make this little hack.

Signed-off-by: Yakir Yang <ykk@rock-chips.com>
---
Changes in v2:
- new patch in v2

 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c | 6 +++++-
 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h | 1 +
 drivers/gpu/drm/rockchip/analogix_dp-rockchip.c   | 3 +++
 include/drm/bridge/analogix_dp.h                  | 5 +++++
 4 files changed, 14 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
index 931a76c..31366bf 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
@@ -75,7 +75,11 @@ void analogix_dp_init_analog_param(struct analogix_dp_device *dp)
 	writel(reg, dp->reg_base + ANALOGIX_DP_ANALOG_CTL_2);
 
 	if (dp->plat_data && (dp->plat_data->dev_type == ROCKCHIP_DP)) {
-		writel(REF_CLK_24M, dp->reg_base + ANALOGIX_DP_PLL_REG_1);
+		reg = REF_CLK_24M;
+		if (dp->plat_data->subdev_type == RK3288_DP)
+			reg = ~reg & REF_CLK_MASK;
+
+		writel(reg, dp->reg_base + ANALOGIX_DP_PLL_REG_1);
 		writel(0x95, dp->reg_base + ANALOGIX_DP_PLL_REG_2);
 		writel(0x40, dp->reg_base + ANALOGIX_DP_PLL_REG_3);
 		writel(0x58, dp->reg_base + ANALOGIX_DP_PLL_REG_4);
diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h
index 88d56ad..cdcc6c5 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h
@@ -165,6 +165,7 @@
 /* ANALOGIX_DP_PLL_REG_1 */
 #define REF_CLK_24M				(0x1 << 0)
 #define REF_CLK_27M				(0x0 << 0)
+#define REF_CLK_MASK				(0x1 << 0)
 
 /* ANALOGIX_DP_LANE_MAP */
 #define LANE3_MAP_LOGIC_LANE_0			(0x0 << 6)
diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
index 260c43f..29c4105 100644
--- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
+++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
@@ -41,6 +41,7 @@ struct rockchip_dp_chip_data {
 	u32	lcdsel_big;
 	u32	lcdsel_lit;
 	u32	lcdsel_mask;
+	u32	chip_type;
 };
 
 struct rockchip_dp_device {
@@ -281,6 +282,7 @@ static int rockchip_dp_bind(struct device *dev, struct device *master,
 	dp->plat_data.encoder = &dp->encoder;
 
 	dp->plat_data.dev_type = ROCKCHIP_DP;
+	dp->plat_data.subdev_type = dp_data->chip_type;
 	dp->plat_data.power_on = rockchip_dp_poweron;
 	dp->plat_data.power_off = rockchip_dp_powerdown;
 
@@ -380,6 +382,7 @@ static const struct rockchip_dp_chip_data rk3288_dp = {
 	.lcdsel_big = 0,
 	.lcdsel_lit = BIT(5),
 	.lcdsel_mask = BIT(21),
+	.chip_type = RK3288_DP,
 };
 
 static const struct of_device_id rockchip_dp_dt_ids[] = {
diff --git a/include/drm/bridge/analogix_dp.h b/include/drm/bridge/analogix_dp.h
index 9e5d013..06c0250 100644
--- a/include/drm/bridge/analogix_dp.h
+++ b/include/drm/bridge/analogix_dp.h
@@ -18,8 +18,13 @@ enum analogix_dp_devtype {
 	ROCKCHIP_DP,
 };
 
+enum analogix_dp_sub_devtype {
+	RK3288_DP,
+};
+
 struct analogix_dp_plat_data {
 	enum analogix_dp_devtype dev_type;
+	enum analogix_dp_sub_devtype subdev_type;
 	struct drm_panel *panel;
 	struct drm_encoder *encoder;
 	struct drm_connector *connector;
-- 
1.9.1

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#1405844 — [PATCH v2 07/10] drm/bridge: analogix_dp: introduce connector mode_valid callback to plat driver

It's helpful to expand the mode_valid callback to platform driver,
so they could valid the display mode or information.

Signed-off-by: Yakir Yang <ykk@rock-chips.com>
---
Changes in v2: None

 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 15 +++++++++++++++
 include/drm/bridge/analogix_dp.h                   |  4 ++++
 2 files changed, 19 insertions(+)

diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
index 4a1b3b8..5af9ce4 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
@@ -943,6 +943,20 @@ int analogix_dp_get_modes(struct drm_connector *connector)
 	return num_modes;
 }
 
+static enum drm_mode_status
+analogix_dp_mode_valid(struct drm_connector *connector,
+		       struct drm_display_mode *mode)
+{
+	struct analogix_dp_device *dp = to_dp(connector);
+	enum drm_mode_status status = MODE_OK;
+
+	if (dp->plat_data->mode_valid)
+		status = dp->plat_data->mode_valid(dp->plat_data, connector,
+						   mode);
+
+	return status;
+}
+
 static struct drm_encoder *
 analogix_dp_best_encoder(struct drm_connector *connector)
 {
@@ -954,6 +968,7 @@ analogix_dp_best_encoder(struct drm_connector *connector)
 static const struct drm_connector_helper_funcs analogix_dp_connector_helper_funcs = {
 	.get_modes = analogix_dp_get_modes,
 	.best_encoder = analogix_dp_best_encoder,
+	.mode_valid = analogix_dp_mode_valid,
 };
 
 enum drm_connector_status
diff --git a/include/drm/bridge/analogix_dp.h b/include/drm/bridge/analogix_dp.h
index 82b8135..9ef89de 100644
--- a/include/drm/bridge/analogix_dp.h
+++ b/include/drm/bridge/analogix_dp.h
@@ -35,6 +35,10 @@ struct analogix_dp_plat_data {
 	int (*attach)(struct analogix_dp_plat_data *, struct drm_bridge *,
 		      struct drm_connector *);
 	int (*get_modes)(struct analogix_dp_plat_data *);
+
+	enum drm_mode_status (*mode_valid)(struct analogix_dp_plat_data *,
+					   struct drm_connector *,
+					   struct drm_display_mode *);
 };
 
 int analogix_dp_resume(struct device *dev);
-- 
1.9.1

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#1407481 — Re: [PATCH v2 0/10] Add RK3399 eDP support and fix some bugs to analogix_dp driver.

Hi Javier,

On 05/24/2016 01:01 PM, Yakir Yang wrote:
> Hi all,
>
> This series have been posted about one month, still no comments, help here :(
This series works rightly on Rockchip platform, and most of them haven't 
touch the
common analogix_dp driver (except for the hotplug fixed). So i guess 
Exynos platform
should also happy with this changes.

But not sure about that. So, is it possible that you could help to check 
this on Exynos
Chromebook, if so i would be very grateful about that.

Thanks,
- Yakir
>
> RK3399 and RK3288 shared the same eDP IP controller, only some light
> difference with VOP configure and GRF configure.
>
> Also same misc fix to analogix_dp driver:
> - Hotplug invalid which report by Dan Carpenter
> - Make panel detect to an optional action
> - correct the register bit define error in ANALOGIX_DP_PLL_REG_1
>
>
> Changes in v2:
> - new patch in v2
> - rebase with drm-next, fix some conflicts
> - new patch in v2
>
> Yakir Yang (10):
>    drm/bridge: analogix_dp: rename RK3288_DP to ROCKCHIP_DP
>    drm/rockchip: analogix_dp: split the lcdc select setting into device
>      data
>    drm/bridge: analogix_dp: correct the register bit define error in
>      ANALOGIX_DP_PLL_REG_1
>    drm/bridge: analogix_dp: some rockchip chips need to flip REF_CLK bit
>      setting
>    drm/rockchip: analogix_dp: add rk3399 eDP support
>    drm/rockchip: analogix_dp: make panel detect to an optional action
>    drm/bridge: analogix_dp: introduce connector mode_valid callback to
>      plat driver
>    drm/rockchip: analogix_dp: correct the connector display color format
>      and bpc
>    drm/rockchip: analogix_dp: update the comments about why need to
>      hardcode VOP output mode
>    drm/bridge: analogix_dp: fix no drm hpd event when panel plug in
>
>   .../bindings/display/bridge/analogix_dp.txt        |   1 +
>   .../display/rockchip/analogix_dp-rockchip.txt      |   2 +-
>   drivers/gpu/drm/bridge/analogix/analogix_dp_core.c |  19 ++-
>   drivers/gpu/drm/bridge/analogix/analogix_dp_core.h |   8 +-
>   drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c  |  12 +-
>   drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h  |   5 +-
>   drivers/gpu/drm/rockchip/analogix_dp-rockchip.c    | 157 ++++++++++++++-------
>   include/drm/bridge/analogix_dp.h                   |  10 ++
>   8 files changed, 152 insertions(+), 62 deletions(-)
>

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#1407553 — Re: [PATCH v2 0/10] Add RK3399 eDP support and fix some bugs to analogix_dp driver.

Hello Yakir,

On 05/26/2016 05:34 AM, Yakir Yang wrote:
> Hi Javier,
> 
> On 05/24/2016 01:01 PM, Yakir Yang wrote:
>> Hi all,
>>
>> This series have been posted about one month, still no comments, help here :(
> This series works rightly on Rockchip platform, and most of them haven't touch the
> common analogix_dp driver (except for the hotplug fixed). So i guess Exynos platform
> should also happy with this changes.
> 
> But not sure about that. So, is it possible that you could help to check this on Exynos
> Chromebook, if so i would be very grateful about that.
>

Of course, I' ll test. Could you please provide me a branch that I can
pull directly to avoid cherry-picking all the patches from the list? 
 
> Thanks,
> - Yakir
>>

Best regards,
-- 
Javier Martinez Canillas
Open Source Group
Samsung Research America

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#1407838 — Re: [PATCH v2 0/10] Add RK3399 eDP support and fix some bugs to analogix_dp driver.

Hi Javier,

On 05/26/2016 08:48 PM, Javier Martinez Canillas wrote:
> Hello Yakir,
>
> On 05/26/2016 05:34 AM, Yakir Yang wrote:
>> Hi Javier,
>>
>> On 05/24/2016 01:01 PM, Yakir Yang wrote:
>>> Hi all,
>>>
>>> This series have been posted about one month, still no comments, help here :(
>> This series works rightly on Rockchip platform, and most of them haven't touch the
>> common analogix_dp driver (except for the hotplug fixed). So i guess Exynos platform
>> should also happy with this changes.
>>
>> But not sure about that. So, is it possible that you could help to check this on Exynos
>> Chromebook, if so i would be very grateful about that.
>>
> Of course, I' ll test. Could you please provide me a branch that I can
> pull directly to avoid cherry-picking all the patches from the list?
>   
Ah, thanks a lot, I do have a tree 
https://github.com/yakir-Yang/linux/tree/fromlist/3399-edp

- Yakir
>> Thanks,
>> - Yakir
> Best regards,

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