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Re: [PATCH 3/4] x86/mce: Clarify comments regarding deferred error

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  Re: [PATCH 3/4] x86/mce: Clarify comments regarding deferred error Borislav Petkov <bp@alien8.de> - 2016-02-23 13:20 +0100
    Re: [PATCH 3/4] x86/mce: Clarify comments regarding deferred error Aravind Gopalakrishnan <aravind.gopalakrishnan@amd.com> - 2016-02-24 00:20 +0100
      Re: [PATCH 3/4] x86/mce: Clarify comments regarding deferred error Borislav Petkov <bp@alien8.de> - 2016-02-24 12:40 +0100
        Re: [PATCH 3/4] x86/mce: Clarify comments regarding deferred error Boris Petkov <bp@alien8.de> - 2016-02-24 21:40 +0100

#1340580 — Re: [PATCH 3/4] x86/mce: Clarify comments regarding deferred error

On Tue, Feb 16, 2016 at 03:45:10PM -0600, Aravind Gopalakrishnan wrote:
> The Deferred field indicates if we have a Deferred error.
> Deferred errors indicate errors that hardware could not
> fix. But it still does not cause any interruption to program
> flow. So it does not generate any #MC and UC bit in MCx_STATUS
> is not set.
> 
> Fixing comment here. No functional change
> 
> Signed-off-by: Aravind Gopalakrishnan <Aravind.Gopalakrishnan@amd.com>
> ---
>  arch/x86/include/asm/mce.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/x86/include/asm/mce.h b/arch/x86/include/asm/mce.h
> index 2ec67ac..476da8b 100644
> --- a/arch/x86/include/asm/mce.h
> +++ b/arch/x86/include/asm/mce.h
> @@ -40,7 +40,7 @@
>  #define MCI_STATUS_AR	 (1ULL<<55)  /* Action required */
>  
>  /* AMD-specific bits */
> -#define MCI_STATUS_DEFERRED	(1ULL<<44)  /* declare an uncorrected error */
> +#define MCI_STATUS_DEFERRED	(1ULL<<44)  /* declare a deferred error */

/* uncorrected error, deferred exception */

sounds better to me.

>  #define MCI_STATUS_POISON	(1ULL<<43)  /* access poisonous data */
>  #define MCI_STATUS_TCC		(1ULL<<55)  /* Task context corrupt */
>  /*
> --

For the future, such cleanups/fixes should always go first in the patch
set.

-- 
Regards/Gruss,
    Boris.

ECO tip #101: Trim your mails when you reply.

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#1341159

On 2/23/16 6:11 AM, Borislav Petkov wrote:
> On Tue, Feb 16, 2016 at 03:45:10PM -0600, Aravind Gopalakrishnan wrote:
>>   /* AMD-specific bits */
>> -#define MCI_STATUS_DEFERRED	(1ULL<<44)  /* declare an uncorrected error */
>> +#define MCI_STATUS_DEFERRED	(1ULL<<44)  /* declare a deferred error */
> /* uncorrected error, deferred exception */
>
> sounds better to me.

Hmm. Well, Deferred error is a separate class of error by itself.
It's neither Corrected in HW nor is it Uncorrected like a MCE.

If you feel "Uncorrected error, deferred error exception" won;t be 
confusing, that's OK with me.


>
> For the future, such cleanups/fixes should always go first in the patch
> set.
>

Ok, I'll retain the order this time for V2 patchset as well.
But noted for future.

Thanks,
-Aravind.

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#1341921

On Tue, Feb 23, 2016 at 05:02:40PM -0600, Aravind Gopalakrishnan wrote:
> On 2/23/16 6:11 AM, Borislav Petkov wrote:
> >On Tue, Feb 16, 2016 at 03:45:10PM -0600, Aravind Gopalakrishnan wrote:
> >>  /* AMD-specific bits */
> >>-#define MCI_STATUS_DEFERRED	(1ULL<<44)  /* declare an uncorrected error */
> >>+#define MCI_STATUS_DEFERRED	(1ULL<<44)  /* declare a deferred error */
> >/* uncorrected error, deferred exception */
> >
> >sounds better to me.
> 
> Hmm. Well, Deferred error is a separate class of error by itself.
> It's neither Corrected in HW nor is it Uncorrected like a MCE.

Let's consult the BKDG:

"Deferred: deferred error.

Read-write; Updated-by-hardware. Cold reset:0.
1=A deferred error was created. A deferred error is the result of an
uncorrectable data error which did not immediately cause a processor
exception; the data is poisoned and an exception is deferred until
the data is loaded by a core. See 2.16.1.10 [Deferred Errors and Data
Poisoning]."

So it is an uncorrected error for which the raising of the error
exception was deferred until consumption.

> If you feel "Uncorrected error, deferred error exception" won;t be
> confusing, that's OK with me.

Why would it be confusing? It is describing exactly what a deferred
error is, albeit a bit too laconic but people can find the longer
description.

-- 
Regards/Gruss,
    Boris.

ECO tip #101: Trim your mails when you reply.

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#1342431

Aravind Gopalakrishnan <aravind.gopalakrishnan@amd.com> wrote:
>
>
>That's precisely it-
>I thought I wasn't descriptive enough. But yeah, I guess I can include
>a 
>reference to BKDG as well if anyone wants a detailed description.

No need for that. There are these things called search engines, you know...

;)


-- 
Sent from a small device: formatting sux and brevity is inevitable. 

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