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[PATCH v2 1/3] ARM: dts: Add cooling levels for CPUs on exynos5420

Started byKrzysztof Kozlowski <k.kozlowski@samsung.com>
First post2016-02-18 06:20 +0100
Last post2016-02-22 12:30 +0100
Articles 8 — 3 participants

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  [PATCH v2 1/3] ARM: dts: Add cooling levels for CPUs on exynos5420 Krzysztof Kozlowski <k.kozlowski@samsung.com> - 2016-02-18 06:20 +0100
    [PATCH v2 2/3] ARM: dts: Add cooling levels for CPUs on exynos5422/5800 Krzysztof Kozlowski <k.kozlowski@samsung.com> - 2016-02-18 06:20 +0100
      Re: [PATCH v2 2/3] ARM: dts: Add cooling levels for CPUs on  exynos5422/5800 Viresh Kumar <viresh.kumar@linaro.org> - 2016-02-18 07:30 +0100
    [PATCH v2 3/3] ARM: dts: Don't overheat the Odroid XU3-Lite on high  load Krzysztof Kozlowski <k.kozlowski@samsung.com> - 2016-02-18 06:20 +0100
      Re: [PATCH v2 3/3] ARM: dts: Don't overheat the Odroid XU3-Lite on  high load Viresh Kumar <viresh.kumar@linaro.org> - 2016-02-18 07:30 +0100
    Re: [PATCH v2 1/3] ARM: dts: Add cooling levels for CPUs on exynos5420 Punit Agrawal <punit.agrawal@arm.com> - 2016-02-18 19:00 +0100
      Re: [PATCH v2 1/3] ARM: dts: Add cooling levels for CPUs on exynos5420 Krzysztof Kozlowski <k.kozlowski@samsung.com> - 2016-02-19 05:00 +0100
        Re: [PATCH v2 1/3] ARM: dts: Add cooling levels for CPUs on exynos5420 Punit Agrawal <punit.agrawal@arm.com> - 2016-02-22 12:30 +0100

#1337035 — [PATCH v2 1/3] ARM: dts: Add cooling levels for CPUs on exynos5420

FromKrzysztof Kozlowski <k.kozlowski@samsung.com>
Date2016-02-18 06:20 +0100
Subject[PATCH v2 1/3] ARM: dts: Add cooling levels for CPUs on exynos5420
Message-ID<r3pap-EO-17@gated-at.bofh.it>
On Exynos5420 we support 8 cpufreq steps (600-1300 MHz) for LITTLE and
12 steps for big core (700-1800 MHz). Add respective cooling cells.

Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>

---

Changes since v1:
1. Add cooling properties to all CPUs (suggested by Viresh).
---
 arch/arm/boot/dts/exynos5420-cpus.dtsi | 24 ++++++++++++++++++++++++
 1 file changed, 24 insertions(+)

diff --git a/arch/arm/boot/dts/exynos5420-cpus.dtsi b/arch/arm/boot/dts/exynos5420-cpus.dtsi
index 261d25173f61..5c052d7ff554 100644
--- a/arch/arm/boot/dts/exynos5420-cpus.dtsi
+++ b/arch/arm/boot/dts/exynos5420-cpus.dtsi
@@ -33,6 +33,9 @@
 			clock-frequency = <1800000000>;
 			cci-control-port = <&cci_control1>;
 			operating-points-v2 = <&cluster_a15_opp_table>;
+			cooling-min-level = <0>;
+			cooling-max-level = <11>;
+			#cooling-cells = <2>; /* min followed by max */
 		};
 
 		cpu1: cpu@1 {
@@ -42,6 +45,9 @@
 			clock-frequency = <1800000000>;
 			cci-control-port = <&cci_control1>;
 			operating-points-v2 = <&cluster_a15_opp_table>;
+			cooling-min-level = <0>;
+			cooling-max-level = <11>;
+			#cooling-cells = <2>; /* min followed by max */
 		};
 
 		cpu2: cpu@2 {
@@ -51,6 +57,9 @@
 			clock-frequency = <1800000000>;
 			cci-control-port = <&cci_control1>;
 			operating-points-v2 = <&cluster_a15_opp_table>;
+			cooling-min-level = <0>;
+			cooling-max-level = <11>;
+			#cooling-cells = <2>; /* min followed by max */
 		};
 
 		cpu3: cpu@3 {
@@ -60,6 +69,9 @@
 			clock-frequency = <1800000000>;
 			cci-control-port = <&cci_control1>;
 			operating-points-v2 = <&cluster_a15_opp_table>;
+			cooling-min-level = <0>;
+			cooling-max-level = <11>;
+			#cooling-cells = <2>; /* min followed by max */
 		};
 
 		cpu4: cpu@100 {
@@ -70,6 +82,9 @@
 			clock-frequency = <1000000000>;
 			cci-control-port = <&cci_control0>;
 			operating-points-v2 = <&cluster_a7_opp_table>;
+			cooling-min-level = <0>;
+			cooling-max-level = <7>;
+			#cooling-cells = <2>; /* min followed by max */
 		};
 
 		cpu5: cpu@101 {
@@ -79,6 +94,9 @@
 			clock-frequency = <1000000000>;
 			cci-control-port = <&cci_control0>;
 			operating-points-v2 = <&cluster_a7_opp_table>;
+			cooling-min-level = <0>;
+			cooling-max-level = <7>;
+			#cooling-cells = <2>; /* min followed by max */
 		};
 
 		cpu6: cpu@102 {
@@ -88,6 +106,9 @@
 			clock-frequency = <1000000000>;
 			cci-control-port = <&cci_control0>;
 			operating-points-v2 = <&cluster_a7_opp_table>;
+			cooling-min-level = <0>;
+			cooling-max-level = <7>;
+			#cooling-cells = <2>; /* min followed by max */
 		};
 
 		cpu7: cpu@103 {
@@ -97,6 +118,9 @@
 			clock-frequency = <1000000000>;
 			cci-control-port = <&cci_control0>;
 			operating-points-v2 = <&cluster_a7_opp_table>;
+			cooling-min-level = <0>;
+			cooling-max-level = <7>;
+			#cooling-cells = <2>; /* min followed by max */
 		};
 	};
 };
-- 
2.5.0

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#1337036 — [PATCH v2 2/3] ARM: dts: Add cooling levels for CPUs on exynos5422/5800

FromKrzysztof Kozlowski <k.kozlowski@samsung.com>
Date2016-02-18 06:20 +0100
Subject[PATCH v2 2/3] ARM: dts: Add cooling levels for CPUs on exynos5422/5800
Message-ID<r3pap-EO-21@gated-at.bofh.it>
In reply to#1337035
On Exynos5422 and Exynos5800 we support 12 cpufreq steps (200-1300 MHz) for LITTLE
and 18 steps for big core (200-1700 MHz). Add respective cooling cells.

Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>

---

Changes since v1:
1. Add cooling properties to all CPUs (suggested by Viresh).
---
 arch/arm/boot/dts/exynos5422-cpus.dtsi | 24 ++++++++++++++++++++++++
 1 file changed, 24 insertions(+)

diff --git a/arch/arm/boot/dts/exynos5422-cpus.dtsi b/arch/arm/boot/dts/exynos5422-cpus.dtsi
index 9b46b9fbac4e..bf3c6f1ec4ee 100644
--- a/arch/arm/boot/dts/exynos5422-cpus.dtsi
+++ b/arch/arm/boot/dts/exynos5422-cpus.dtsi
@@ -32,6 +32,9 @@
 			clock-frequency = <1000000000>;
 			cci-control-port = <&cci_control0>;
 			operating-points-v2 = <&cluster_a7_opp_table>;
+			cooling-min-level = <0>;
+			cooling-max-level = <11>;
+			#cooling-cells = <2>; /* min followed by max */
 		};
 
 		cpu1: cpu@101 {
@@ -41,6 +44,9 @@
 			clock-frequency = <1000000000>;
 			cci-control-port = <&cci_control0>;
 			operating-points-v2 = <&cluster_a7_opp_table>;
+			cooling-min-level = <0>;
+			cooling-max-level = <11>;
+			#cooling-cells = <2>; /* min followed by max */
 		};
 
 		cpu2: cpu@102 {
@@ -50,6 +56,9 @@
 			clock-frequency = <1000000000>;
 			cci-control-port = <&cci_control0>;
 			operating-points-v2 = <&cluster_a7_opp_table>;
+			cooling-min-level = <0>;
+			cooling-max-level = <11>;
+			#cooling-cells = <2>; /* min followed by max */
 		};
 
 		cpu3: cpu@103 {
@@ -59,6 +68,9 @@
 			clock-frequency = <1000000000>;
 			cci-control-port = <&cci_control0>;
 			operating-points-v2 = <&cluster_a7_opp_table>;
+			cooling-min-level = <0>;
+			cooling-max-level = <11>;
+			#cooling-cells = <2>; /* min followed by max */
 		};
 
 		cpu4: cpu@0 {
@@ -69,6 +81,9 @@
 			clock-frequency = <1800000000>;
 			cci-control-port = <&cci_control1>;
 			operating-points-v2 = <&cluster_a15_opp_table>;
+			cooling-min-level = <0>;
+			cooling-max-level = <15>;
+			#cooling-cells = <2>; /* min followed by max */
 		};
 
 		cpu5: cpu@1 {
@@ -78,6 +93,9 @@
 			clock-frequency = <1800000000>;
 			cci-control-port = <&cci_control1>;
 			operating-points-v2 = <&cluster_a15_opp_table>;
+			cooling-min-level = <0>;
+			cooling-max-level = <15>;
+			#cooling-cells = <2>; /* min followed by max */
 		};
 
 		cpu6: cpu@2 {
@@ -87,6 +105,9 @@
 			clock-frequency = <1800000000>;
 			cci-control-port = <&cci_control1>;
 			operating-points-v2 = <&cluster_a15_opp_table>;
+			cooling-min-level = <0>;
+			cooling-max-level = <15>;
+			#cooling-cells = <2>; /* min followed by max */
 		};
 
 		cpu7: cpu@3 {
@@ -96,6 +117,9 @@
 			clock-frequency = <1800000000>;
 			cci-control-port = <&cci_control1>;
 			operating-points-v2 = <&cluster_a15_opp_table>;
+			cooling-min-level = <0>;
+			cooling-max-level = <15>;
+			#cooling-cells = <2>; /* min followed by max */
 		};
 	};
 };
-- 
2.5.0

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#1337077 — Re: [PATCH v2 2/3] ARM: dts: Add cooling levels for CPUs on exynos5422/5800

FromViresh Kumar <viresh.kumar@linaro.org>
Date2016-02-18 07:30 +0100
SubjectRe: [PATCH v2 2/3] ARM: dts: Add cooling levels for CPUs on exynos5422/5800
Message-ID<r3qg9-1ts-1@gated-at.bofh.it>
In reply to#1337036
On 18-02-16, 14:13, Krzysztof Kozlowski wrote:
> On Exynos5422 and Exynos5800 we support 12 cpufreq steps (200-1300 MHz) for LITTLE
> and 18 steps for big core (200-1700 MHz). Add respective cooling cells.
> 
> Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
> 
> ---
> 
> Changes since v1:
> 1. Add cooling properties to all CPUs (suggested by Viresh).
> ---
>  arch/arm/boot/dts/exynos5422-cpus.dtsi | 24 ++++++++++++++++++++++++
>  1 file changed, 24 insertions(+)

Acked-by: Viresh Kumar <viresh.kumar@linaro.org>

-- 
viresh

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#1337037 — [PATCH v2 3/3] ARM: dts: Don't overheat the Odroid XU3-Lite on high load

FromKrzysztof Kozlowski <k.kozlowski@samsung.com>
Date2016-02-18 06:20 +0100
Subject[PATCH v2 3/3] ARM: dts: Don't overheat the Odroid XU3-Lite on high load
Message-ID<r3pap-EO-19@gated-at.bofh.it>
In reply to#1337035
After adding cpufreq-dt support to Exynos542x, the Odroid XU3-Lite can
be easily overheated when launching eight CPU-intensive tasks:
	thermal thermal_zone3: critical temperature reached(121 C),shutting down

This seems to be specific to Odroid XU3-Lite board which officially
supports lower frequencies than regular XU3 or XU4. When working at
maximum CPU speed (1800 MHz big and 1300 MHz LITTLE) in warmer place for
longer time, the fan fails to cool down the board and it reaches
critical temperature.

Add CPU cooling to Exynos5422/5800 to fix this issue. When reaching last
interrupt-driven trip-point (70 degrees of Celsius) start passive
cooling in polling mode (slowing CPU by 2 steps). When reaching 85
degrees of Celsius, start slowing even more, down to 600 MHz.

Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>

---

Changes since v1:
1. Use polling mode for passive cooling (number of configurable trip
   points in TMU exceeded).

2. Adjust the values (temperature and cooling levels).
---
 arch/arm/boot/dts/exynos5422-cpu-thermal.dtsi | 46 ++++++++++++++++++++++++++-
 1 file changed, 45 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/exynos5422-cpu-thermal.dtsi b/arch/arm/boot/dts/exynos5422-cpu-thermal.dtsi
index 2b289d7c0d13..3e4c4ad96d63 100644
--- a/arch/arm/boot/dts/exynos5422-cpu-thermal.dtsi
+++ b/arch/arm/boot/dts/exynos5422-cpu-thermal.dtsi
@@ -16,7 +16,7 @@
 	thermal-zones {
 		cpu0_thermal: cpu0-thermal {
 			thermal-sensors = <&tmu_cpu0 0>;
-			polling-delay-passive = <0>;
+			polling-delay-passive = <250>;
 			polling-delay = <0>;
 			trips {
 				cpu_alert0: cpu-alert-0 {
@@ -39,6 +39,23 @@
 					hysteresis = <0>; /* millicelsius */
 					type = "critical";
 				};
+				/*
+				 * Exyunos542x support only 4 trip-points
+				 * so for these polling mode is required.
+				 * Start polling at temperature level of last
+				 * interrupt-driven trip: cpu_alert2
+				 */
+				cpu_alert3: cpu-alert-3 {
+					temperature = <70000>; /* millicelsius */
+					hysteresis = <10000>; /* millicelsius */
+					type = "passive";
+				};
+				cpu_alert4: cpu-alert-4 {
+					temperature = <85000>; /* millicelsius */
+					hysteresis = <10000>; /* millicelsius */
+					type = "passive";
+				};
+
 			};
 			cooling-maps {
 				map0 {
@@ -53,6 +70,33 @@
 				     trip = <&cpu_alert2>;
 				     cooling-device = <&fan0 2 3>;
 				};
+				/*
+				 * When reaching cpu_alert3, reduce CPU
+				 * by 2 steps. On Exynos5422/5800 that would
+				 * be: 1500 MHz and 1100 MHz.
+				 */
+				map3 {
+				     trip = <&cpu_alert3>;
+				     cooling-device = <&cpu0 0 2>;
+				};
+				map4 {
+				     trip = <&cpu_alert3>;
+				     cooling-device = <&cpu4 0 2>;
+				};
+
+				/*
+				 * When reaching cpu_alert4, reduce CPU
+				 * further, down to 600 MHz (11 steps for big,
+				 * 7 steps for LITTLE).
+				 */
+				map5 {
+				     trip = <&cpu_alert4>;
+				     cooling-device = <&cpu0 3 7>;
+				};
+				map6 {
+				     trip = <&cpu_alert4>;
+				     cooling-device = <&cpu4 3 11>;
+				};
 			};
 		};
 	};
-- 
2.5.0

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#1337078 — Re: [PATCH v2 3/3] ARM: dts: Don't overheat the Odroid XU3-Lite on high load

FromViresh Kumar <viresh.kumar@linaro.org>
Date2016-02-18 07:30 +0100
SubjectRe: [PATCH v2 3/3] ARM: dts: Don't overheat the Odroid XU3-Lite on high load
Message-ID<r3qg9-1ts-3@gated-at.bofh.it>
In reply to#1337037
On 18-02-16, 14:13, Krzysztof Kozlowski wrote:
> After adding cpufreq-dt support to Exynos542x, the Odroid XU3-Lite can
> be easily overheated when launching eight CPU-intensive tasks:
> 	thermal thermal_zone3: critical temperature reached(121 C),shutting down
> 
> This seems to be specific to Odroid XU3-Lite board which officially
> supports lower frequencies than regular XU3 or XU4. When working at
> maximum CPU speed (1800 MHz big and 1300 MHz LITTLE) in warmer place for
> longer time, the fan fails to cool down the board and it reaches
> critical temperature.
> 
> Add CPU cooling to Exynos5422/5800 to fix this issue. When reaching last
> interrupt-driven trip-point (70 degrees of Celsius) start passive
> cooling in polling mode (slowing CPU by 2 steps). When reaching 85
> degrees of Celsius, start slowing even more, down to 600 MHz.
> 
> Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
> 
> ---
> 
> Changes since v1:
> 1. Use polling mode for passive cooling (number of configurable trip
>    points in TMU exceeded).
> 
> 2. Adjust the values (temperature and cooling levels).
> ---
>  arch/arm/boot/dts/exynos5422-cpu-thermal.dtsi | 46 ++++++++++++++++++++++++++-
>  1 file changed, 45 insertions(+), 1 deletion(-)

Acked-by: Viresh Kumar <viresh.kumar@linaro.org>

-- 
viresh

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#1337592

FromPunit Agrawal <punit.agrawal@arm.com>
Date2016-02-18 19:00 +0100
Message-ID<r3B1V-Ga-15@gated-at.bofh.it>
In reply to#1337035
Hi Krzysztof,

Krzysztof Kozlowski <k.kozlowski@samsung.com> writes:

> On Exynos5420 we support 8 cpufreq steps (600-1300 MHz) for LITTLE and
> 12 steps for big core (700-1800 MHz). Add respective cooling cells.
>
> Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
>
> ---
>
> Changes since v1:
> 1. Add cooling properties to all CPUs (suggested by Viresh).
> ---
>  arch/arm/boot/dts/exynos5420-cpus.dtsi | 24 ++++++++++++++++++++++++
>  1 file changed, 24 insertions(+)
>
> diff --git a/arch/arm/boot/dts/exynos5420-cpus.dtsi b/arch/arm/boot/dts/exynos5420-cpus.dtsi
> index 261d25173f61..5c052d7ff554 100644
> --- a/arch/arm/boot/dts/exynos5420-cpus.dtsi
> +++ b/arch/arm/boot/dts/exynos5420-cpus.dtsi
> @@ -33,6 +33,9 @@
>  			clock-frequency = <1800000000>;
>  			cci-control-port = <&cci_control1>;
>  			operating-points-v2 = <&cluster_a15_opp_table>;
> +			cooling-min-level = <0>;
> +			cooling-max-level = <11>;

Although the above two properties are defined they aren't parsed in the
kernel.

Setting min / max extents for cooling devices via cooling maps does work
though.


[...]

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#1337869

FromKrzysztof Kozlowski <k.kozlowski@samsung.com>
Date2016-02-19 05:00 +0100
Message-ID<r3Koy-7qA-3@gated-at.bofh.it>
In reply to#1337592
On 19.02.2016 02:58, Punit Agrawal wrote:
> Hi Krzysztof,
> 
> Krzysztof Kozlowski <k.kozlowski@samsung.com> writes:
> 
>> On Exynos5420 we support 8 cpufreq steps (600-1300 MHz) for LITTLE and
>> 12 steps for big core (700-1800 MHz). Add respective cooling cells.
>>
>> Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
>>
>> ---
>>
>> Changes since v1:
>> 1. Add cooling properties to all CPUs (suggested by Viresh).
>> ---
>>  arch/arm/boot/dts/exynos5420-cpus.dtsi | 24 ++++++++++++++++++++++++
>>  1 file changed, 24 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/exynos5420-cpus.dtsi b/arch/arm/boot/dts/exynos5420-cpus.dtsi
>> index 261d25173f61..5c052d7ff554 100644
>> --- a/arch/arm/boot/dts/exynos5420-cpus.dtsi
>> +++ b/arch/arm/boot/dts/exynos5420-cpus.dtsi
>> @@ -33,6 +33,9 @@
>>  			clock-frequency = <1800000000>;
>>  			cci-control-port = <&cci_control1>;
>>  			operating-points-v2 = <&cluster_a15_opp_table>;
>> +			cooling-min-level = <0>;
>> +			cooling-max-level = <11>;
> 
> Although the above two properties are defined they aren't parsed in the
> kernel.
> 
> Setting min / max extents for cooling devices via cooling maps does work
> though.

It is described as optional property in
Documentation/devicetree/bindings/thermal/thermal.txt ... but indeed it
is totally ignored.

So what is the recommendation? Get rid of it from DTS and documentation
or leave it because it will be implemented someday?

Thanks for feedback!

Best regards,
Krzysztof

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#1339392

FromPunit Agrawal <punit.agrawal@arm.com>
Date2016-02-22 12:30 +0100
Message-ID<r4WQG-51k-9@gated-at.bofh.it>
In reply to#1337869
Krzysztof Kozlowski <k.kozlowski@samsung.com> writes:

> On 19.02.2016 02:58, Punit Agrawal wrote:
>> Hi Krzysztof,
>> 
>> Krzysztof Kozlowski <k.kozlowski@samsung.com> writes:
>> 
>>> On Exynos5420 we support 8 cpufreq steps (600-1300 MHz) for LITTLE and
>>> 12 steps for big core (700-1800 MHz). Add respective cooling cells.
>>>
>>> Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
>>>
>>> ---
>>>
>>> Changes since v1:
>>> 1. Add cooling properties to all CPUs (suggested by Viresh).
>>> ---
>>>  arch/arm/boot/dts/exynos5420-cpus.dtsi | 24 ++++++++++++++++++++++++
>>>  1 file changed, 24 insertions(+)
>>>
>>> diff --git a/arch/arm/boot/dts/exynos5420-cpus.dtsi b/arch/arm/boot/dts/exynos5420-cpus.dtsi
>>> index 261d25173f61..5c052d7ff554 100644
>>> --- a/arch/arm/boot/dts/exynos5420-cpus.dtsi
>>> +++ b/arch/arm/boot/dts/exynos5420-cpus.dtsi
>>> @@ -33,6 +33,9 @@
>>>  			clock-frequency = <1800000000>;
>>>  			cci-control-port = <&cci_control1>;
>>>  			operating-points-v2 = <&cluster_a15_opp_table>;
>>> +			cooling-min-level = <0>;
>>> +			cooling-max-level = <11>;
>> 
>> Although the above two properties are defined they aren't parsed in the
>> kernel.
>> 
>> Setting min / max extents for cooling devices via cooling maps does work
>> though.
>
> It is described as optional property in
> Documentation/devicetree/bindings/thermal/thermal.txt ... but indeed it
> is totally ignored.
>
> So what is the recommendation? Get rid of it from DTS and documentation
> or leave it because it will be implemented someday?

As long as you are not expecting any particular behaviour arising from
that property today I think it should be fine to leave it in.

Eduardo, do you agree?

>
> Thanks for feedback!
>
> Best regards,
> Krzysztof
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

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