Groups | Search | Server Info | Keyboard shortcuts | Login | Register [http] [https] [nntp] [nntps]
Groups > linux.kernel > #1336085 > unrolled thread
| Started by | Krzysztof Kozlowski <k.kozlowski@samsung.com> |
|---|---|
| First post | 2016-02-17 08:00 +0100 |
| Last post | 2016-02-17 08:10 +0100 |
| Articles | 3 — 2 participants |
Back to article view | Back to linux.kernel
This discussion starts older than the indexed window; earlier articles aren't shown. The article labeled Started by
below is the oldest one visible, not the original post.
[RFC 1/3] ARM: dts: Add cooling levels for CPUs on exynos5420 Krzysztof Kozlowski <k.kozlowski@samsung.com> - 2016-02-17 08:00 +0100
Re: [RFC 1/3] ARM: dts: Add cooling levels for CPUs on exynos5420 Krzysztof Kozlowski <k.kozlowski@samsung.com> - 2016-02-17 08:10 +0100
Re: [RFC 1/3] ARM: dts: Add cooling levels for CPUs on exynos5420 Viresh Kumar <viresh.kumar@linaro.org> - 2016-02-17 08:10 +0100
| From | Krzysztof Kozlowski <k.kozlowski@samsung.com> |
|---|---|
| Date | 2016-02-17 08:00 +0100 |
| Subject | [RFC 1/3] ARM: dts: Add cooling levels for CPUs on exynos5420 |
| Message-ID | <r34fD-2FN-5@gated-at.bofh.it> |
On Exynos5420 we support 8 cpufreq steps (600-1300 MHz) for LITTLE and
12 steps for big core (700-1800 MHz). Add respective cooling cells.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
---
arch/arm/boot/dts/exynos5420-cpus.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/exynos5420-cpus.dtsi b/arch/arm/boot/dts/exynos5420-cpus.dtsi
index 261d25173f61..498ae82e1cb2 100644
--- a/arch/arm/boot/dts/exynos5420-cpus.dtsi
+++ b/arch/arm/boot/dts/exynos5420-cpus.dtsi
@@ -33,6 +33,9 @@
clock-frequency = <1800000000>;
cci-control-port = <&cci_control1>;
operating-points-v2 = <&cluster_a15_opp_table>;
+ cooling-min-level = <0>;
+ cooling-max-level = <11>;
+ #cooling-cells = <2>; /* min followed by max */
};
cpu1: cpu@1 {
@@ -70,6 +73,9 @@
clock-frequency = <1000000000>;
cci-control-port = <&cci_control0>;
operating-points-v2 = <&cluster_a7_opp_table>;
+ cooling-min-level = <0>;
+ cooling-max-level = <7>;
+ #cooling-cells = <2>; /* min followed by max */
};
cpu5: cpu@101 {
--
2.5.0
[toc] | [next] | [standalone]
| From | Krzysztof Kozlowski <k.kozlowski@samsung.com> |
|---|---|
| Date | 2016-02-17 08:10 +0100 |
| Message-ID | <r34pk-2YG-11@gated-at.bofh.it> |
| In reply to | #1336085 |
On 17.02.2016 16:01, Viresh Kumar wrote:
> On 17-02-16, 15:55, Krzysztof Kozlowski wrote:
>> On Exynos5420 we support 8 cpufreq steps (600-1300 MHz) for LITTLE and
>> 12 steps for big core (700-1800 MHz). Add respective cooling cells.
>>
>> Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
>> ---
>> arch/arm/boot/dts/exynos5420-cpus.dtsi | 6 ++++++
>> 1 file changed, 6 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/exynos5420-cpus.dtsi b/arch/arm/boot/dts/exynos5420-cpus.dtsi
>> index 261d25173f61..498ae82e1cb2 100644
>> --- a/arch/arm/boot/dts/exynos5420-cpus.dtsi
>> +++ b/arch/arm/boot/dts/exynos5420-cpus.dtsi
>> @@ -33,6 +33,9 @@
>> clock-frequency = <1800000000>;
>> cci-control-port = <&cci_control1>;
>> operating-points-v2 = <&cluster_a15_opp_table>;
>> + cooling-min-level = <0>;
>> + cooling-max-level = <11>;
>> + #cooling-cells = <2>; /* min followed by max */
>> };
>>
>> cpu1: cpu@1 {
>> @@ -70,6 +73,9 @@
>> clock-frequency = <1000000000>;
>> cci-control-port = <&cci_control0>;
>> operating-points-v2 = <&cluster_a7_opp_table>;
>> + cooling-min-level = <0>;
>> + cooling-max-level = <7>;
>> + #cooling-cells = <2>; /* min followed by max */
>> };
>
> Though it wouldn't matter (for the issue you are getting), but this should be
> added for all the CPUs in case some other CPU is booted first.
Thanks! I'll fix it also for patch 2/3.
Best regards,
Krzysztof
[toc] | [prev] | [next] | [standalone]
| From | Viresh Kumar <viresh.kumar@linaro.org> |
|---|---|
| Date | 2016-02-17 08:10 +0100 |
| Message-ID | <r34pk-2YG-13@gated-at.bofh.it> |
| In reply to | #1336085 |
On 17-02-16, 15:55, Krzysztof Kozlowski wrote:
> On Exynos5420 we support 8 cpufreq steps (600-1300 MHz) for LITTLE and
> 12 steps for big core (700-1800 MHz). Add respective cooling cells.
>
> Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
> ---
> arch/arm/boot/dts/exynos5420-cpus.dtsi | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/arch/arm/boot/dts/exynos5420-cpus.dtsi b/arch/arm/boot/dts/exynos5420-cpus.dtsi
> index 261d25173f61..498ae82e1cb2 100644
> --- a/arch/arm/boot/dts/exynos5420-cpus.dtsi
> +++ b/arch/arm/boot/dts/exynos5420-cpus.dtsi
> @@ -33,6 +33,9 @@
> clock-frequency = <1800000000>;
> cci-control-port = <&cci_control1>;
> operating-points-v2 = <&cluster_a15_opp_table>;
> + cooling-min-level = <0>;
> + cooling-max-level = <11>;
> + #cooling-cells = <2>; /* min followed by max */
> };
>
> cpu1: cpu@1 {
> @@ -70,6 +73,9 @@
> clock-frequency = <1000000000>;
> cci-control-port = <&cci_control0>;
> operating-points-v2 = <&cluster_a7_opp_table>;
> + cooling-min-level = <0>;
> + cooling-max-level = <7>;
> + #cooling-cells = <2>; /* min followed by max */
> };
Though it wouldn't matter (for the issue you are getting), but this should be
added for all the CPUs in case some other CPU is booted first.
--
viresh
[toc] | [prev] | [standalone]
Back to top | Article view | linux.kernel
csiph-web