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[PATCH v3 00/10] Support for Cortex-M Prototyping System

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  [PATCH v3 00/10] Support for Cortex-M Prototyping System Vladimir Murzin <vladimir.murzin@arm.com> - 2016-02-16 11:20 +0100
    [PATCH v3 09/10] ARM: dts: introduce MPS2 AN385/AN386 Vladimir Murzin <vladimir.murzin@arm.com> - 2016-02-16 11:20 +0100
      Re: [PATCH v3 09/10] ARM: dts: introduce MPS2 AN385/AN386 Arnd Bergmann <arnd@arndb.de> - 2016-02-16 12:10 +0100
        Re: [PATCH v3 09/10] ARM: dts: introduce MPS2 AN385/AN386 Vladimir Murzin <vladimir.murzin@arm.com> - 2016-02-16 17:20 +0100
          Re: [PATCH v3 09/10] ARM: dts: introduce MPS2 AN385/AN386 Vladimir Murzin <vladimir.murzin@arm.com> - 2016-02-17 17:50 +0100
            Re: [PATCH v3 09/10] ARM: dts: introduce MPS2 AN385/AN386 Arnd Bergmann <arnd@arndb.de> - 2016-02-17 18:00 +0100
              Re: [PATCH v3 09/10] ARM: dts: introduce MPS2 AN385/AN386 Vladimir Murzin <vladimir.murzin@arm.com> - 2016-02-18 11:20 +0100
                Re: [PATCH v3 09/10] ARM: dts: introduce MPS2 AN385/AN386 Arnd Bergmann <arnd@arndb.de> - 2016-02-18 11:50 +0100
                  Re: [PATCH v3 09/10] ARM: dts: introduce MPS2 AN385/AN386 Vladimir Murzin <vladimir.murzin@arm.com> - 2016-02-18 12:20 +0100
                    Re: [PATCH v3 09/10] ARM: dts: introduce MPS2 AN385/AN386 Arnd Bergmann <arnd@arndb.de> - 2016-02-18 13:20 +0100
                      Re: [PATCH v3 09/10] ARM: dts: introduce MPS2 AN385/AN386 Vladimir Murzin <vladimir.murzin@arm.com> - 2016-02-18 13:50 +0100
      Re: [PATCH v3 09/10] ARM: dts: introduce MPS2 AN385/AN386 Linus Walleij <linus.walleij@linaro.org> - 2016-02-16 16:20 +0100
        Re: [PATCH v3 09/10] ARM: dts: introduce MPS2 AN385/AN386 Vladimir Murzin <vladimir.murzin@arm.com> - 2016-02-16 16:40 +0100
    [PATCH v3 05/10] serial: mps2-uart: add support for early console Vladimir Murzin <vladimir.murzin@arm.com> - 2016-02-16 11:20 +0100
      Re: [PATCH v3 05/10] serial: mps2-uart: add support for early console Andy Shevchenko <andy.shevchenko@gmail.com> - 2016-02-16 11:40 +0100
        Re: [PATCH v3 05/10] serial: mps2-uart: add support for early console Vladimir Murzin <vladimir.murzin@arm.com> - 2016-02-16 14:20 +0100
          Re: [PATCH v3 05/10] serial: mps2-uart: add support for early console Andy Shevchenko <andy.shevchenko@gmail.com> - 2016-02-16 14:20 +0100
            Re: [PATCH v3 05/10] serial: mps2-uart: add support for early console Vladimir Murzin <vladimir.murzin@arm.com> - 2016-02-16 14:40 +0100
              Re: [PATCH v3 05/10] serial: mps2-uart: add support for early console Andy Shevchenko <andy.shevchenko@gmail.com> - 2016-02-16 15:10 +0100
                Re: [PATCH v3 05/10] serial: mps2-uart: add support for early  console One Thousand Gnomes <gnomes@lxorguk.ukuu.org.uk> - 2016-02-16 17:20 +0100
          Re: [PATCH v3 05/10] serial: mps2-uart: add support for early console Vladimir Murzin <vladimir.murzin@arm.com> - 2016-02-19 10:50 +0100
            Re: [PATCH v3 05/10] serial: mps2-uart: add support for early console Andy Shevchenko <andy.shevchenko@gmail.com> - 2016-02-19 11:00 +0100
              Re: [PATCH v3 05/10] serial: mps2-uart: add support for early console Peter Hurley <peter@hurleysoftware.com> - 2016-02-19 16:50 +0100
                Re: [PATCH v3 05/10] serial: mps2-uart: add support for early console Vladimir Murzin <vladimir.murzin@arm.com> - 2016-02-19 17:30 +0100
    [PATCH v3 01/10] dt-bindings: document the MPS2 timer bindings Vladimir Murzin <vladimir.murzin@arm.com> - 2016-02-16 11:20 +0100
    [PATCH v3 02/10] clockevents/drivers: add MPS2 Timer driver Vladimir Murzin <vladimir.murzin@arm.com> - 2016-02-16 11:20 +0100
    Re: [PATCH v3 00/10] Support for Cortex-M Prototyping System Arnd Bergmann <arnd@arndb.de> - 2016-02-16 12:10 +0100
      Re: [PATCH v3 00/10] Support for Cortex-M Prototyping System Vladimir Murzin <vladimir.murzin@arm.com> - 2016-02-16 17:20 +0100

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#1335244 — [PATCH v3 00/10] Support for Cortex-M Prototyping System

Hi,

This patch series provide the basic support for running ucLinux on V2M-MPS2
platform.

With these patches applied ucLinux can be run on both HW and FVP models
with Cortex-M3/M4/M7 configurations.

Board description:

http://infocenter.arm.com/help/topic/com.arm.doc.100112_0100_03_en/arm_versatile_express_cortex_m_prototyping_system_(v2m_mps2)_technical_reference_manual_100112_0100_03_en.pdf

Application notes (cover Cortex-M3/M4/M7):

http://infocenter.arm.com/help/topic/com.arm.doc.dai0385a/DAI0385A_cortex_m3_on_v2m_mps2.pdf
http://infocenter.arm.com/help/topic/com.arm.doc.dai0386a/DAI0386A_cortex_m4_on_v2m_mps2.pdf
http://infocenter.arm.com/help/topic/com.arm.doc.dai0399a/DAI0399A_cortex_m7_on_v2m_mps2.pdf
http://infocenter.arm.com/help/topic/com.arm.doc.dai0400a/DAI0400A_cortex_m7_on_v2m_mps2.pdf

Cortex-M System Design Kit (referenced as CMDK from documents above):

http://infocenter.arm.com/help/topic/com.arm.doc.ddi0479c/DDI0479C_cortex_m_system_design_kit_r1p0_trm.pdf

I'd be happy to hear any feedback/comments on this series!

Changelog:
  v2  -> v3:
      - rebased on 4.5-rc4
      - fixes for mps2-timer per Thomas
      - swicthed back to ttyMPS naming per Greg

  v1  -> v2:
      - rebased on 4.5-rc2
      - fixes for mps2-timer per Daniel and Rob (added Ack from Daniel)
      - fixes for mps2-uart per Greg and Andy

  RFC -> v1:
      - dropped RFC tag
      - rebased on 4.4-rc3
      - added Acks from Rob
      - updated mps2-timer per Daniel
      - fixed build failures reported by 0-DAY kernel test infrastructure

Thanks!

Vladimir Murzin (10):
  dt-bindings: document the MPS2 timer bindings
  clockevents/drivers: add MPS2 Timer driver
  dt-bindings: document the MPS2 UART bindings
  serial: mps2-uart: add MPS2 UART driver
  serial: mps2-uart: add support for early console
  ARM: mps2: introduce MPS2 platform
  ARM: mps2: add low-level debug support
  ARM: configs: add MPS2 defconfig
  ARM: dts: introduce MPS2 AN385/AN386
  ARM: dts: introduce MPS2 AN399/AN400

 .../devicetree/bindings/serial/arm,mps2-uart.txt   |   22 +
 .../devicetree/bindings/timer/arm,mps2-timer.txt   |   28 +
 arch/arm/Kconfig                                   |    8 +
 arch/arm/Kconfig.debug                             |   12 +-
 arch/arm/Makefile                                  |    1 +
 arch/arm/boot/dts/Makefile                         |    3 +
 arch/arm/boot/dts/mps2-an385.dts                   |   90 +++
 arch/arm/boot/dts/mps2-an399.dts                   |   92 +++
 arch/arm/boot/dts/mps2.dtsi                        |  227 ++++++++
 arch/arm/configs/mps2_defconfig                    |  112 ++++
 arch/arm/include/debug/mps2.S                      |   27 +
 arch/arm/mach-mps2/Makefile                        |    1 +
 arch/arm/mach-mps2/Makefile.boot                   |    3 +
 arch/arm/mach-mps2/dtmachine.c                     |   21 +
 drivers/clocksource/Kconfig                        |    6 +
 drivers/clocksource/Makefile                       |    1 +
 drivers/clocksource/mps2-timer.c                   |  275 +++++++++
 drivers/tty/serial/Kconfig                         |   13 +
 drivers/tty/serial/Makefile                        |    1 +
 drivers/tty/serial/mps2-uart.c                     |  614 ++++++++++++++++++++
 include/uapi/linux/serial_core.h                   |    3 +
 21 files changed, 1559 insertions(+), 1 deletion(-)
 create mode 100644 Documentation/devicetree/bindings/serial/arm,mps2-uart.txt
 create mode 100644 Documentation/devicetree/bindings/timer/arm,mps2-timer.txt
 create mode 100644 arch/arm/boot/dts/mps2-an385.dts
 create mode 100644 arch/arm/boot/dts/mps2-an399.dts
 create mode 100644 arch/arm/boot/dts/mps2.dtsi
 create mode 100644 arch/arm/configs/mps2_defconfig
 create mode 100644 arch/arm/include/debug/mps2.S
 create mode 100644 arch/arm/mach-mps2/Makefile
 create mode 100644 arch/arm/mach-mps2/Makefile.boot
 create mode 100644 arch/arm/mach-mps2/dtmachine.c
 create mode 100644 drivers/clocksource/mps2-timer.c
 create mode 100644 drivers/tty/serial/mps2-uart.c

-- 
1.7.9.5

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#1335245 — [PATCH v3 09/10] ARM: dts: introduce MPS2 AN385/AN386

Application Notes 385 and 386 shares the same memory map and features
except the CPU is used. AN385 is supplied with Cortex-M3 CPU and AN386
is supplied with Cortex-M4.

Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
---
 arch/arm/boot/dts/Makefile       |    1 +
 arch/arm/boot/dts/mps2-an385.dts |   90 +++++++++++++++
 arch/arm/boot/dts/mps2.dtsi      |  227 ++++++++++++++++++++++++++++++++++++++
 3 files changed, 318 insertions(+)
 create mode 100644 arch/arm/boot/dts/mps2-an385.dts
 create mode 100644 arch/arm/boot/dts/mps2.dtsi

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index a4a6d70..96418d2 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -245,6 +245,7 @@ dtb-$(CONFIG_ARCH_MMP) += \
 dtb-$(CONFIG_MACH_MESON8B) += \
 	meson8b-mxq.dtb \
 	meson8b-odroidc1.dtb
+dtb-$(CONFIG_ARCH_MPS2) += mps2-an385.dtb
 dtb-$(CONFIG_ARCH_MOXART) += \
 	moxart-uc7112lx.dtb
 dtb-$(CONFIG_SOC_IMX1) += \
diff --git a/arch/arm/boot/dts/mps2-an385.dts b/arch/arm/boot/dts/mps2-an385.dts
new file mode 100644
index 0000000..ddb03d3
--- /dev/null
+++ b/arch/arm/boot/dts/mps2-an385.dts
@@ -0,0 +1,90 @@
+/*
+ * Copyright (C) 2015 ARM Limited
+ *
+ * Author: Vladimir Murzin <vladimir.murzin@arm.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This file is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+
+#include "mps2.dtsi"
+
+/ {
+	model = "ARM MPS2 Application Note 385/386";
+	compatible = "arm,mps2";
+
+	aliases {
+		serial0 = &uart0;
+	};
+
+	chosen {
+		bootargs = "init=/sbin/init earlycon";
+		stdout-path = "serial0:9600n8";
+	};
+
+	memory {
+		device_type = "memory";
+		reg = <0x21000000 0x1000000>;
+	};
+
+	ethernet@40200000 {
+		compatible = "smsc,lan9220", "smsc,lan9115";
+		reg = <0x40200000 0x10000>;
+		interrupts = <13>;
+		interrupt-parent = <&nvic>;
+		smsc,irq-active-high;
+	};
+};
+
+&uart0 {
+	status = "okay";
+};
+
+&timer0 {
+	status = "okay";
+};
+
+&timer1 {
+	status = "okay";
+};
+
+&wdt {
+	status = "okay";
+};
diff --git a/arch/arm/boot/dts/mps2.dtsi b/arch/arm/boot/dts/mps2.dtsi
new file mode 100644
index 0000000..5d2c539
--- /dev/null
+++ b/arch/arm/boot/dts/mps2.dtsi
@@ -0,0 +1,227 @@
+/*
+ * Copyright (C) 2015 ARM Limited
+ *
+ * Author: Vladimir Murzin <vladimir.murzin@arm.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This file is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include "armv7-m.dtsi"
+
+/ {
+	oscclk0: clk-osc0 {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <50000000>;
+	};
+
+	oscclk1: clk-osc1 {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <24576000>;
+	};
+
+	oscclk2: clk-osc2 {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <25000000>;
+	};
+
+	cfgclk: clk-cfg {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <5000000>;
+	};
+
+	spicfgclk: clk-spicfg {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <75000000>;
+	};
+
+	sysclk: clk-sys {
+		compatible = "fixed-factor-clock";
+		clocks = <&oscclk0>;
+		#clock-cells = <0>;
+		clock-div = <2>;
+		clock-mult = <1>;
+	};
+
+	audmclk: clk-audm {
+		compatible = "fixed-factor-clock";
+		clocks = <&oscclk1>;
+		#clock-cells = <0>;
+		clock-div = <2>;
+		clock-mult = <1>;
+	};
+
+	audsclk: clk-auds {
+		compatible = "fixed-factor-clock";
+		clocks = <&oscclk1>;
+		#clock-cells = <0>;
+		clock-div = <8>;
+		clock-mult = <1>;
+	};
+
+	spiclcd: clk-cpiclcd {
+		compatible = "fixed-factor-clock";
+		clocks = <&oscclk0>;
+		#clock-cells = <0>;
+		clock-div = <2>;
+		clock-mult = <1>;
+	};
+
+	spicon: clk-spicon {
+		compatible = "fixed-factor-clock";
+		clocks = <&oscclk0>;
+		#clock-cells = <0>;
+		clock-div = <2>;
+		clock-mult = <1>;
+	};
+
+	i2cclcd: clk-i2cclcd {
+		compatible = "fixed-factor-clock";
+		clocks = <&oscclk0>;
+		#clock-cells = <0>;
+		clock-div = <2>;
+		clock-mult = <1>;
+	};
+
+	i2caud: clk-i2caud {
+		compatible = "fixed-factor-clock";
+		clocks = <&oscclk0>;
+		#clock-cells = <0>;
+		clock-div = <2>;
+		clock-mult = <1>;
+	};
+
+	soc {
+		compatible = "simple-bus";
+		ranges;
+
+		apb {
+			compatible = "simple-bus";
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ranges = <0 0x40000000 0x10000>;
+
+			timer0: mps2-timer0@0 {
+				compatible = "arm,mps2-timer";
+				reg = <0x0 0x1000>;
+				interrupts = <8>;
+				clocks = <&sysclk>;
+				status = "disabled";
+			};
+
+			timer1: mps2-timer1@1000 {
+				compatible = "arm,mps2-timer";
+				reg = <0x1000 0x1000>;
+				interrupts = <9>;
+				clocks = <&sysclk>;
+				status = "disabled";
+			};
+
+			timer2: dual-timer@2000 {
+				compatible = "arm,sp804";
+				reg = <0x2000 0x1000>;
+				clocks = <&sysclk>;
+				interrupts = <10>;
+				status = "disabled";
+			};
+
+
+			uart0: serial@4000 {
+				compatible = "arm,mps2-uart";
+				reg = <0x4000 0x1000>;
+				interrupts = <0 1 12>;
+				clocks = <&sysclk>;
+				status = "disabled";
+			};
+
+			uart1: serial@5000 {
+				compatible = "arm,mps2-uart";
+				reg = <0x5000 0x1000>;
+				interrupts = <2 3 12>;
+				clocks = <&sysclk>;
+				status = "disabled";
+			};
+
+			uart2: serial@6000 {
+				compatible = "arm,mps2-uart";
+				reg = <0x6000 0x1000>;
+				interrupts = <4 5 12>;
+				clocks = <&sysclk>;
+				status = "disabled";
+			};
+
+			wdt: watchdog@8000 {
+				compatible = "arm,sp805", "arm,primecell";
+				arm,primecell-periphid = <0x00141805>;
+				reg = <0x8000 0x1000>;
+				interrupts = <0>;
+				clocks = <&sysclk>;
+				clock-names = "apb_pclk";
+				status = "disabled";
+			};
+		};
+
+		fpgaio {
+			compatible = "syscon", "simple-mfd";
+			reg = <0x40028000 0x10>;
+
+			led@0 {
+				compatible = "register-bit-led";
+				offset = <0x0>;
+				mask = <0x01>;
+				label = "userled:0";
+				linux,default-trigger = "heartbeat";
+				default-state = "on";
+			};
+
+			led@1 {
+				compatible = "register-bit-led";
+				offset = <0x0>;
+				mask = <0x02>;
+				label = "userled:1";
+				linux,default-trigger = "usr";
+				default-state = "off";
+			};
+		};
+	};
+};
-- 
1.7.9.5

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#1335284 — Re: [PATCH v3 09/10] ARM: dts: introduce MPS2 AN385/AN386

On Tuesday 16 February 2016 10:08:14 Vladimir Murzin wrote:
> +
> +       ethernet@40200000 {
> +               compatible = "smsc,lan9220", "smsc,lan9115";
> +               reg = <0x40200000 0x10000>;
> +               interrupts = <13>;
> +               interrupt-parent = <&nvic>;
> +               smsc,irq-active-high;
> +       };
> +};
> +
> 

This node seems slightly misplaced. Is there some external bus interface
that this is connected to? The address suggests that it should be somewhere
below the /soc node, and you probably want to list the external bus
interface with a "ranges" property that identifies the addresses visibile
there, and put the external chip under there.

	Arnd

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#1335600 — Re: [PATCH v3 09/10] ARM: dts: introduce MPS2 AN385/AN386

On 16/02/16 11:01, Arnd Bergmann wrote:
> On Tuesday 16 February 2016 10:08:14 Vladimir Murzin wrote:
>> +
>> +       ethernet@40200000 {
>> +               compatible = "smsc,lan9220", "smsc,lan9115";
>> +               reg = <0x40200000 0x10000>;
>> +               interrupts = <13>;
>> +               interrupt-parent = <&nvic>;
>> +               smsc,irq-active-high;
>> +       };
>> +};
>> +
>>
> 
> This node seems slightly misplaced. Is there some external bus interface
> that this is connected to? The address suggests that it should be somewhere
> below the /soc node, and you probably want to list the external bus
> interface with a "ranges" property that identifies the addresses visibile
> there, and put the external chip under there.
> 

I might messed it up since the MAC/PHY connects to the same 16-bit
interface as the 16MB PSRAM external memory and both connected via AHB.

Not sure how it should be expressed, so some help form DT camp would be
appreciated.

Cheers
Vladimir

> 	Arnd
> 
> 
> 

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#1336575 — Re: [PATCH v3 09/10] ARM: dts: introduce MPS2 AN385/AN386

On 16/02/16 16:10, Vladimir Murzin wrote:
> On 16/02/16 11:01, Arnd Bergmann wrote:
>> On Tuesday 16 February 2016 10:08:14 Vladimir Murzin wrote:
>>> +
>>> +       ethernet@40200000 {
>>> +               compatible = "smsc,lan9220", "smsc,lan9115";
>>> +               reg = <0x40200000 0x10000>;
>>> +               interrupts = <13>;
>>> +               interrupt-parent = <&nvic>;
>>> +               smsc,irq-active-high;
>>> +       };
>>> +};
>>> +
>>>
>>
>> This node seems slightly misplaced. Is there some external bus interface
>> that this is connected to? The address suggests that it should be somewhere
>> below the /soc node, and you probably want to list the external bus
>> interface with a "ranges" property that identifies the addresses visibile
>> there, and put the external chip under there.
>>
> 
> I might messed it up since the MAC/PHY connects to the same 16-bit
> interface as the 16MB PSRAM external memory and both connected via AHB.
> 
> Not sure how it should be expressed, so some help form DT camp would be
> appreciated.

Arnd,

Does following fixup address your point on where/how ethernet node
should be placed?

diff --git a/arch/arm/boot/dts/mps2-an385.dts b/arch/arm/boot/dts/an385.dts
index 976f86d..50c8d24 100644
--- a/arch/arm/boot/dts/mps2-an385.dts
+++ b/arch/arm/boot/dts/mps2-an385.dts
@@ -63,14 +63,10 @@
 		device_type = "memory";
 		reg = <0x21000000 0x1000000>;
 	};
+};

-	ethernet@40200000 {
-		compatible = "smsc,lan9220", "smsc,lan9115";
-		reg = <0x40200000 0x10000>;
-		interrupts = <13>;
-		interrupt-parent = <&nvic>;
-		smsc,irq-active-high;
-	};
+&mb {
+	ranges = <0 0x40200000 0x10000>;
 };

 &uart0 {
diff --git a/arch/arm/boot/dts/mps2.dtsi b/arch/arm/boot/dts/mps2.dtsi
index 5d2c539..1673472 100644
--- a/arch/arm/boot/dts/mps2.dtsi
+++ b/arch/arm/boot/dts/mps2.dtsi
@@ -223,5 +223,21 @@
 				default-state = "off";
 			};
 		};
+
+	};
+
+	mb: smb {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+
+		ethernet@0 {
+			compatible = "smsc,lan9220", "smsc,lan9115";
+			reg = <0x0 0x10000>;
+			interrupts = <13>;
+			interrupt-parent = <&nvic>;
+			smsc,irq-active-high;
+		};
 	};
 };

Cheers
Vladimir

> 
> Cheers
> Vladimir
> 
>> 	Arnd
>>
>>
>>
> 
> 
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
> 
> 
> 

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#1336581 — Re: [PATCH v3 09/10] ARM: dts: introduce MPS2 AN385/AN386

On Wednesday 17 February 2016 16:48:44 Vladimir Murzin wrote:
> On 16/02/16 16:10, Vladimir Murzin wrote:
> > On 16/02/16 11:01, Arnd Bergmann wrote:
> >> On Tuesday 16 February 2016 10:08:14 Vladimir Murzin wrote:
> >>> +
> >>> +       ethernet@40200000 {
> >>> +               compatible = "smsc,lan9220", "smsc,lan9115";
> >>> +               reg = <0x40200000 0x10000>;
> >>> +               interrupts = <13>;
> >>> +               interrupt-parent = <&nvic>;
> >>> +               smsc,irq-active-high;
> >>> +       };
> >>> +};
> >>> +
> >>>
> >>
> >> This node seems slightly misplaced. Is there some external bus interface
> >> that this is connected to? The address suggests that it should be somewhere
> >> below the /soc node, and you probably want to list the external bus
> >> interface with a "ranges" property that identifies the addresses visibile
> >> there, and put the external chip under there.
> >>
> > 
> > I might messed it up since the MAC/PHY connects to the same 16-bit
> > interface as the 16MB PSRAM external memory and both connected via AHB.
> > 
> > Not sure how it should be expressed, so some help form DT camp would be
> > appreciated.
> 
> Does following fixup address your point on where/how ethernet node
> should be placed?



> diff --git a/arch/arm/boot/dts/mps2-an385.dts b/arch/arm/boot/dts/an385.dts
> index 976f86d..50c8d24 100644
> --- a/arch/arm/boot/dts/mps2-an385.dts
> +++ b/arch/arm/boot/dts/mps2-an385.dts
> @@ -63,14 +63,10 @@
>  		device_type = "memory";
>  		reg = <0x21000000 0x1000000>;
>  	};
> +};
> 
> -	ethernet@40200000 {
> -		compatible = "smsc,lan9220", "smsc,lan9115";
> -		reg = <0x40200000 0x10000>;
> -		interrupts = <13>;
> -		interrupt-parent = <&nvic>;
> -		smsc,irq-active-high;
> -	};
> +&mb {
> +	ranges = <0 0x40200000 0x10000>;
>  };

How is the range being set here? The way I read this is:

"There is an external bus controller whose single CPU physical
address for MMIO is configurable. The chip always connects
a lan9220 device to it (as that is in the dtsi file) and
nothing else is possible, and the bootloader in this
version of the machine has configured the window to be
at address 0x40200000."

Is that what the hardware does?

I would have expected the opposite, with the external bus
interface being hardwired to one or more physical addresses
(more than one if you have multiple chip-selects), and
then allow to connect different devices, which are in the
.dts file, while the bus controller is defined in the
.dtsi file.

	Arnd

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#1337222 — Re: [PATCH v3 09/10] ARM: dts: introduce MPS2 AN385/AN386

On 17/02/16 16:58, Arnd Bergmann wrote:
> On Wednesday 17 February 2016 16:48:44 Vladimir Murzin wrote:
>> On 16/02/16 16:10, Vladimir Murzin wrote:
>>> On 16/02/16 11:01, Arnd Bergmann wrote:
>>>> On Tuesday 16 February 2016 10:08:14 Vladimir Murzin wrote:
>>>>> +
>>>>> +       ethernet@40200000 {
>>>>> +               compatible = "smsc,lan9220", "smsc,lan9115";
>>>>> +               reg = <0x40200000 0x10000>;
>>>>> +               interrupts = <13>;
>>>>> +               interrupt-parent = <&nvic>;
>>>>> +               smsc,irq-active-high;
>>>>> +       };
>>>>> +};
>>>>> +
>>>>>
>>>>
>>>> This node seems slightly misplaced. Is there some external bus interface
>>>> that this is connected to? The address suggests that it should be somewhere
>>>> below the /soc node, and you probably want to list the external bus
>>>> interface with a "ranges" property that identifies the addresses visibile
>>>> there, and put the external chip under there.
>>>>
>>>
>>> I might messed it up since the MAC/PHY connects to the same 16-bit
>>> interface as the 16MB PSRAM external memory and both connected via AHB.
>>>
>>> Not sure how it should be expressed, so some help form DT camp would be
>>> appreciated.
>>
>> Does following fixup address your point on where/how ethernet node
>> should be placed?
> 
> 
> 
>> diff --git a/arch/arm/boot/dts/mps2-an385.dts b/arch/arm/boot/dts/an385.dts
>> index 976f86d..50c8d24 100644
>> --- a/arch/arm/boot/dts/mps2-an385.dts
>> +++ b/arch/arm/boot/dts/mps2-an385.dts
>> @@ -63,14 +63,10 @@
>>  		device_type = "memory";
>>  		reg = <0x21000000 0x1000000>;
>>  	};
>> +};
>>
>> -	ethernet@40200000 {
>> -		compatible = "smsc,lan9220", "smsc,lan9115";
>> -		reg = <0x40200000 0x10000>;
>> -		interrupts = <13>;
>> -		interrupt-parent = <&nvic>;
>> -		smsc,irq-active-high;
>> -	};
>> +&mb {
>> +	ranges = <0 0x40200000 0x10000>;
>>  };
> 
> How is the range being set here? The way I read this is:
> 
> "There is an external bus controller whose single CPU physical
> address for MMIO is configurable. The chip always connects
> a lan9220 device to it (as that is in the dtsi file) and
> nothing else is possible, and the bootloader in this
> version of the machine has configured the window to be
> at address 0x40200000."
> 
> Is that what the hardware does?
> 
> I would have expected the opposite, with the external bus
> interface being hardwired to one or more physical addresses
> (more than one if you have multiple chip-selects), and
> then allow to connect different devices, which are in the
> .dts file, while the bus controller is defined in the
> .dtsi file.
> 

Right, I thought in a wrong way, in opposite it makes more sense now.

.dtsi

/* below the soc/ */
smb {
	compatible = "simple-bus";
	#address-cells = <2>;
	#size-cells = <1>;
	ranges = <0 0 0x40200000 0x10000>,
		 <1 0 0xa0000000 0x10000>;
};

.dts

smb {
	ethernet@0,0 {
		compatible = "smsc,lan9220", "smsc,lan9115";
		reg = <0 0x0 0x10000>;
		interrupts = <13>;
		interrupt-parent = <&nvic>;
		smsc,irq-active-high;
};


and looking again at .dtsi it seems to me that fpgaio should be moved
below the soc/ under separate bus interface which would hosts audio and
spi too or I keep missing things around device-tree?

I appreciate your help on this, thanks!

Vladimir

> 	Arnd
> 
> 
> 

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#1337258 — Re: [PATCH v3 09/10] ARM: dts: introduce MPS2 AN385/AN386

On Thursday 18 February 2016 10:11:37 Vladimir Murzin wrote:
> 
> Right, I thought in a wrong way, in opposite it makes more sense now.
> 
> .dtsi
> 
> /* below the soc/ */
> smb {
>         compatible = "simple-bus";
>         #address-cells = <2>;
>         #size-cells = <1>;
>         ranges = <0 0 0x40200000 0x10000>,
>                  <1 0 0xa0000000 0x10000>;
> };

That looks good, yes.

Is 0x10000 the correct maximum addressable size of the external bus
in both cases?

Intuitively, I would guess that the 0xa0000000 range might
be much wider.

> .dts
> 
> smb {
>         ethernet@0,0 {
>                 compatible = "smsc,lan9220", "smsc,lan9115";
>                 reg = <0 0x0 0x10000>;
>                 interrupts = <13>;
>                 interrupt-parent = <&nvic>;
>                 smsc,irq-active-high;
> };
> 
> 
> and looking again at .dtsi it seems to me that fpgaio should be moved
> below the soc/ under separate bus interface which would hosts audio and
> spi too or I keep missing things around device-tree?
> 

I don't see the audio and spi nodes, so I'm not sure where exactly
you would put them.

Ideally those things should be visible from a block diagram in the
datasheet.

	Arnd

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#1337281 — Re: [PATCH v3 09/10] ARM: dts: introduce MPS2 AN385/AN386

On 18/02/16 10:45, Arnd Bergmann wrote:
> On Thursday 18 February 2016 10:11:37 Vladimir Murzin wrote:
>>
>> Right, I thought in a wrong way, in opposite it makes more sense now.
>>
>> .dtsi
>>
>> /* below the soc/ */
>> smb {
>>         compatible = "simple-bus";
>>         #address-cells = <2>;
>>         #size-cells = <1>;
>>         ranges = <0 0 0x40200000 0x10000>,
>>                  <1 0 0xa0000000 0x10000>;
>> };
> 
> That looks good, yes.
> 
> Is 0x10000 the correct maximum addressable size of the external bus
> in both cases?
> 
> Intuitively, I would guess that the 0xa0000000 range might
> be much wider.

There is only Ethernet connected to this bus (apart from PSRAM), so it
might be wider, but there is no indication of this in documentation.

> 
>> .dts
>>
>> smb {
>>         ethernet@0,0 {
>>                 compatible = "smsc,lan9220", "smsc,lan9115";
>>                 reg = <0 0x0 0x10000>;
>>                 interrupts = <13>;
>>                 interrupt-parent = <&nvic>;
>>                 smsc,irq-active-high;
>> };
>>
>>
>> and looking again at .dtsi it seems to me that fpgaio should be moved
>> below the soc/ under separate bus interface which would hosts audio and
>> spi too or I keep missing things around device-tree?
>>
> 
> I don't see the audio and spi nodes, so I'm not sure where exactly
> you would put them.

I just keep things simple ;)

> 
> Ideally those things should be visible from a block diagram in the
> datasheet.

Indeed, block diagram indicates all them as a "FPGA APB subsystem" and
clearly draws a line indicating a bus those devices are connected to.
After your point about lan9220, it looks clearer to me to express that
subsystem outside of soc/ node indicating bus interface, so it would
match to those drawings closely.

Cheers
Vladimir

> 
> 	Arnd
> 
> 
> 

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#1337305 — Re: [PATCH v3 09/10] ARM: dts: introduce MPS2 AN385/AN386

On Thursday 18 February 2016 11:13:06 Vladimir Murzin wrote:
> On 18/02/16 10:45, Arnd Bergmann wrote:
> > On Thursday 18 February 2016 10:11:37 Vladimir Murzin wrote:
> >>
> >> Right, I thought in a wrong way, in opposite it makes more sense now.
> >>
> >> .dtsi
> >>
> >> /* below the soc/ */
> >> smb {
> >>         compatible = "simple-bus";
> >>         #address-cells = <2>;
> >>         #size-cells = <1>;
> >>         ranges = <0 0 0x40200000 0x10000>,
> >>                  <1 0 0xa0000000 0x10000>;
> >> };
> > 
> > That looks good, yes.
> > 
> > Is 0x10000 the correct maximum addressable size of the external bus
> > in both cases?
> > 
> > Intuitively, I would guess that the 0xa0000000 range might
> > be much wider.
> 
> There is only Ethernet connected to this bus (apart from PSRAM), so it
> might be wider, but there is no indication of this in documentation.

I see this called "ahb_to_extmem16" in the documentation, which indicates
that it might be use 16 bits of address space, which would match
the 64K you listed.

For SSRAM1 / SSRAM2 / SSRAM3, a 8 MB address space is mentioned
and 16 MB for external PSRAM at 0x21000000.

	Arnd

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#1337323 — Re: [PATCH v3 09/10] ARM: dts: introduce MPS2 AN385/AN386

On 18/02/16 12:16, Arnd Bergmann wrote:
> On Thursday 18 February 2016 11:13:06 Vladimir Murzin wrote:
>> On 18/02/16 10:45, Arnd Bergmann wrote:
>>> On Thursday 18 February 2016 10:11:37 Vladimir Murzin wrote:
>>>>
>>>> Right, I thought in a wrong way, in opposite it makes more sense now.
>>>>
>>>> .dtsi
>>>>
>>>> /* below the soc/ */
>>>> smb {
>>>>         compatible = "simple-bus";
>>>>         #address-cells = <2>;
>>>>         #size-cells = <1>;
>>>>         ranges = <0 0 0x40200000 0x10000>,
>>>>                  <1 0 0xa0000000 0x10000>;
>>>> };
>>>
>>> That looks good, yes.
>>>
>>> Is 0x10000 the correct maximum addressable size of the external bus
>>> in both cases?
>>>
>>> Intuitively, I would guess that the 0xa0000000 range might
>>> be much wider.
>>
>> There is only Ethernet connected to this bus (apart from PSRAM), so it
>> might be wider, but there is no indication of this in documentation.
> 
> I see this called "ahb_to_extmem16" in the documentation, which indicates
> that it might be use 16 bits of address space, which would match
> the 64K you listed.
> 
> For SSRAM1 / SSRAM2 / SSRAM3, a 8 MB address space is mentioned
> and 16 MB for external PSRAM at 0x21000000.
> 

Right. I'll incorporate changes in the next version. Thanks for lessons
given and your time!

Cheers
Vladimir

> 	Arnd
> 
> 
> 
> 

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#1335514 — Re: [PATCH v3 09/10] ARM: dts: introduce MPS2 AN385/AN386

On Tue, Feb 16, 2016 at 11:08 AM, Vladimir Murzin
<vladimir.murzin@arm.com> wrote:

> Application Notes 385 and 386 shares the same memory map and features
> except the CPU is used. AN385 is supplied with Cortex-M3 CPU and AN386
> is supplied with Cortex-M4.
>
> Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
(...)
> +               fpgaio {
> +                       compatible = "syscon", "simple-mfd";
> +                       reg = <0x40028000 0x10>;
> +
> +                       led@0 {
> +                               compatible = "register-bit-led";
> +                               offset = <0x0>;
> +                               mask = <0x01>;
> +                               label = "userled:0";
> +                               linux,default-trigger = "heartbeat";
> +                               default-state = "on";
> +                       };
> +
> +                       led@1 {
> +                               compatible = "register-bit-led";
> +                               offset = <0x0>;
> +                               mask = <0x02>;
> +                               label = "userled:1";
> +                               linux,default-trigger = "usr";
> +                               default-state = "off";
> +                       };
> +               };

Thanks for using this. I worked hard to massage this into the
core.

Reviewed-by: Linus Walleij <linus.walleij@linaro.org>

Yours,
Linus Walleij

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#1335542 — Re: [PATCH v3 09/10] ARM: dts: introduce MPS2 AN385/AN386

On 16/02/16 15:17, Linus Walleij wrote:
> On Tue, Feb 16, 2016 at 11:08 AM, Vladimir Murzin
> <vladimir.murzin@arm.com> wrote:
> 
>> Application Notes 385 and 386 shares the same memory map and features
>> except the CPU is used. AN385 is supplied with Cortex-M3 CPU and AN386
>> is supplied with Cortex-M4.
>>
>> Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
> (...)
>> +               fpgaio {
>> +                       compatible = "syscon", "simple-mfd";
>> +                       reg = <0x40028000 0x10>;
>> +
>> +                       led@0 {
>> +                               compatible = "register-bit-led";
>> +                               offset = <0x0>;
>> +                               mask = <0x01>;
>> +                               label = "userled:0";
>> +                               linux,default-trigger = "heartbeat";
>> +                               default-state = "on";
>> +                       };
>> +
>> +                       led@1 {
>> +                               compatible = "register-bit-led";
>> +                               offset = <0x0>;
>> +                               mask = <0x02>;
>> +                               label = "userled:1";
>> +                               linux,default-trigger = "usr";
>> +                               default-state = "off";
>> +                       };
>> +               };
> 
> Thanks for using this. I worked hard to massage this into the
> core.
> 

Thank you for pushing it, it cost me couple of minutes to make these
tiny leds alive :)

> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
> 

Cheers!

Vladimir

> Yours,
> Linus Walleij
> 
> 
> 

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#1335248 — [PATCH v3 05/10] serial: mps2-uart: add support for early console

This adds support early console for MPS2 UART which can be enabled via
earlycon=mps2,0x40004000

Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
---
 drivers/tty/serial/Kconfig     |    1 +
 drivers/tty/serial/mps2-uart.c |   30 ++++++++++++++++++++++++++++++
 2 files changed, 31 insertions(+)

diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig
index 3a248be..4ed6e51 100644
--- a/drivers/tty/serial/Kconfig
+++ b/drivers/tty/serial/Kconfig
@@ -1454,6 +1454,7 @@ config SERIAL_MPS2_UART_CONSOLE
 	bool "MPS2 UART console support"
 	depends on SERIAL_MPS2_UART
 	select SERIAL_CORE_CONSOLE
+	select SERIAL_EARLYCON
 
 config SERIAL_MPS2_UART
 	bool "MPS2 UART port"
diff --git a/drivers/tty/serial/mps2-uart.c b/drivers/tty/serial/mps2-uart.c
index d97f3a9..f3a3bd1 100644
--- a/drivers/tty/serial/mps2-uart.c
+++ b/drivers/tty/serial/mps2-uart.c
@@ -435,6 +435,36 @@ static struct console mps2_uart_console = {
 
 #define MPS2_SERIAL_CONSOLE (&mps2_uart_console)
 
+static void mps2_early_putchar(struct uart_port *port, int ch)
+{
+
+	while (readb(port->membase + UARTn_STATE) & UARTn_STATE_TX_FULL)
+		cpu_relax();
+
+	writeb((unsigned char)ch, port->membase + UARTn_DATA);
+}
+
+
+static void mps2_early_write(struct console *con, const char *s, unsigned n)
+{
+	struct earlycon_device *dev = con->data;
+
+	uart_console_write(&dev->port, s, n, mps2_early_putchar);
+}
+
+static int __init mps2_early_console_setup(struct earlycon_device *device,
+					   const char *opt)
+{
+	if (!device->port.membase)
+		return -ENODEV;
+
+	device->con->write = mps2_early_write;
+
+	return 0;
+}
+EARLYCON_DECLARE(mps2, mps2_early_console_setup);
+OF_EARLYCON_DECLARE(mps2, "arm,mps2-uart", mps2_early_console_setup);
+
 #else
 #define MPS2_SERIAL_CONSOLE NULL
 #endif
-- 
1.7.9.5

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#1335259 — Re: [PATCH v3 05/10] serial: mps2-uart: add support for early console

On Tue, Feb 16, 2016 at 12:08 PM, Vladimir Murzin
<vladimir.murzin@arm.com> wrote:
> This adds support early console for MPS2 UART which can be enabled via
> earlycon=mps2,0x40004000


> --- a/drivers/tty/serial/mps2-uart.c
> +++ b/drivers/tty/serial/mps2-uart.c
> @@ -435,6 +435,36 @@ static struct console mps2_uart_console = {
>
>  #define MPS2_SERIAL_CONSOLE (&mps2_uart_console)
>
> +static void mps2_early_putchar(struct uart_port *port, int ch)
> +{
> +
> +       while (readb(port->membase + UARTn_STATE) & UARTn_STATE_TX_FULL)
> +               cpu_relax();

Infinite busy loop?

> +
> +       writeb((unsigned char)ch, port->membase + UARTn_DATA);
> +}
> +
> +
> +static void mps2_early_write(struct console *con, const char *s, unsigned n)
> +{
> +       struct earlycon_device *dev = con->data;
> +
> +       uart_console_write(&dev->port, s, n, mps2_early_putchar);
> +}
> +
> +static int __init mps2_early_console_setup(struct earlycon_device *device,
> +                                          const char *opt)
> +{
> +       if (!device->port.membase)
> +               return -ENODEV;
> +
> +       device->con->write = mps2_early_write;
> +
> +       return 0;
> +}
> +EARLYCON_DECLARE(mps2, mps2_early_console_setup);
> +OF_EARLYCON_DECLARE(mps2, "arm,mps2-uart", mps2_early_console_setup);

IIRC Peter Hurley mentioned you don't need to put both anymore, OF_
one is enough.

-- 
With Best Regards,
Andy Shevchenko

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#1335375 — Re: [PATCH v3 05/10] serial: mps2-uart: add support for early console

On 16/02/16 10:36, Andy Shevchenko wrote:
> On Tue, Feb 16, 2016 at 12:08 PM, Vladimir Murzin
> <vladimir.murzin@arm.com> wrote:
>> This adds support early console for MPS2 UART which can be enabled via
>> earlycon=mps2,0x40004000
> 
> 
>> --- a/drivers/tty/serial/mps2-uart.c
>> +++ b/drivers/tty/serial/mps2-uart.c
>> @@ -435,6 +435,36 @@ static struct console mps2_uart_console = {
>>
>>  #define MPS2_SERIAL_CONSOLE (&mps2_uart_console)
>>
>> +static void mps2_early_putchar(struct uart_port *port, int ch)
>> +{
>> +
>> +       while (readb(port->membase + UARTn_STATE) & UARTn_STATE_TX_FULL)
>> +               cpu_relax();
> 
> Infinite busy loop?

In case of broken hw, yes, but I'm quite unsure how we can help to fix
it. Do you have something in mind?

> 
>> +
>> +       writeb((unsigned char)ch, port->membase + UARTn_DATA);
>> +}
>> +
>> +
>> +static void mps2_early_write(struct console *con, const char *s, unsigned n)
>> +{
>> +       struct earlycon_device *dev = con->data;
>> +
>> +       uart_console_write(&dev->port, s, n, mps2_early_putchar);
>> +}
>> +
>> +static int __init mps2_early_console_setup(struct earlycon_device *device,
>> +                                          const char *opt)
>> +{
>> +       if (!device->port.membase)
>> +               return -ENODEV;
>> +
>> +       device->con->write = mps2_early_write;
>> +
>> +       return 0;
>> +}
>> +EARLYCON_DECLARE(mps2, mps2_early_console_setup);
>> +OF_EARLYCON_DECLARE(mps2, "arm,mps2-uart", mps2_early_console_setup);
> 
> IIRC Peter Hurley mentioned you don't need to put both anymore, OF_
> one is enough.
> 

I've just tried with OF_ only and seems it works fine. Thanks for
pointing at it!

Cheers
Vladimir

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#1335377 — Re: [PATCH v3 05/10] serial: mps2-uart: add support for early console

On Tue, Feb 16, 2016 at 3:09 PM, Vladimir Murzin
<vladimir.murzin@arm.com> wrote:
> On 16/02/16 10:36, Andy Shevchenko wrote:
>> On Tue, Feb 16, 2016 at 12:08 PM, Vladimir Murzin
>> <vladimir.murzin@arm.com> wrote:
>>> This adds support early console for MPS2 UART which can be enabled via
>>> earlycon=mps2,0x40004000

>>> +static void mps2_early_putchar(struct uart_port *port, int ch)
>>> +{
>>> +
>>> +       while (readb(port->membase + UARTn_STATE) & UARTn_STATE_TX_FULL)
>>> +               cpu_relax();
>>
>> Infinite busy loop?
>
> In case of broken hw, yes, but I'm quite unsure how we can help to fix
> it. Do you have something in mind?

Set sane amount of loops like

int count = 100;
…
while (… && --count)

Though I have no idea what to do if count == 0. Perhaps it's a TX overrun state.

You may try to recover by flushing TX queue in HW (fifo and / or Tx
shift register) if HW supports it.

-- 
With Best Regards,
Andy Shevchenko

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#1335387 — Re: [PATCH v3 05/10] serial: mps2-uart: add support for early console

On 16/02/16 13:13, Andy Shevchenko wrote:
> On Tue, Feb 16, 2016 at 3:09 PM, Vladimir Murzin
> <vladimir.murzin@arm.com> wrote:
>> On 16/02/16 10:36, Andy Shevchenko wrote:
>>> On Tue, Feb 16, 2016 at 12:08 PM, Vladimir Murzin
>>> <vladimir.murzin@arm.com> wrote:
>>>> This adds support early console for MPS2 UART which can be enabled via
>>>> earlycon=mps2,0x40004000
> 
>>>> +static void mps2_early_putchar(struct uart_port *port, int ch)
>>>> +{
>>>> +
>>>> +       while (readb(port->membase + UARTn_STATE) & UARTn_STATE_TX_FULL)
>>>> +               cpu_relax();
>>>
>>> Infinite busy loop?
>>
>> In case of broken hw, yes, but I'm quite unsure how we can help to fix
>> it. Do you have something in mind?
> 
> Set sane amount of loops like
> 
> int count = 100;
> …
> while (… && --count)
> 
> Though I have no idea what to do if count == 0. Perhaps it's a TX overrun state.

I thought about counter too, like some of drivers do, but had no idea
what to do next after counter reaches zero. In case of TX overrun we
could get it either because of broken hw or because we entered Linux
with that state already set. In both cases, it looks handy to me to
attach a debugger and see that we are spinning in this putchar loop.

If you do insist to have a counter I'll add one, but if you are not
strong about it I'd prefer to leave it as is.

> 
> You may try to recover by flushing TX queue in HW (fifo and / or Tx
> shift register) if HW supports it.
> 

I'm afraid this is not supported.

Thanks
Vladimir

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#1335417 — Re: [PATCH v3 05/10] serial: mps2-uart: add support for early console

On Tue, Feb 16, 2016 at 3:38 PM, Vladimir Murzin
<vladimir.murzin@arm.com> wrote:
> On 16/02/16 13:13, Andy Shevchenko wrote:
>> On Tue, Feb 16, 2016 at 3:09 PM, Vladimir Murzin
>> <vladimir.murzin@arm.com> wrote:
>>> On 16/02/16 10:36, Andy Shevchenko wrote:
>>>> On Tue, Feb 16, 2016 at 12:08 PM, Vladimir Murzin
>>>> <vladimir.murzin@arm.com> wrote:

>>>>> +static void mps2_early_putchar(struct uart_port *port, int ch)
>>>>> +{
>>>>> +
>>>>> +       while (readb(port->membase + UARTn_STATE) & UARTn_STATE_TX_FULL)
>>>>> +               cpu_relax();
>>>>
>>>> Infinite busy loop?
>>>
>>> In case of broken hw, yes, but I'm quite unsure how we can help to fix
>>> it. Do you have something in mind?
>>
>> Set sane amount of loops like
>>
>> int count = 100;
>> …
>> while (… && --count)
>>
>> Though I have no idea what to do if count == 0. Perhaps it's a TX overrun state.
>
> I thought about counter too, like some of drivers do, but had no idea
> what to do next after counter reaches zero. In case of TX overrun we
> could get it either because of broken hw or because we entered Linux
> with that state already set. In both cases, it looks handy to me to
> attach a debugger and see that we are spinning in this putchar loop.
>
> If you do insist to have a counter I'll add one, but if you are not
> strong about it I'd prefer to leave it as is.

I would wait for Peter Hurley, Alan, or other experienced guys to talk.

>> You may try to recover by flushing TX queue in HW (fifo and / or Tx
>> shift register) if HW supports it.
>>
>
> I'm afraid this is not supported.

Maybe soft reset? Anyway, see above.

-- 
With Best Regards,
Andy Shevchenko

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#1335597 — Re: [PATCH v3 05/10] serial: mps2-uart: add support for early console

> > If you do insist to have a counter I'll add one, but if you are not
> > strong about it I'd prefer to leave it as is.  
> 
> I would wait for Peter Hurley, Alan, or other experienced guys to talk.

I would leave it. Some of the drivers have defensive code of this form,
but mostly because they can be hot unplugged and we don't want to spin
into oblivion because the user ejected a serial card adapter.

Alan

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