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[PATCH V3 0/5] PCIe Xilinx generic driver for Microblaze and

Started byBharat Kumar Gogada <bharat.kumar.gogada@xilinx.com>
First post2016-02-09 11:50 +0100
Last post2016-02-09 15:50 +0100
Articles 8 — 3 participants

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  [PATCH V3 0/5] PCIe Xilinx generic driver for Microblaze and  Bharat Kumar Gogada <bharat.kumar.gogada@xilinx.com> - 2016-02-09 11:50 +0100
    [PATCH V3 3/5] PCI: xilinx: Modifying AXI PCIe Host Bridge driver to work on both  Zynq and Microblaze Bharat Kumar Gogada <bharat.kumar.gogada@xilinx.com> - 2016-02-09 11:50 +0100
      Re: [PATCH V3 3/5] PCI: xilinx: Modifying AXI PCIe Host Bridge  driver to work on both  Zynq and Microblaze Paul Burton <paul.burton@imgtec.com> - 2016-02-09 17:20 +0100
        RE: [PATCH V3 3/5] PCI: xilinx: Modifying AXI PCIe Host Bridge  driver to work on both  Zynq and Microblaze Bharat Kumar Gogada <bharat.kumar.gogada@xilinx.com> - 2016-02-10 07:00 +0100
          Re: [PATCH V3 3/5] PCI: xilinx: Modifying AXI PCIe Host Bridge  driver to work on both  Zynq and Microblaze Paul Burton <paul.burton@imgtec.com> - 2016-02-10 18:30 +0100
            Re: [PATCH V3 3/5] PCI: xilinx: Modifying AXI PCIe Host Bridge driver to work on both  Zynq and Microblaze Arnd Bergmann <arnd@arndb.de> - 2016-02-10 21:50 +0100
              RE: [PATCH V3 3/5] PCI: xilinx: Modifying AXI PCIe Host Bridge  driver to work on both  Zynq and Microblaze Bharat Kumar Gogada <bharat.kumar.gogada@xilinx.com> - 2016-02-11 06:40 +0100
    Re: [PATCH V3 0/5] PCIe Xilinx generic driver for Microblaze and Arnd Bergmann <arnd@arndb.de> - 2016-02-09 15:50 +0100

#1330069 — [PATCH V3 0/5] PCIe Xilinx generic driver for Microblaze and

FromBharat Kumar Gogada <bharat.kumar.gogada@xilinx.com>
Date2016-02-09 11:50 +0100
Subject[PATCH V3 0/5] PCIe Xilinx generic driver for Microblaze and
Message-ID<r0e1Q-2PZ-11@gated-at.bofh.it>
This patch series does modifications to pcie-xilinx.c, to support common
driver on both Zynq and Microblaze architectures.
Microblaze pci-common.c has been modified to support generic driver.

Bharat Kumar Gogada (5):
  PCI: xilinx: Removing xilinx_pcie_parse_and_add_res function
  PCI: xilinx: Removing struct hw_pci structure.
  PCI: xilinx: Modifying AXI PCIe Host Bridge driver to     work on both
     Zynq and Microblaze
  PCI: xilinx: Updating Zynq PCI binding documentation     with 
    Microblaze node.
  Microblaze: Modifying microblaze PCI subsytem to     support  generic
    Xilinx  AXI PCIe Host Bridge IP driver

 .../devicetree/bindings/pci/xilinx-pcie.txt        |  32 +++-
 arch/microblaze/Kconfig                            |   3 +
 arch/microblaze/pci/pci-common.c                   |  56 ++----
 drivers/pci/host/Kconfig                           |   2 +-
 drivers/pci/host/pcie-xilinx.c                     | 191 +++------------------
 5 files changed, 66 insertions(+), 218 deletions(-)

-- 
2.1.1

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#1330073 — [PATCH V3 3/5] PCI: xilinx: Modifying AXI PCIe Host Bridge driver to work on both Zynq and Microblaze

FromBharat Kumar Gogada <bharat.kumar.gogada@xilinx.com>
Date2016-02-09 11:50 +0100
Subject[PATCH V3 3/5] PCI: xilinx: Modifying AXI PCIe Host Bridge driver to work on both Zynq and Microblaze
Message-ID<r0e1S-2PZ-49@gated-at.bofh.it>
In reply to#1330069
Modifying Xilinx AXI PCIe Host Bridge Soft IP driver to work on both
Zynq and Microblaze Architectures.
With these modifications drivers/pci/host/pcie-xilinx.c, will
work on both Zynq and Microblaze Architectures.

Signed-off-by: Bharat Kumar Gogada <bharatku@xilinx.com>
Signed-off-by: Ravi Kiran Gummaluri <rgummal@xilinx.com>
---
Changes:
Removed unneccessary architecture dependent number of MSI's.
Added #ifdef to pci_fixup_irqs which is ARM specific API.
---
 drivers/pci/host/pcie-xilinx.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/pci/host/pcie-xilinx.c b/drivers/pci/host/pcie-xilinx.c
index 13fec35..6cbce34 100644
--- a/drivers/pci/host/pcie-xilinx.c
+++ b/drivers/pci/host/pcie-xilinx.c
@@ -704,7 +704,9 @@ static int xilinx_pcie_probe(struct platform_device *pdev)
 #endif
 	pci_scan_child_bus(bus);
 	pci_assign_unassigned_bus_resources(bus);
+#ifdef CONFIG_ARM
 	pci_fixup_irqs(pci_common_swizzle, of_irq_parse_and_map_pci);
+#endif
 	pci_bus_add_devices(bus);
 	platform_set_drvdata(pdev, port);
 
-- 
2.1.1

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#1330417 — Re: [PATCH V3 3/5] PCI: xilinx: Modifying AXI PCIe Host Bridge driver to work on both Zynq and Microblaze

FromPaul Burton <paul.burton@imgtec.com>
Date2016-02-09 17:20 +0100
SubjectRe: [PATCH V3 3/5] PCI: xilinx: Modifying AXI PCIe Host Bridge driver to work on both Zynq and Microblaze
Message-ID<r0jbe-6vm-31@gated-at.bofh.it>
In reply to#1330073
On Tue, Feb 09, 2016 at 04:11:56PM +0530, Bharat Kumar Gogada wrote:
> Modifying Xilinx AXI PCIe Host Bridge Soft IP driver to work on both
> Zynq and Microblaze Architectures.
> With these modifications drivers/pci/host/pcie-xilinx.c, will
> work on both Zynq and Microblaze Architectures.
> 
> Signed-off-by: Bharat Kumar Gogada <bharatku@xilinx.com>
> Signed-off-by: Ravi Kiran Gummaluri <rgummal@xilinx.com>
> ---
> Changes:
> Removed unneccessary architecture dependent number of MSI's.
> Added #ifdef to pci_fixup_irqs which is ARM specific API.

Hi Bharat,

Why do you say pci_fixup_irqs is ARM-specific? It's declared in
include/linux/pci.h, defined in drivers/pci/setup-irq.c & used by
multiple architectures (alpha, arm, m68k, mips, sh, sparc, tile,
unicore32 from a quick grep).

Will you not break INTX-style interrupts by removing this?

Thanks,
    Paul

> ---
>  drivers/pci/host/pcie-xilinx.c | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/drivers/pci/host/pcie-xilinx.c b/drivers/pci/host/pcie-xilinx.c
> index 13fec35..6cbce34 100644
> --- a/drivers/pci/host/pcie-xilinx.c
> +++ b/drivers/pci/host/pcie-xilinx.c
> @@ -704,7 +704,9 @@ static int xilinx_pcie_probe(struct platform_device *pdev)
>  #endif
>  	pci_scan_child_bus(bus);
>  	pci_assign_unassigned_bus_resources(bus);
> +#ifdef CONFIG_ARM
>  	pci_fixup_irqs(pci_common_swizzle, of_irq_parse_and_map_pci);
> +#endif
>  	pci_bus_add_devices(bus);
>  	platform_set_drvdata(pdev, port);
>  
> -- 
> 2.1.1
>

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#1330910 — RE: [PATCH V3 3/5] PCI: xilinx: Modifying AXI PCIe Host Bridge driver to work on both Zynq and Microblaze

FromBharat Kumar Gogada <bharat.kumar.gogada@xilinx.com>
Date2016-02-10 07:00 +0100
SubjectRE: [PATCH V3 3/5] PCI: xilinx: Modifying AXI PCIe Host Bridge driver to work on both Zynq and Microblaze
Message-ID<r0vYJ-6xr-3@gated-at.bofh.it>
In reply to#1330417
> On Tue, Feb 09, 2016 at 04:11:56PM +0530, Bharat Kumar Gogada wrote:
> > Modifying Xilinx AXI PCIe Host Bridge Soft IP driver to work on both
> > Zynq and Microblaze Architectures.
> > With these modifications drivers/pci/host/pcie-xilinx.c, will work on
> > both Zynq and Microblaze Architectures.
> >
> > Signed-off-by: Bharat Kumar Gogada <bharatku@xilinx.com>
> > Signed-off-by: Ravi Kiran Gummaluri <rgummal@xilinx.com>
> > ---
> > Changes:
> > Removed unneccessary architecture dependent number of MSI's.
> > Added #ifdef to pci_fixup_irqs which is ARM specific API.
> 
> Hi Bharat,
> 
> Why do you say pci_fixup_irqs is ARM-specific? It's declared in
> include/linux/pci.h, defined in drivers/pci/setup-irq.c & used by multiple
> architectures (alpha, arm, m68k, mips, sh, sparc, tile,
> unicore32 from a quick grep).
> 
> Will you not break INTX-style interrupts by removing this?
> 
I meant to say ARM specific w.r.t Microblaze architecture, which is what this patch series are for. This has been already discussed in my previous patch by  Arnd Bergmann and Lorenzo Pieralisi . (https://lkml.org/lkml/2016/1/12/707)

Bharat

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#1331353 — Re: [PATCH V3 3/5] PCI: xilinx: Modifying AXI PCIe Host Bridge driver to work on both Zynq and Microblaze

FromPaul Burton <paul.burton@imgtec.com>
Date2016-02-10 18:30 +0100
SubjectRe: [PATCH V3 3/5] PCI: xilinx: Modifying AXI PCIe Host Bridge driver to work on both Zynq and Microblaze
Message-ID<r0GKv-5hG-17@gated-at.bofh.it>
In reply to#1330910
On Wed, Feb 10, 2016 at 05:55:51AM +0000, Bharat Kumar Gogada wrote:
> > On Tue, Feb 09, 2016 at 04:11:56PM +0530, Bharat Kumar Gogada wrote:
> > > Modifying Xilinx AXI PCIe Host Bridge Soft IP driver to work on both
> > > Zynq and Microblaze Architectures.
> > > With these modifications drivers/pci/host/pcie-xilinx.c, will work on
> > > both Zynq and Microblaze Architectures.
> > >
> > > Signed-off-by: Bharat Kumar Gogada <bharatku@xilinx.com>
> > > Signed-off-by: Ravi Kiran Gummaluri <rgummal@xilinx.com>
> > > ---
> > > Changes:
> > > Removed unneccessary architecture dependent number of MSI's.
> > > Added #ifdef to pci_fixup_irqs which is ARM specific API.
> > 
> > Hi Bharat,
> > 
> > Why do you say pci_fixup_irqs is ARM-specific? It's declared in
> > include/linux/pci.h, defined in drivers/pci/setup-irq.c & used by multiple
> > architectures (alpha, arm, m68k, mips, sh, sparc, tile,
> > unicore32 from a quick grep).
> > 
> > Will you not break INTX-style interrupts by removing this?
> > 
> I meant to say ARM specific w.r.t Microblaze architecture, which is
> what this patch series are for. This has been already discussed in my
> previous patch by  Arnd Bergmann and Lorenzo Pieralisi .
> (https://lkml.org/lkml/2016/1/12/707)

Hi Bharat,

Ok, so you don't need it for microblaze but do need it for zynq/ARM. We
also need it for MIPS, where my recent patches enable this driver. So if
#ifdef'ing this is the current way forwards could you please invert the
condition to #ifndef CONFIG_MICROBLAZE?

Thanks,
    Paul

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#1331476 — Re: [PATCH V3 3/5] PCI: xilinx: Modifying AXI PCIe Host Bridge driver to work on both Zynq and Microblaze

FromArnd Bergmann <arnd@arndb.de>
Date2016-02-10 21:50 +0100
SubjectRe: [PATCH V3 3/5] PCI: xilinx: Modifying AXI PCIe Host Bridge driver to work on both Zynq and Microblaze
Message-ID<r0JS2-7cY-5@gated-at.bofh.it>
In reply to#1331353
On Wednesday 10 February 2016 09:27:07 Paul Burton wrote:
> On Wed, Feb 10, 2016 at 05:55:51AM +0000, Bharat Kumar Gogada wrote:
> > > On Tue, Feb 09, 2016 at 04:11:56PM +0530, Bharat Kumar Gogada wrote:
> > > > Modifying Xilinx AXI PCIe Host Bridge Soft IP driver to work on both
> > > > Zynq and Microblaze Architectures.
> > > > With these modifications drivers/pci/host/pcie-xilinx.c, will work on
> > > > both Zynq and Microblaze Architectures.
> > > >
> > > > Signed-off-by: Bharat Kumar Gogada <bharatku@xilinx.com>
> > > > Signed-off-by: Ravi Kiran Gummaluri <rgummal@xilinx.com>
> > > > ---
> > > > Changes:
> > > > Removed unneccessary architecture dependent number of MSI's.
> > > > Added #ifdef to pci_fixup_irqs which is ARM specific API.
> > > 
> > > Hi Bharat,
> > > 
> > > Why do you say pci_fixup_irqs is ARM-specific? It's declared in
> > > include/linux/pci.h, defined in drivers/pci/setup-irq.c & used by multiple
> > > architectures (alpha, arm, m68k, mips, sh, sparc, tile,
> > > unicore32 from a quick grep).
> > > 
> > > Will you not break INTX-style interrupts by removing this?
> > > 
> > I meant to say ARM specific w.r.t Microblaze architecture, which is
> > what this patch series are for. This has been already discussed in my
> > previous patch by  Arnd Bergmann and Lorenzo Pieralisi .
> > (https://lkml.org/lkml/2016/1/12/707)
> 
> Hi Bharat,
> 
> Ok, so you don't need it for microblaze but do need it for zynq/ARM. We
> also need it for MIPS, where my recent patches enable this driver. So if
> #ifdef'ing this is the current way forwards could you please invert the
> condition to #ifndef CONFIG_MICROBLAZE?

I think we are getting to the point where we should try much harder
to make sure nobody needs that hack and it all works out of the box.

	Arnd

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#1331699 — RE: [PATCH V3 3/5] PCI: xilinx: Modifying AXI PCIe Host Bridge driver to work on both Zynq and Microblaze

FromBharat Kumar Gogada <bharat.kumar.gogada@xilinx.com>
Date2016-02-11 06:40 +0100
SubjectRE: [PATCH V3 3/5] PCI: xilinx: Modifying AXI PCIe Host Bridge driver to work on both Zynq and Microblaze
Message-ID<r0S8V-4pf-5@gated-at.bofh.it>
In reply to#1331476
> Subject: Re: [PATCH V3 3/5] PCI: xilinx: Modifying AXI PCIe Host Bridge driver
> to work on both Zynq and Microblaze
> 
> On Wednesday 10 February 2016 09:27:07 Paul Burton wrote:
> > On Wed, Feb 10, 2016 at 05:55:51AM +0000, Bharat Kumar Gogada wrote:
> > > > On Tue, Feb 09, 2016 at 04:11:56PM +0530, Bharat Kumar Gogada
> wrote:
> > > > > Modifying Xilinx AXI PCIe Host Bridge Soft IP driver to work on
> > > > > both Zynq and Microblaze Architectures.
> > > > > With these modifications drivers/pci/host/pcie-xilinx.c, will
> > > > > work on both Zynq and Microblaze Architectures.
> > > > >
> > > > > Signed-off-by: Bharat Kumar Gogada <bharatku@xilinx.com>
> > > > > Signed-off-by: Ravi Kiran Gummaluri <rgummal@xilinx.com>
> > > > > ---
> > > > > Changes:
> > > > > Removed unneccessary architecture dependent number of MSI's.
> > > > > Added #ifdef to pci_fixup_irqs which is ARM specific API.
> > > >
> > > > Hi Bharat,
> > > >
> > > > Why do you say pci_fixup_irqs is ARM-specific? It's declared in
> > > > include/linux/pci.h, defined in drivers/pci/setup-irq.c & used by
> > > > multiple architectures (alpha, arm, m68k, mips, sh, sparc, tile,
> > > > unicore32 from a quick grep).
> > > >
> > > > Will you not break INTX-style interrupts by removing this?
> > > >
> > > I meant to say ARM specific w.r.t Microblaze architecture, which is
> > > what this patch series are for. This has been already discussed in
> > > my previous patch by  Arnd Bergmann and Lorenzo Pieralisi .
> > > (https://lkml.org/lkml/2016/1/12/707)
> >
> > Hi Bharat,
> >
> > Ok, so you don't need it for microblaze but do need it for zynq/ARM.
> > We also need it for MIPS, where my recent patches enable this driver.
> > So if #ifdef'ing this is the current way forwards could you please
> > invert the condition to #ifndef CONFIG_MICROBLAZE?
> 
> I think we are getting to the point where we should try much harder to make
> sure nobody needs that hack and it all works out of the box.

Ok I will invert to this condition and resend the patches.

Bharat

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#1330295

FromArnd Bergmann <arnd@arndb.de>
Date2016-02-09 15:50 +0100
Message-ID<r0hM6-5mt-15@gated-at.bofh.it>
In reply to#1330069
On Tuesday 09 February 2016 16:11:53 Bharat Kumar Gogada wrote:
> This patch series does modifications to pcie-xilinx.c, to support common
> driver on both Zynq and Microblaze architectures.
> Microblaze pci-common.c has been modified to support generic driver.
> 
> Bharat Kumar Gogada (5):
>   PCI: xilinx: Removing xilinx_pcie_parse_and_add_res function
>   PCI: xilinx: Removing struct hw_pci structure.
>   PCI: xilinx: Modifying AXI PCIe Host Bridge driver to     work on both
>      Zynq and Microblaze
>   PCI: xilinx: Updating Zynq PCI binding documentation     with 
>     Microblaze node.
>   Microblaze: Modifying microblaze PCI subsytem to     support  generic
>     Xilinx  AXI PCIe Host Bridge IP driver
> 

Reviewed-by: Arnd Bergmann <arnd@arndb.de>

I'm still not happy about needing the pci_fixup_irqs in patch 3/5, but
I can understand that fixing this is beyond the scope of your series.

	Arnd

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