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Groups > linux.kernel > #1330417
| From | Paul Burton <paul.burton@imgtec.com> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | Re: [PATCH V3 3/5] PCI: xilinx: Modifying AXI PCIe Host Bridge driver to work on both Zynq and Microblaze |
| Date | 2016-02-09 17:20 +0100 |
| Message-ID | <r0jbe-6vm-31@gated-at.bofh.it> (permalink) |
| References | <r0e1Q-2PZ-11@gated-at.bofh.it> <r0e1S-2PZ-49@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
On Tue, Feb 09, 2016 at 04:11:56PM +0530, Bharat Kumar Gogada wrote:
> Modifying Xilinx AXI PCIe Host Bridge Soft IP driver to work on both
> Zynq and Microblaze Architectures.
> With these modifications drivers/pci/host/pcie-xilinx.c, will
> work on both Zynq and Microblaze Architectures.
>
> Signed-off-by: Bharat Kumar Gogada <bharatku@xilinx.com>
> Signed-off-by: Ravi Kiran Gummaluri <rgummal@xilinx.com>
> ---
> Changes:
> Removed unneccessary architecture dependent number of MSI's.
> Added #ifdef to pci_fixup_irqs which is ARM specific API.
Hi Bharat,
Why do you say pci_fixup_irqs is ARM-specific? It's declared in
include/linux/pci.h, defined in drivers/pci/setup-irq.c & used by
multiple architectures (alpha, arm, m68k, mips, sh, sparc, tile,
unicore32 from a quick grep).
Will you not break INTX-style interrupts by removing this?
Thanks,
Paul
> ---
> drivers/pci/host/pcie-xilinx.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/drivers/pci/host/pcie-xilinx.c b/drivers/pci/host/pcie-xilinx.c
> index 13fec35..6cbce34 100644
> --- a/drivers/pci/host/pcie-xilinx.c
> +++ b/drivers/pci/host/pcie-xilinx.c
> @@ -704,7 +704,9 @@ static int xilinx_pcie_probe(struct platform_device *pdev)
> #endif
> pci_scan_child_bus(bus);
> pci_assign_unassigned_bus_resources(bus);
> +#ifdef CONFIG_ARM
> pci_fixup_irqs(pci_common_swizzle, of_irq_parse_and_map_pci);
> +#endif
> pci_bus_add_devices(bus);
> platform_set_drvdata(pdev, port);
>
> --
> 2.1.1
>
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[PATCH V3 0/5] PCIe Xilinx generic driver for Microblaze and Bharat Kumar Gogada <bharat.kumar.gogada@xilinx.com> - 2016-02-09 11:50 +0100
[PATCH V3 3/5] PCI: xilinx: Modifying AXI PCIe Host Bridge driver to work on both Zynq and Microblaze Bharat Kumar Gogada <bharat.kumar.gogada@xilinx.com> - 2016-02-09 11:50 +0100
Re: [PATCH V3 3/5] PCI: xilinx: Modifying AXI PCIe Host Bridge driver to work on both Zynq and Microblaze Paul Burton <paul.burton@imgtec.com> - 2016-02-09 17:20 +0100
RE: [PATCH V3 3/5] PCI: xilinx: Modifying AXI PCIe Host Bridge driver to work on both Zynq and Microblaze Bharat Kumar Gogada <bharat.kumar.gogada@xilinx.com> - 2016-02-10 07:00 +0100
Re: [PATCH V3 3/5] PCI: xilinx: Modifying AXI PCIe Host Bridge driver to work on both Zynq and Microblaze Paul Burton <paul.burton@imgtec.com> - 2016-02-10 18:30 +0100
Re: [PATCH V3 3/5] PCI: xilinx: Modifying AXI PCIe Host Bridge driver to work on both Zynq and Microblaze Arnd Bergmann <arnd@arndb.de> - 2016-02-10 21:50 +0100
RE: [PATCH V3 3/5] PCI: xilinx: Modifying AXI PCIe Host Bridge driver to work on both Zynq and Microblaze Bharat Kumar Gogada <bharat.kumar.gogada@xilinx.com> - 2016-02-11 06:40 +0100
Re: [PATCH V3 0/5] PCIe Xilinx generic driver for Microblaze and Arnd Bergmann <arnd@arndb.de> - 2016-02-09 15:50 +0100
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