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[PATCH 00/25] serial: sh-sci: Add external clock and BRG Support

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  [PATCH 00/25] serial: sh-sci: Add external clock and BRG Support Geert Uytterhoeven <geert+renesas@glider.be> - 2015-11-19 19:50 +0100
    [PATCH 22/25] ARM: shmobile: koelsch dts: Enable SCIF_CLK frequency and pins Geert Uytterhoeven <geert+renesas@glider.be> - 2015-11-19 19:50 +0100
    [PATCH 16/25] serial: sh-sci: Correct SCIF type on RZ/A1H Geert Uytterhoeven <geert+renesas@glider.be> - 2015-11-19 19:50 +0100
    [PATCH 20/25] serial: sh-sci: Add support for optional BRG on (H)SCIF Geert Uytterhoeven <geert+renesas@glider.be> - 2015-11-19 19:50 +0100
    [PATCH 18/25] serial: sh-sci: Prepare for multiple clocks and baud rate generators Geert Uytterhoeven <geert+renesas@glider.be> - 2015-11-19 19:50 +0100
      Re: [PATCH 18/25] serial: sh-sci: Prepare for multiple clocks and baud rate generators Laurent Pinchart <laurent.pinchart@ideasonboard.com> - 2015-11-19 22:10 +0100
        Re: [PATCH 18/25] serial: sh-sci: Prepare for multiple clocks and  baud rate generators Geert Uytterhoeven <geert@linux-m68k.org> - 2015-11-20 09:00 +0100
          Re: [PATCH 18/25] serial: sh-sci: Prepare for multiple clocks and baud rate generators Laurent Pinchart <laurent.pinchart@ideasonboard.com> - 2015-11-20 15:50 +0100
            Re: [PATCH 18/25] serial: sh-sci: Prepare for multiple clocks and  baud rate generators Geert Uytterhoeven <geert@linux-m68k.org> - 2015-11-20 16:20 +0100
              Re: [PATCH 18/25] serial: sh-sci: Prepare for multiple clocks and baud rate generators Laurent Pinchart <laurent.pinchart@ideasonboard.com> - 2015-11-20 16:40 +0100
    [PATCH 05/25] serial: sh-sci: Drop unused frame_len parameter for sci_baud_calc_hscif() Geert Uytterhoeven <geert+renesas@glider.be> - 2015-11-19 19:50 +0100
    [PATCH 23/25] arm64: renesas: r8a7795 dtsi: Add BRG support for (H)SCIF Geert Uytterhoeven <geert+renesas@glider.be> - 2015-11-19 19:50 +0100
      Re: [PATCH 23/25] arm64: renesas: r8a7795 dtsi: Add BRG support for (H)SCIF Laurent Pinchart <laurent.pinchart@ideasonboard.com> - 2015-11-19 22:10 +0100
        Re: [PATCH 23/25] arm64: renesas: r8a7795 dtsi: Add BRG support for (H)SCIF Geert Uytterhoeven <geert@linux-m68k.org> - 2015-11-20 09:20 +0100
    [PATCH 02/25] serial: sh-sci: Update DT binding documentation for BRG support Geert Uytterhoeven <geert+renesas@glider.be> - 2015-11-19 19:50 +0100
      Re: [PATCH 02/25] serial: sh-sci: Update DT binding documentation for BRG support Laurent Pinchart <laurent.pinchart@ideasonboard.com> - 2015-11-19 21:30 +0100
        Re: [PATCH 02/25] serial: sh-sci: Update DT binding documentation for  BRG support Geert Uytterhoeven <geert@linux-m68k.org> - 2015-11-19 21:50 +0100
          Re: [PATCH 02/25] serial: sh-sci: Update DT binding documentation for BRG support Laurent Pinchart <laurent.pinchart@ideasonboard.com> - 2015-11-19 22:20 +0100
            Re: [PATCH 02/25] serial: sh-sci: Update DT binding documentation for  BRG support Geert Uytterhoeven <geert@linux-m68k.org> - 2015-11-20 09:00 +0100
    [PATCH 04/25] serial: sh-sci: Grammar s/Get ... for/Get ... from/ Geert Uytterhoeven <geert+renesas@glider.be> - 2015-11-19 19:50 +0100
    [PATCH 17/25] serial: sh-sci: Correct SCIF type on R-Car for BRG Geert Uytterhoeven <geert+renesas@glider.be> - 2015-11-19 19:50 +0100
      Re: [PATCH 17/25] serial: sh-sci: Correct SCIF type on R-Car for BRG Laurent Pinchart <laurent.pinchart@ideasonboard.com> - 2015-11-19 22:00 +0100
        Re: [PATCH 17/25] serial: sh-sci: Correct SCIF type on R-Car for BRG Geert Uytterhoeven <geert@linux-m68k.org> - 2015-11-20 08:50 +0100
          Re: [PATCH 17/25] serial: sh-sci: Correct SCIF type on R-Car for BRG Laurent Pinchart <laurent.pinchart@ideasonboard.com> - 2015-11-20 16:00 +0100
            Re: [PATCH 17/25] serial: sh-sci: Correct SCIF type on R-Car for BRG Laurent Pinchart <laurent.pinchart@ideasonboard.com> - 2015-11-20 16:40 +0100
            Re: [PATCH 17/25] serial: sh-sci: Correct SCIF type on R-Car for BRG Geert Uytterhoeven <geert@linux-m68k.org> - 2015-11-20 16:40 +0100
    [PATCH 06/25] serial: sh-sci: Don't overwrite clock selection in serial_console_write() Geert Uytterhoeven <geert+renesas@glider.be> - 2015-11-19 19:50 +0100
    [PATCH 13/25] serial: sh-sci: Take into account sampling rate for max baud rate Geert Uytterhoeven <geert+renesas@glider.be> - 2015-11-19 19:50 +0100
    [PATCH 21/25] ARM: shmobile: r8a7791 dtsi: Add BRG support for (H)SCIF Geert Uytterhoeven <geert+renesas@glider.be> - 2015-11-19 19:50 +0100
    [PATCH 14/25] serial: sh-sci: Add BRG register definitions Geert Uytterhoeven <geert+renesas@glider.be> - 2015-11-19 19:50 +0100
      Re: [PATCH 14/25] serial: sh-sci: Add BRG register definitions Laurent Pinchart <laurent.pinchart@ideasonboard.com> - 2015-11-19 21:50 +0100
    [PATCH 07/25] serial: sh-sci: Convert from clk_get() to devm_clk_get() Geert Uytterhoeven <geert+renesas@glider.be> - 2015-11-19 19:50 +0100
      Re: [PATCH 07/25] serial: sh-sci: Convert from clk_get() to devm_clk_get() Laurent Pinchart <laurent.pinchart@ideasonboard.com> - 2015-11-19 21:40 +0100
    [PATCH 01/25] serial: sh-sci: Update DT binding documentation for external clock input Geert Uytterhoeven <geert+renesas@glider.be> - 2015-11-19 19:50 +0100
      Re: [PATCH 01/25] serial: sh-sci: Update DT binding documentation for external clock input Laurent Pinchart <laurent.pinchart@ideasonboard.com> - 2015-11-19 21:20 +0100
        Re: [PATCH 01/25] serial: sh-sci: Update DT binding documentation for external clock input Laurent Pinchart <laurent.pinchart@ideasonboard.com> - 2015-11-19 21:30 +0100
          Re: [PATCH 01/25] serial: sh-sci: Update DT binding documentation for  external clock input Geert Uytterhoeven <geert@linux-m68k.org> - 2015-11-19 21:50 +0100
            Re: [PATCH 01/25] serial: sh-sci: Update DT binding documentation for external clock input Laurent Pinchart <laurent.pinchart@ideasonboard.com> - 2015-11-19 22:20 +0100
              Re: [PATCH 01/25] serial: sh-sci: Update DT binding documentation for  external clock input Geert Uytterhoeven <geert@linux-m68k.org> - 2015-11-20 09:10 +0100
        Re: [PATCH 01/25] serial: sh-sci: Update DT binding documentation for  external clock input Geert Uytterhoeven <geert@linux-m68k.org> - 2015-11-19 21:40 +0100
    [PATCH 03/25] serial: sh-sci: Drop useless check for zero sampling_rate Geert Uytterhoeven <geert+renesas@glider.be> - 2015-11-19 19:50 +0100
    [PATCH 24/25] arm64: renesas: salvator-x dts: Enable SCIF_CLK frequency and pins Geert Uytterhoeven <geert+renesas@glider.be> - 2015-11-19 19:50 +0100
    [PATCH 19/25] serial: sh-sci: Add support for optional external (H)SCK input Geert Uytterhoeven <geert+renesas@glider.be> - 2015-11-19 19:50 +0100
    [PATCH 11/25] serial: sh-sci: Avoid calculating the receive margin for HSCIF Geert Uytterhoeven <geert+renesas@glider.be> - 2015-11-19 20:00 +0100
    [PATCH 12/25] serial: sh-sci: Merge sci_scbrr_calc() and sci_baud_calc_hscif() Geert Uytterhoeven <geert+renesas@glider.be> - 2015-11-19 20:00 +0100
    [PATCH 10/25] serial: sh-sci: Improve bit rate error calculation for HSCIF Geert Uytterhoeven <geert+renesas@glider.be> - 2015-11-19 20:00 +0100
    Re: [PATCH 00/25] serial: sh-sci: Add external clock and BRG Support Laurent Pinchart <laurent.pinchart@ideasonboard.com> - 2015-11-19 22:10 +0100
      Re: [PATCH 00/25] serial: sh-sci: Add external clock and BRG Support Geert Uytterhoeven <geert@linux-m68k.org> - 2015-11-20 09:30 +0100
        Re: [PATCH 00/25] serial: sh-sci: Add external clock and BRG Support Laurent Pinchart <laurent.pinchart@ideasonboard.com> - 2015-11-20 10:00 +0100
          Re: [PATCH 00/25] serial: sh-sci: Add external clock and BRG Support Geert Uytterhoeven <geert@linux-m68k.org> - 2015-11-20 10:10 +0100
            Re: [PATCH 00/25] serial: sh-sci: Add external clock and BRG Support Laurent Pinchart <laurent.pinchart@ideasonboard.com> - 2015-11-20 16:00 +0100
              Re: [PATCH 00/25] serial: sh-sci: Add external clock and BRG Support Geert Uytterhoeven <geert@linux-m68k.org> - 2015-11-20 16:40 +0100
    Re: [PATCH 00/25] serial: sh-sci: Add external clock and BRG Support Geert Uytterhoeven <geert@linux-m68k.org> - 2015-11-20 10:10 +0100
    Re: [PATCH 00/25] serial: sh-sci: Add external clock and BRG Support Simon Horman <horms@verge.net.au> - 2015-11-24 03:50 +0100

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#1273388 — [PATCH 03/25] serial: sh-sci: Drop useless check for zero sampling_rate

sci_port.sampling_rate is always non-zero, except for HSCIF, which uses
sci_baud_calc_hscif() instead of sci_scbrr_calc().

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
 drivers/tty/serial/sh-sci.c | 8 +-------
 1 file changed, 1 insertion(+), 7 deletions(-)

diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c
index bee5b7025adf45a2..ae136a1632e6298d 100644
--- a/drivers/tty/serial/sh-sci.c
+++ b/drivers/tty/serial/sh-sci.c
@@ -1863,13 +1863,7 @@ static void sci_shutdown(struct uart_port *port)
 static unsigned int sci_scbrr_calc(struct sci_port *s, unsigned int bps,
 				   unsigned long freq)
 {
-	if (s->sampling_rate)
-		return DIV_ROUND_CLOSEST(freq, s->sampling_rate * bps) - 1;
-
-	/* Warn, but use a safe default */
-	WARN_ON(1);
-
-	return ((freq + 16 * bps) / (32 * bps) - 1);
+	return DIV_ROUND_CLOSEST(freq, s->sampling_rate * bps) - 1;
 }
 
 /* calculate frame length from SMR */
-- 
1.9.1

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#1273389 — [PATCH 24/25] arm64: renesas: salvator-x dts: Enable SCIF_CLK frequency and pins

Add and enable the external crystal for the SCIF_CLK and its pinctrl, to
be used by the Baud Rate Generator for External Clock (BRG) on (H)SCIF.

This increases the range and accuracy of supported baud rates:
  - SCIF:
      - Supports now 50, 230400, 460800, 500000, and 921600 bps,
      - Perfect match for standard 50-460800, and 9216000 bps.
  - HSCIF:
      - Supports now 50, 75, and 110 bps,
      - Perfect match for standard 50-460800, and 9216000 bps.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
 arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
index afbd5256806e7014..0b38fecb1c5d75e9 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
+++ b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
@@ -127,6 +127,9 @@
 };
 
 &pfc {
+	pinctrl-0 = <&scif_clk_pins>;
+	pinctrl-names = "default";
+
 	scif1_pins: scif1 {
 		renesas,groups = "scif1_data_a", "scif1_ctrl";
 		renesas,function = "scif1";
@@ -135,6 +138,10 @@
 		renesas,groups = "scif2_data_a";
 		renesas,function = "scif2";
 	};
+	scif_clk_pins: scif_clk {
+		renesas,groups = "scif_clk_a";
+		renesas,function = "scif_clk";
+	};
 
 	i2c2_pins: i2c2 {
 		renesas,groups = "i2c2_a";
@@ -172,6 +179,11 @@
 	status = "okay";
 };
 
+&scif_clk {
+	clock-frequency = <14745600>;
+	status = "okay";
+};
+
 &rcar_sound {
 	pinctrl-0 = <&sound_pins &sound_clk_pins>;
 	pinctrl-names = "default";
-- 
1.9.1

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#1273390 — [PATCH 19/25] serial: sh-sci: Add support for optional external (H)SCK input

Add support for using the SCIx clock pin "(H)SCK" as an external clock
input on (H)SCI(F).

Note that this feature is not yet supported on the select SCIFA variants
that also have it (e.g. sh7723, sh7724, and r8a7740).

On (H)SCIF variants with an External Baud Rate Generator (BRG), the
BRG Clock Select Register must be configured for the external clock.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
 drivers/tty/serial/sh-sci.c | 63 ++++++++++++++++++++++++++++++++++++++++++---
 1 file changed, 60 insertions(+), 3 deletions(-)

diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c
index 12800e52f41953dc..f88aac684ed1e3b6 100644
--- a/drivers/tty/serial/sh-sci.c
+++ b/drivers/tty/serial/sh-sci.c
@@ -79,6 +79,7 @@ enum {
 
 enum SCI_CLKS {
 	SCI_FCK,		/* Functional Clock */
+	SCI_SCK,		/* Optional External Clock */
 	SCI_NUM_CLKS
 };
 
@@ -1924,6 +1925,36 @@ static void sci_shutdown(struct uart_port *port)
 	sci_free_irq(s);
 }
 
+static int sci_sck_calc(struct sci_port *s, unsigned int bps,
+			unsigned int *srr)
+{
+	unsigned long freq = s->clk_rates[SCI_SCK];
+	unsigned int min_sr, max_sr, sr;
+	int err, min_err = INT_MAX;
+
+	if (s->sampling_rate) {
+		/* SCI(F) has a fixed sampling rate */
+		min_sr = max_sr = s->sampling_rate / 2;
+	} else {
+		/* HSCIF has a variable 1/(8..32) sampling rate */
+		min_sr = 8;
+		max_sr = 32;
+	}
+
+	for (sr = max_sr; sr >= min_sr; sr--) {
+		err = DIV_ROUND_CLOSEST(freq, sr) - bps;
+		if (abs(err) >= abs(min_err))
+			continue;
+
+		min_err = err;
+		*srr = sr - 1;
+	}
+
+	dev_dbg(s->port.dev, "SCK: %u%+d bps using SR %u\n", bps, min_err,
+		*srr + 1);
+	return min_err;
+}
+
 /* calculate sample rate, BRR, and clock select */
 static int sci_scbrr_calc(struct sci_port *s, unsigned int bps,
 			  unsigned int *brr, unsigned int *srr,
@@ -2005,7 +2036,7 @@ static void sci_set_termios(struct uart_port *port, struct ktermios *termios,
 			    struct ktermios *old)
 {
 	unsigned int baud, smr_val = 0, scr_val = 0, i;
-	unsigned int brr = 255, cks = 0, srr = 15;
+	unsigned int brr = 255, cks = 0, srr = 15, sccks = 0;
 	unsigned int brr1 = 255, cks1 = 0, srr1 = 15;
 	struct sci_port *s = to_sci_port(port);
 	const struct plat_sci_reg *reg;
@@ -2043,10 +2074,26 @@ static void sci_set_termios(struct uart_port *port, struct ktermios *termios,
 	if (!baud)
 		goto done;
 
+	/* Optional External Clock */
+	if (s->clk_rates[SCI_SCK] && port->type != PORT_SCIFA &&
+	    port->type != PORT_SCIFB) {
+		err = sci_sck_calc(s, baud, &srr1);
+		if (abs(err) < abs(min_err)) {
+			best_clk = SCI_SCK;
+			scr_val = SCSCR_CKE1;
+			sccks = SCCKS_CKS;
+			min_err = err;
+			srr = srr1;
+			if (!err)
+				goto done;
+		}
+	}
+
 	/* Functional Clock and standard Bit Rate Register */
 	err = sci_scbrr_calc(s, baud, &brr1, &srr1, &cks1);
 	if (abs(err) < abs(min_err)) {
 		best_clk = SCI_FCK;
+		scr_val = 0;
 		min_err = err;
 		brr = brr1;
 		srr = srr1;
@@ -2060,14 +2107,20 @@ done:
 
 	sci_port_enable(s);
 
+	/* Program the optional External Baud Rate Generator (BRG) first */
+	if (best_clk >= 0 && sci_getreg(port, SCCKS)->size)
+		serial_port_out(port, SCCKS, sccks);
+
 	sci_reset(port);
 
 	uart_update_timeout(port, termios->c_cflag, baud);
 
 	if (best_clk >= 0) {
 		smr_val |= cks;
-		dev_dbg(port->dev, "SMR 0x%x BRR %u SRR %u\n", smr_val, brr,
-			srr);
+		dev_dbg(port->dev,
+			 "SCR 0x%x SMR 0x%x BRR %u CKS 0x%x SRR %u\n",
+			 scr_val, smr_val, brr, sccks, srr);
+		serial_port_out(port, SCSCR, scr_val);
 		serial_port_out(port, SCSMR, smr_val);
 		serial_port_out(port, SCBRR, brr);
 		if (sci_getreg(port, HSSRR)->size)
@@ -2303,10 +2356,14 @@ static int sci_init_clocks(struct sci_port *sci_port, struct device *dev)
 {
 	const char *clk_names[] = {
 		[SCI_FCK] = "fck",
+		[SCI_SCK] = "sck",
 	};
 	struct clk *clk;
 	unsigned int i;
 
+	if (sci_port->cfg->type == PORT_HSCIF)
+		clk_names[SCI_SCK] = "hsck";
+
 	for (i = 0; i < SCI_NUM_CLKS; i++) {
 		clk = devm_clk_get(dev, clk_names[i]);
 		if (PTR_ERR(clk) == -EPROBE_DEFER)
-- 
1.9.1

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#1273396 — [PATCH 11/25] serial: sh-sci: Avoid calculating the receive margin for HSCIF

When assuming D = 0.5 and F = 0, maximizing the receive margin M is
equivalent to maximizing the sample rate N.

Hence there's no need to calculate the receive margin, as we can obtain
the same result by iterating over all possible sample rates in reverse
order, and skipping parameter sets that don't provide a lower bit rate
error.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
 drivers/tty/serial/sh-sci.c | 47 +++++++++++++++++++--------------------------
 1 file changed, 20 insertions(+), 27 deletions(-)

diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c
index f35c209afd127c02..c2ab29ddedbc26a2 100644
--- a/drivers/tty/serial/sh-sci.c
+++ b/drivers/tty/serial/sh-sci.c
@@ -1872,13 +1872,24 @@ static void sci_baud_calc_hscif(struct sci_port *s, unsigned int bps,
 				unsigned int *srr, unsigned int *cks)
 {
 	unsigned int sr, br, a, b, c;
-	int err, recv_margin;
-	int min_err = INT_MAX;
-	int recv_max_margin = 0;
+	int err, min_err = INT_MAX;
 
-	/* Find the combination of sample rate and clock select with the
-	   smallest deviation from the desired baud rate. */
-	for (sr = 8; sr <= 32; sr++) {
+	/*
+	 * Find the combination of sample rate and clock select with the
+	 * smallest deviation from the desired baud rate.
+	 * Prefer high sample rates to maximise the receive margin.
+	 *
+	 * M: Receive margin (%)
+	 * N: Ratio of bit rate to clock (N = sampling rate)
+	 * D: Clock duty (D = 0 to 1.0)
+	 * L: Frame length (L = 9 to 12)
+	 * F: Absolute value of clock frequency deviation
+	 *
+	 *  M = |(0.5 - 1 / 2 * N) - ((L - 0.5) * F) -
+	 *      (|D - 0.5| / N * (1 + F))|
+	 *  NOTE: Usually, treat D for 0.5, F is 0 by this calculation.
+	 */
+	for (sr = 32; sr >= 8; sr--) {
 		for (c = 0; c <= 3; c++) {
 			/* integerized formulas from HSCIF documentation */
 			a = sr * (1 << (2 * c + 1));
@@ -1888,30 +1899,12 @@ static void sci_baud_calc_hscif(struct sci_port *s, unsigned int bps,
 			b = a * bps;
 			br = DIV_ROUND_CLOSEST(freq, b);
 			br = clamp(br, 1U, 256U);
+
 			err = DIV_ROUND_CLOSEST(freq, br * a) - bps;
-			/* Calc recv margin
-			 * M: Receive margin (%)
-			 * N: Ratio of bit rate to clock (N = sampling rate)
-			 * D: Clock duty (D = 0 to 1.0)
-			 * L: Frame length (L = 9 to 12)
-			 * F: Absolute value of clock frequency deviation
-			 *
-			 *  M = |(0.5 - 1 / 2 * N) - ((L - 0.5) * F) -
-			 *      (|D - 0.5| / N * (1 + F))|
-			 *  NOTE: Usually, treat D for 0.5, F is 0 by this
-			 *        calculation.
-			 */
-			recv_margin = abs((500 -
-					DIV_ROUND_CLOSEST(1000, sr << 1)) / 10);
-			if (abs(min_err) > abs(err)) {
-				min_err = err;
-				recv_max_margin = recv_margin;
-			} else if ((min_err == err) &&
-				   (recv_margin > recv_max_margin))
-				recv_max_margin = recv_margin;
-			else
+			if (abs(err) >= abs(min_err))
 				continue;
 
+			min_err = err;
 			*brr = br - 1;
 			*srr = sr - 1;
 			*cks = c;
-- 
1.9.1

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#1273405 — [PATCH 12/25] serial: sh-sci: Merge sci_scbrr_calc() and sci_baud_calc_hscif()

For low bit rates, the for-loop that reduces the divider returned by
sci_scbrr_calc() and picks the clock select value may terminate without
finding suitable values, leading to out-of-range divider and clock
select values.
sci_baud_calc_hscif() doesn't suffer from this problem, as it correctly
uses clamp().

Since there are only two relevant differences between HSCIF and other
variants w.r.t. bit rate configuration (fixed vs. variable sample rate,
and an additional factor of two), sci_scbrr_calc() and
sci_baud_calc_hscif() can be merged, fixing the issue with out-of-range
values.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
 drivers/tty/serial/sh-sci.c | 42 +++++++++++++++++++-----------------------
 1 file changed, 19 insertions(+), 23 deletions(-)

diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c
index c2ab29ddedbc26a2..dccea5df5355076a 100644
--- a/drivers/tty/serial/sh-sci.c
+++ b/drivers/tty/serial/sh-sci.c
@@ -1860,20 +1860,24 @@ static void sci_shutdown(struct uart_port *port)
 	sci_free_irq(s);
 }
 
-static unsigned int sci_scbrr_calc(struct sci_port *s, unsigned int bps,
-				   unsigned long freq)
+/* calculate sample rate, BRR, and clock select */
+static void sci_scbrr_calc(struct sci_port *s, unsigned int bps,
+			   unsigned long freq, int *brr, unsigned int *srr,
+			   unsigned int *cks)
 {
-	return DIV_ROUND_CLOSEST(freq, s->sampling_rate * bps) - 1;
-}
-
-/* calculate sample rate, BRR, and clock select for HSCIF */
-static void sci_baud_calc_hscif(struct sci_port *s, unsigned int bps,
-				unsigned long freq, int *brr,
-				unsigned int *srr, unsigned int *cks)
-{
-	unsigned int sr, br, a, b, c;
+	unsigned int min_sr, max_sr, shift, sr, br, a, b, c;
 	int err, min_err = INT_MAX;
 
+	if (s->sampling_rate) {
+		min_sr = max_sr = s->sampling_rate;
+		shift = 0;
+	} else {
+		/* HSCIF has a variable sample rate */
+		min_sr = 8;
+		max_sr = 32;
+		shift = 1;
+	}
+
 	/*
 	 * Find the combination of sample rate and clock select with the
 	 * smallest deviation from the desired baud rate.
@@ -1889,10 +1893,10 @@ static void sci_baud_calc_hscif(struct sci_port *s, unsigned int bps,
 	 *      (|D - 0.5| / N * (1 + F))|
 	 *  NOTE: Usually, treat D for 0.5, F is 0 by this calculation.
 	 */
-	for (sr = 32; sr >= 8; sr--) {
+	for (sr = max_sr; sr >= min_sr; sr--) {
 		for (c = 0; c <= 3; c++) {
 			/* integerized formulas from HSCIF documentation */
-			a = sr * (1 << (2 * c + 1));
+			a = sr * (1 << (2 * c + shift));
 			if (bps > UINT_MAX / a)
 				break;
 
@@ -1960,16 +1964,8 @@ static void sci_set_termios(struct uart_port *port, struct ktermios *termios,
 	max_baud = port->uartclk ? port->uartclk / 16 : 115200;
 
 	baud = uart_get_baud_rate(port, termios, old, 0, max_baud);
-	if (likely(baud && port->uartclk)) {
-		if (s->cfg->type == PORT_HSCIF) {
-			sci_baud_calc_hscif(s, baud, port->uartclk, &t, &srr,
-					    &cks);
-		} else {
-			t = sci_scbrr_calc(s, baud, port->uartclk);
-			for (cks = 0; t >= 256 && cks <= 3; cks++)
-				t >>= 2;
-		}
-	}
+	if (likely(baud && port->uartclk))
+		sci_scbrr_calc(s, baud, port->uartclk, &t, &srr, &cks);
 
 	sci_port_enable(s);
 
-- 
1.9.1

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#1273406 — [PATCH 10/25] serial: sh-sci: Improve bit rate error calculation for HSCIF

The algorithm to find the best parameters for the requested bit rate
calculates the relative bit rate error, using "(br * b) / 1000".
For small "br * b", this has two problems:
  - The quotient may be zero, leading to a division by zero error,
  - This may introduce a large rounding error.
Switch from relative to absolute bit rate error calculation to fix this.

The default baud rate generator values can be removed, as there will
always be one set of values that gives the smallest absolute error.

Print the best set of values when debugging.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
 drivers/tty/serial/sh-sci.c | 18 +++++++-----------
 1 file changed, 7 insertions(+), 11 deletions(-)

diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c
index 97a0f8ef5adc55a2..f35c209afd127c02 100644
--- a/drivers/tty/serial/sh-sci.c
+++ b/drivers/tty/serial/sh-sci.c
@@ -1867,12 +1867,13 @@ static unsigned int sci_scbrr_calc(struct sci_port *s, unsigned int bps,
 }
 
 /* calculate sample rate, BRR, and clock select for HSCIF */
-static void sci_baud_calc_hscif(unsigned int bps, unsigned long freq, int *brr,
+static void sci_baud_calc_hscif(struct sci_port *s, unsigned int bps,
+				unsigned long freq, int *brr,
 				unsigned int *srr, unsigned int *cks)
 {
 	unsigned int sr, br, a, b, c;
 	int err, recv_margin;
-	int min_err = 1000; /* 100% */
+	int min_err = INT_MAX;
 	int recv_max_margin = 0;
 
 	/* Find the combination of sample rate and clock select with the
@@ -1887,7 +1888,7 @@ static void sci_baud_calc_hscif(unsigned int bps, unsigned long freq, int *brr,
 			b = a * bps;
 			br = DIV_ROUND_CLOSEST(freq, b);
 			br = clamp(br, 1U, 256U);
-			err = DIV_ROUND_CLOSEST(freq, (br * b) / 1000) - 1000;
+			err = DIV_ROUND_CLOSEST(freq, br * a) - bps;
 			/* Calc recv margin
 			 * M: Receive margin (%)
 			 * N: Ratio of bit rate to clock (N = sampling rate)
@@ -1917,13 +1918,8 @@ static void sci_baud_calc_hscif(unsigned int bps, unsigned long freq, int *brr,
 		}
 	}
 
-	if (min_err == 1000) {
-		WARN_ON(1);
-		/* use defaults */
-		*brr = 255;
-		*srr = 15;
-		*cks = 0;
-	}
+	dev_dbg(s->port.dev, "BRR: %u%+d bps using N %u SR %u cks %u\n", bps,
+		min_err, *brr, *srr + 1, *cks);
 }
 
 static void sci_reset(struct uart_port *port)
@@ -1973,7 +1969,7 @@ static void sci_set_termios(struct uart_port *port, struct ktermios *termios,
 	baud = uart_get_baud_rate(port, termios, old, 0, max_baud);
 	if (likely(baud && port->uartclk)) {
 		if (s->cfg->type == PORT_HSCIF) {
-			sci_baud_calc_hscif(baud, port->uartclk, &t, &srr,
+			sci_baud_calc_hscif(s, baud, port->uartclk, &t, &srr,
 					    &cks);
 		} else {
 			t = sci_scbrr_calc(s, baud, port->uartclk);
-- 
1.9.1

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#1273504

Hi Geert,

Thank you for the patches.

For patches 3-6, 13, 15-16 and 22 and 24,

Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>

I'm not sure I'd bother with patch 25/25, but I'm not against merging it 
either. I'd be surprised if the serial driver still worked at all on SH :-)

On Thursday 19 November 2015 19:38:39 Geert Uytterhoeven wrote:
> 	Hi,
> 
> This patch series adds support to the Renesas SCI serial driver for
>   - the optional external clock on (H)SCI(F) and some SCIFA, where this
>     pin can serve as a clock input,
>   - the optional clock sources for the Baud Rate Generator for External
>     Clock (BRG), as found on some SCIF variants and on HSCIF.

Could you briefly explain (and even better in a source code comment) how you 
handle baud rate calculation with the chained BRGs ?

> Using external clocks increases the range and accuracy of supported baud
> rates. Please see the descriptions of the DTS patches for more detailed
> information regarding the impact on the supported platforms.
> 
> For now this supports r8a7791/koelsch and r8a7795/salvator-x only, which
> have an external SCIF_CLK running at 14.7456 MHz.
> Support for other R-Car platforms will be added later.
> 
> Testing:
>   - The Baud Rate Generator for External Clock (BRG) was tested with
>     SCIF and HSCIF on r8a7791/koelsch and r8a7795/salvator-x,
>   - The external clock input on (H)SCK was tested on r8a7795/salvator-x
>     by feeding an external clock signal to (H)SCIF1,
>   - Various bit rates were monitored using a SmartScope,
>   - Regression testing was done on Renesas ARM platforms that use SCIFA
>     as the console (r8a73a4/ape6evm, r8a7740/armadillo, and
>     sh73a0/kzm9g).
> 
> Dependencies:
>   - This series depends on the series "[PATCH v2 00/16] serial: sh-sci:
>     Clock Cleanups",
>   - The SH patch 25 depends on the "serial: sh-sci" patches in this
>     series,
>   - The DTS patches 21-24 can be applied independently, once the DT
>     binding patches 1-2 are accepted,
>   - r8a7791/r8a7795 has a runtime dependency on series "[PATCH 0/2]
>     pinctrl: sh-pfc: r8a7791/r8a7795: Add SCIF_CLK support",
>   - r8a7795 also depends on
>        - platform support in e.g. renesas-drivers-2015-11-17-v4.4-rc1,
>        - "[PATCH] pinctrl: sh-pfc: r8a7795: Add HSCIF pins, groups, and
> 	 functions",
>        - "[PATCH] arm64: renesas: r8a7795 dtsi: Add all HSCIF nodes".
>   - Legacy SH has a runtime dependency on:
>       - series "[PATCH 0/2] drivers: sh: clk: Cleanup clock API",
> 
> Thanks for your comments!
> 
> Geert Uytterhoeven (25):
>   serial: sh-sci: Update DT binding documentation for external clock
>     input
>   serial: sh-sci: Update DT binding documentation for BRG support
>   serial: sh-sci: Drop useless check for zero sampling_rate
>   serial: sh-sci: Grammar s/Get ... for/Get ... from/
>   serial: sh-sci: Drop unused frame_len parameter for
>     sci_baud_calc_hscif()
>   serial: sh-sci: Don't overwrite clock selection in
>     serial_console_write()
>   serial: sh-sci: Convert from clk_get() to devm_clk_get()
>   serial: sh-sci: Make unsigned values in sci_baud_calc_hscif() unsigned
>   serial: sh-sci: Avoid overflow in sci_baud_calc_hscif()
>   serial: sh-sci: Improve bit rate error calculation for HSCIF
>   serial: sh-sci: Avoid calculating the receive margin for HSCIF
>   serial: sh-sci: Merge sci_scbrr_calc() and sci_baud_calc_hscif()
>   serial: sh-sci: Take into account sampling rate for max baud rate
>   serial: sh-sci: Add BRG register definitions
>   serial: sh-sci: Replace struct sci_port_info by type/regtype encoding
>   serial: sh-sci: Correct SCIF type on RZ/A1H
>   serial: sh-sci: Correct SCIF type on R-Car for BRG
>   serial: sh-sci: Prepare for multiple clocks and baud rate generators
>   serial: sh-sci: Add support for optional external (H)SCK input
>   serial: sh-sci: Add support for optional BRG on (H)SCIF
>   ARM: shmobile: r8a7791 dtsi: Add BRG support for (H)SCIF
>   ARM: shmobile: koelsch dts: Enable SCIF_CLK frequency and pins
>   arm64: renesas: r8a7795 dtsi: Add BRG support for (H)SCIF
>   arm64: renesas: salvator-x dts: Enable SCIF_CLK frequency and pins
>   sh: sh7734: Correct SCIF type for BRG
> 
>  .../bindings/serial/renesas,sci-serial.txt         |   9 +
>  arch/arm/boot/dts/r8a7791-koelsch.dts              |  13 +
>  arch/arm/boot/dts/r8a7791.dtsi                     |  54 ++-
>  arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts |  12 +
>  arch/arm64/boot/dts/renesas/r8a7795.dtsi           |  74 ++-
>  arch/sh/kernel/cpu/sh4a/setup-sh7734.c             |  12 +-
>  drivers/tty/serial/sh-sci.c                        | 530 ++++++++++++------
>  drivers/tty/serial/sh-sci.h                        |   5 +
>  include/linux/serial_sci.h                         |   1 +
>  9 files changed, 508 insertions(+), 202 deletions(-)

-- 
Regards,

Laurent Pinchart

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#1273821

Hi Laurent,

On Thu, Nov 19, 2015 at 10:08 PM, Laurent Pinchart
<laurent.pinchart@ideasonboard.com> wrote:
> For patches 3-6, 13, 15-16 and 22 and 24,
>
> Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>

Many thanks for your review comments!

> I'm not sure I'd bother with patch 25/25, but I'm not against merging it
> either. I'd be surprised if the serial driver still worked at all on SH :-)

It should not cause problems, as long as sh7734 doesn't add the optional
clocks ;-)

> On Thursday 19 November 2015 19:38:39 Geert Uytterhoeven wrote:
>> This patch series adds support to the Renesas SCI serial driver for
>>   - the optional external clock on (H)SCI(F) and some SCIFA, where this
>>     pin can serve as a clock input,
>>   - the optional clock sources for the Baud Rate Generator for External
>>     Clock (BRG), as found on some SCIF variants and on HSCIF.
>
> Could you briefly explain (and even better in a source code comment) how you
> handle baud rate calculation with the chained BRGs ?

I'll do that. Note that there's no chaining of BRGs, only muxing (so yes, it
needs more clarification ;-).

There can be 4 possible sources for the sampling clock:
  1. Internal BRG (BRR register),
  2. (H)SCK,
  3. BRG for external clock
      a. Using SCIF_CLK,
      b. Using the bus clock.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds
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#1273873

Hi Geert,

On Friday 20 November 2015 09:22:16 Geert Uytterhoeven wrote:
> On Thu, Nov 19, 2015 at 10:08 PM, Laurent Pinchart wrote:
> > For patches 3-6, 13, 15-16 and 22 and 24,
> > 
> > Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
> 
> Many thanks for your review comments!

You're welcome.

> > I'm not sure I'd bother with patch 25/25, but I'm not against merging it
> > either. I'd be surprised if the serial driver still worked at all on SH
> > :-)
> 
> It should not cause problems, as long as sh7734 doesn't add the optional
> clocks ;-)

To be clear I don't expect this patch set to break it, I expect it to be 
broken already :-)

> > On Thursday 19 November 2015 19:38:39 Geert Uytterhoeven wrote:
> >> This patch series adds support to the Renesas SCI serial driver for
> >> 
> >>   - the optional external clock on (H)SCI(F) and some SCIFA, where this
> >>   
> >>     pin can serve as a clock input,
> >>   
> >>   - the optional clock sources for the Baud Rate Generator for External
> >>   
> >>     Clock (BRG), as found on some SCIF variants and on HSCIF.
> > 
> > Could you briefly explain (and even better in a source code comment) how
> > you handle baud rate calculation with the chained BRGs ?
> 
> I'll do that. Note that there's no chaining of BRGs, only muxing (so yes, it
> needs more clarification ;-).

Really ? I thought the BRG-EC was one possible input for the internal BRG ? 
Does it bypass the internal BRG ? Or do you configure the internal BRG to not 
divide the clock when using the BRG-EC ?

> There can be 4 possible sources for the sampling clock:
>   1. Internal BRG (BRR register),
>   2. (H)SCK,
>   3. BRG for external clock
>       a. Using SCIF_CLK,
>       b. Using the bus clock.

-- 
Regards,

Laurent Pinchart

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#1273884

Hi Laurent,

On Fri, Nov 20, 2015 at 9:58 AM, Laurent Pinchart
<laurent.pinchart@ideasonboard.com> wrote:
> On Friday 20 November 2015 09:22:16 Geert Uytterhoeven wrote:
>> On Thu, Nov 19, 2015 at 10:08 PM, Laurent Pinchart wrote:
>> > Could you briefly explain (and even better in a source code comment) how
>> > you handle baud rate calculation with the chained BRGs ?
>>
>> I'll do that. Note that there's no chaining of BRGs, only muxing (so yes, it
>> needs more clarification ;-).
>
> Really ? I thought the BRG-EC was one possible input for the internal BRG ?
> Does it bypass the internal BRG ? Or do you configure the internal BRG to not
> divide the clock when using the BRG-EC ?

Yes, it's bypassed.

Cfr. SCSCR.CKE[1:0].
'00' means internal BRG (although the docs state P divided by 1/4/16/64),
'10' means SCK or SC_CLK (SCIF_CLK/INT_CLK).

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds
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#1274146

Hi Geert,

On Friday 20 November 2015 10:07:31 Geert Uytterhoeven wrote:
> On Fri, Nov 20, 2015 at 9:58 AM, Laurent Pinchart wrote:
> > On Friday 20 November 2015 09:22:16 Geert Uytterhoeven wrote:
> >> On Thu, Nov 19, 2015 at 10:08 PM, Laurent Pinchart wrote:
> >>> Could you briefly explain (and even better in a source code comment)
> >>> how you handle baud rate calculation with the chained BRGs ?
> >> 
> >> I'll do that. Note that there's no chaining of BRGs, only muxing (so yes,
> >> it needs more clarification ;-).
> > 
> > Really ? I thought the BRG-EC was one possible input for the internal BRG
> > ? Does it bypass the internal BRG ? Or do you configure the internal BRG
> > to not divide the clock when using the BRG-EC ?
> 
> Yes, it's bypassed.
> 
> Cfr. SCSCR.CKE[1:0].
> '00' means internal BRG (although the docs state P divided by 1/4/16/64),
> '10' means SCK or SC_CLK (SCIF_CLK/INT_CLK).

That's indeed simpler. Could you capture the behaviour in a source code 
comment ?

-- 
Regards,

Laurent Pinchart

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#1274193

On Fri, Nov 20, 2015 at 3:50 PM, Laurent Pinchart
<laurent.pinchart@ideasonboard.com> wrote:
> On Friday 20 November 2015 10:07:31 Geert Uytterhoeven wrote:
>> On Fri, Nov 20, 2015 at 9:58 AM, Laurent Pinchart wrote:
>> > On Friday 20 November 2015 09:22:16 Geert Uytterhoeven wrote:
>> >> On Thu, Nov 19, 2015 at 10:08 PM, Laurent Pinchart wrote:
>> >>> Could you briefly explain (and even better in a source code comment)
>> >>> how you handle baud rate calculation with the chained BRGs ?
>> >>
>> >> I'll do that. Note that there's no chaining of BRGs, only muxing (so yes,
>> >> it needs more clarification ;-).
>> >
>> > Really ? I thought the BRG-EC was one possible input for the internal BRG
>> > ? Does it bypass the internal BRG ? Or do you configure the internal BRG
>> > to not divide the clock when using the BRG-EC ?
>>
>> Yes, it's bypassed.
>>
>> Cfr. SCSCR.CKE[1:0].
>> '00' means internal BRG (although the docs state P divided by 1/4/16/64),
>> '10' means SCK or SC_CLK (SCIF_CLK/INT_CLK).
>
> That's indeed simpler. Could you capture the behaviour in a source code
> comment ?

Sure.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds
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#1273878

On Thu, Nov 19, 2015 at 7:38 PM, Geert Uytterhoeven
<geert+renesas@glider.be> wrote:
> This patch series adds support to the Renesas SCI serial driver for
>   - the optional external clock on (H)SCI(F) and some SCIFA, where this
>     pin can serve as a clock input,
>   - the optional clock sources for the Baud Rate Generator for External
>     Clock (BRG), as found on some SCIF variants and on HSCIF.
> Using external clocks increases the range and accuracy of supported baud
> rates. Please see the descriptions of the DTS patches for more detailed
> information regarding the impact on the supported platforms.

For the consumers: I've pushed this (incl. the dependencies and a few
WIP patches) to the scif-brg branch of my renesas-drivers repo.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds
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#1276029

On Thu, Nov 19, 2015 at 07:38:39PM +0100, Geert Uytterhoeven wrote:
> 	Hi,
> 
> This patch series adds support to the Renesas SCI serial driver for
>   - the optional external clock on (H)SCI(F) and some SCIFA, where this
>     pin can serve as a clock input,
>   - the optional clock sources for the Baud Rate Generator for External
>     Clock (BRG), as found on some SCIF variants and on HSCIF.
> Using external clocks increases the range and accuracy of supported baud
> rates. Please see the descriptions of the DTS patches for more detailed
> information regarding the impact on the supported platforms.
> 
> For now this supports r8a7791/koelsch and r8a7795/salvator-x only, which
> have an external SCIF_CLK running at 14.7456 MHz.
> Support for other R-Car platforms will be added later.
> 
> Testing:
>   - The Baud Rate Generator for External Clock (BRG) was tested with
>     SCIF and HSCIF on r8a7791/koelsch and r8a7795/salvator-x,
>   - The external clock input on (H)SCK was tested on r8a7795/salvator-x
>     by feeding an external clock signal to (H)SCIF1,
>   - Various bit rates were monitored using a SmartScope,
>   - Regression testing was done on Renesas ARM platforms that use SCIFA
>     as the console (r8a73a4/ape6evm, r8a7740/armadillo, and
>     sh73a0/kzm9g).
> 	      
> Dependencies:
>   - This series depends on the series "[PATCH v2 00/16] serial: sh-sci:
>     Clock Cleanups",
>   - The SH patch 25 depends on the "serial: sh-sci" patches in this
>     series,
>   - The DTS patches 21-24 can be applied independently, once the DT
>     binding patches 1-2 are accepted,

I have marked those patches as deferred pending the bindings being
accepted.

>   - r8a7791/r8a7795 has a runtime dependency on series "[PATCH 0/2]
>     pinctrl: sh-pfc: r8a7791/r8a7795: Add SCIF_CLK support",
>   - r8a7795 also depends on
>        - platform support in e.g. renesas-drivers-2015-11-17-v4.4-rc1,
>        - "[PATCH] pinctrl: sh-pfc: r8a7795: Add HSCIF pins, groups, and
> 	 functions",
>        - "[PATCH] arm64: renesas: r8a7795 dtsi: Add all HSCIF nodes".
>   - Legacy SH has a runtime dependency on:
>       - series "[PATCH 0/2] drivers: sh: clk: Cleanup clock API",
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